2 * ADM5120 specific interrupt handlers
4 * Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
12 #include <linux/init.h>
13 #include <linux/kernel.h>
14 #include <linux/version.h>
15 #include <linux/irq.h>
16 #include <linux/interrupt.h>
17 #include <linux/ioport.h>
19 #include <linux/bitops.h>
21 #include <asm/irq_cpu.h>
22 #include <asm/mipsregs.h>
24 #include <asm/mach-adm5120/adm5120_defs.h>
26 static void adm5120_intc_irq_unmask(struct irq_data
*d
);
27 static void adm5120_intc_irq_mask(struct irq_data
*d
);
28 static int adm5120_intc_irq_set_type(struct irq_data
*d
, unsigned int flow_type
);
30 static inline void intc_write_reg(unsigned int reg
, u32 val
)
32 void __iomem
*base
= (void __iomem
*)KSEG1ADDR(ADM5120_INTC_BASE
);
34 __raw_writel(val
, base
+ reg
);
37 static inline u32
intc_read_reg(unsigned int reg
)
39 void __iomem
*base
= (void __iomem
*)KSEG1ADDR(ADM5120_INTC_BASE
);
41 return __raw_readl(base
+ reg
);
44 static struct irq_chip adm5120_intc_irq_chip
= {
46 .irq_unmask
= adm5120_intc_irq_unmask
,
47 .irq_mask
= adm5120_intc_irq_mask
,
48 .irq_mask_ack
= adm5120_intc_irq_mask
,
49 .irq_set_type
= adm5120_intc_irq_set_type
52 static struct irqaction adm5120_intc_irq_action
= {
54 .name
= "cascade [INTC]"
57 static void adm5120_intc_irq_unmask(struct irq_data
*d
)
59 intc_write_reg(INTC_REG_IRQ_ENABLE
, 1 << (d
->irq
- ADM5120_INTC_IRQ_BASE
));
62 static void adm5120_intc_irq_mask(struct irq_data
*d
)
64 intc_write_reg(INTC_REG_IRQ_DISABLE
, 1 << (d
->irq
- ADM5120_INTC_IRQ_BASE
));
67 static int adm5120_intc_irq_set_type(struct irq_data
*d
, unsigned int flow_type
)
69 unsigned int irq
= d
->irq
;
74 sense
= flow_type
& (IRQ_TYPE_SENSE_MASK
);
77 case IRQ_TYPE_LEVEL_HIGH
:
79 case IRQ_TYPE_LEVEL_LOW
:
81 case ADM5120_IRQ_GPIO2
:
82 case ADM5120_IRQ_GPIO4
:
98 case ADM5120_IRQ_GPIO2
:
99 case ADM5120_IRQ_GPIO4
:
100 mode
= intc_read_reg(INTC_REG_INT_MODE
);
101 if (sense
== IRQ_TYPE_LEVEL_LOW
)
102 mode
|= (1 << (irq
- ADM5120_INTC_IRQ_BASE
));
104 mode
&= ~(1 << (irq
- ADM5120_INTC_IRQ_BASE
));
106 intc_write_reg(INTC_REG_INT_MODE
, mode
);
113 static void adm5120_intc_irq_dispatch(void)
115 unsigned long status
;
118 status
= intc_read_reg(INTC_REG_IRQ_STATUS
) & INTC_INT_ALL
;
120 irq
= ADM5120_INTC_IRQ_BASE
+ fls(status
) - 1;
123 spurious_interrupt();
126 asmlinkage
void plat_irq_dispatch(void)
128 unsigned long pending
;
130 pending
= read_c0_status() & read_c0_cause() & ST0_IM
;
132 if (pending
& STATUSF_IP7
)
133 do_IRQ(ADM5120_IRQ_COUNTER
);
134 else if (pending
& STATUSF_IP2
)
135 adm5120_intc_irq_dispatch();
137 spurious_interrupt();
140 #define INTC_IRQ_STATUS (IRQ_LEVEL | IRQ_TYPE_LEVEL_HIGH | IRQ_DISABLED)
141 static void __init
adm5120_intc_irq_init(void)
145 /* disable all interrupts */
146 intc_write_reg(INTC_REG_IRQ_DISABLE
, INTC_INT_ALL
);
148 /* setup all interrupts to generate IRQ instead of FIQ */
149 intc_write_reg(INTC_REG_INT_MODE
, 0);
151 /* set active level for all external interrupts to HIGH */
152 intc_write_reg(INTC_REG_INT_LEVEL
, 0);
154 /* disable usage of the TEST_SOURCE register */
155 intc_write_reg(INTC_REG_IRQ_SOURCE_SELECT
, 0);
157 for (i
= ADM5120_INTC_IRQ_BASE
;
158 i
<= ADM5120_INTC_IRQ_BASE
+ INTC_IRQ_LAST
;
160 irq_set_chip_and_handler(i
, &adm5120_intc_irq_chip
,
164 setup_irq(ADM5120_IRQ_INTC
, &adm5120_intc_irq_action
);
167 void __init
arch_init_irq(void)
170 adm5120_intc_irq_init();