2 * ADM5120 HCD (Host Controller Driver) for USB
4 * Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
6 * This file was derived from: drivers/usb/host/ohci-hcd.c
7 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
8 * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
10 * [ Initialisation is based on Linus' ]
11 * [ uhci code and gregs ahcd fragments ]
12 * [ (C) Copyright 1999 Linus Torvalds ]
13 * [ (C) Copyright 1999 Gregory P. Smith]
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License version 2 as published
17 * by the Free Software Foundation.
21 #include <linux/module.h>
22 #include <linux/moduleparam.h>
23 #include <linux/pci.h>
24 #include <linux/kernel.h>
25 #include <linux/delay.h>
26 #include <linux/ioport.h>
27 #include <linux/sched.h>
28 #include <linux/slab.h>
29 #include <linux/errno.h>
30 #include <linux/init.h>
31 #include <linux/timer.h>
32 #include <linux/list.h>
33 #include <linux/usb.h>
34 #include <linux/usb/otg.h>
35 #include <linux/usb/hcd.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/dmapool.h>
38 #include <linux/debugfs.h>
42 #include <asm/unaligned.h>
43 #include <asm/byteorder.h>
45 #define DRIVER_VERSION "0.27.0"
46 #define DRIVER_AUTHOR "Gabor Juhos <juhosg@openwrt.org>"
47 #define DRIVER_DESC "ADMtek USB 1.1 Host Controller Driver"
49 /*-------------------------------------------------------------------------*/
51 #undef ADMHC_VERBOSE_DEBUG /* not always helpful */
53 /* For initializing controller (mask in an HCFS mode too) */
54 #define OHCI_CONTROL_INIT OHCI_CTRL_CBSR
56 #define ADMHC_INTR_INIT \
57 (ADMHC_INTR_MIE | ADMHC_INTR_INSM | ADMHC_INTR_FATI \
58 | ADMHC_INTR_RESI | ADMHC_INTR_TDC | ADMHC_INTR_BABI)
60 /*-------------------------------------------------------------------------*/
62 static const char hcd_name
[] = "admhc-hcd";
64 #define STATECHANGE_DELAY msecs_to_jiffies(300)
68 static void admhc_dump(struct admhcd
*ahcd
, int verbose
);
69 static int admhc_init(struct admhcd
*ahcd
);
70 static void admhc_stop(struct usb_hcd
*hcd
);
72 #include "adm5120-dbg.c"
73 #include "adm5120-mem.c"
74 #include "adm5120-pm.c"
75 #include "adm5120-hub.c"
76 #include "adm5120-q.c"
78 /*-------------------------------------------------------------------------*/
81 * queue up an urb for anything except the root hub
83 static int admhc_urb_enqueue(struct usb_hcd
*hcd
, struct urb
*urb
,
86 struct admhcd
*ahcd
= hcd_to_admhcd(hcd
);
88 struct urb_priv
*urb_priv
;
89 unsigned int pipe
= urb
->pipe
;
94 #ifdef ADMHC_VERBOSE_DEBUG
95 spin_lock_irqsave(&ahcd
->lock
, flags
);
96 urb_print(ahcd
, urb
, "ENQEUE", usb_pipein(pipe
), -EINPROGRESS
);
97 spin_unlock_irqrestore(&ahcd
->lock
, flags
);
100 /* every endpoint has an ed, locate and maybe (re)initialize it */
101 ed
= ed_get(ahcd
, urb
->ep
, urb
->dev
, pipe
, urb
->interval
);
105 /* for the private part of the URB we need the number of TDs */
108 if (urb
->transfer_buffer_length
> TD_DATALEN_MAX
)
109 /* td_submit_urb() doesn't yet handle these */
112 /* 1 TD for setup, 1 for ACK, plus ... */
116 /* one TD for every 4096 Bytes (can be up to 8K) */
117 td_cnt
+= urb
->transfer_buffer_length
/ TD_DATALEN_MAX
;
118 /* ... and for any remaining bytes ... */
119 if ((urb
->transfer_buffer_length
% TD_DATALEN_MAX
) != 0)
121 /* ... and maybe a zero length packet to wrap it up */
124 else if ((urb
->transfer_flags
& URB_ZERO_PACKET
) != 0
125 && (urb
->transfer_buffer_length
126 % usb_maxpacket(urb
->dev
, pipe
,
127 usb_pipeout(pipe
))) == 0)
132 * for Interrupt IN/OUT transactions, each ED contains
134 * TODO: check transfer_buffer_length?
138 case PIPE_ISOCHRONOUS
:
139 /* number of packets from URB */
140 td_cnt
= urb
->number_of_packets
;
144 urb_priv
= urb_priv_alloc(ahcd
, td_cnt
, mem_flags
);
150 spin_lock_irqsave(&ahcd
->lock
, flags
);
151 /* don't submit to a dead HC */
152 if (!HCD_HW_ACCESSIBLE(hcd
)) {
156 if (!HC_IS_RUNNING(hcd
->state
)) {
161 ret
= usb_hcd_link_urb_to_ep(hcd
, urb
);
165 /* schedule the ed if needed */
166 if (ed
->state
== ED_IDLE
) {
167 ret
= ed_schedule(ahcd
, ed
);
169 usb_hcd_unlink_urb_from_ep(hcd
, urb
);
172 if (ed
->type
== PIPE_ISOCHRONOUS
) {
173 u16 frame
= admhc_frame_no(ahcd
);
175 /* delay a few frames before the first TD */
176 frame
+= max_t (u16
, 8, ed
->interval
);
177 frame
&= ~(ed
->interval
- 1);
179 urb
->start_frame
= frame
;
181 /* yes, only URB_ISO_ASAP is supported, and
182 * urb->start_frame is never used as input.
185 } else if (ed
->type
== PIPE_ISOCHRONOUS
)
186 urb
->start_frame
= ed
->last_iso
+ ed
->interval
;
188 /* fill the TDs and link them to the ed; and
189 * enable that part of the schedule, if needed
190 * and update count of queued periodic urbs
192 urb
->hcpriv
= urb_priv
;
193 td_submit_urb(ahcd
, urb
);
195 #ifdef ADMHC_VERBOSE_DEBUG
196 admhc_dump_ed(ahcd
, "admhc_urb_enqueue", urb_priv
->ed
, 1);
201 urb_priv_free(ahcd
, urb_priv
);
203 spin_unlock_irqrestore(&ahcd
->lock
, flags
);
208 * decouple the URB from the HC queues (TDs, urb_priv);
209 * reporting is always done
210 * asynchronously, and we might be dealing with an urb that's
211 * partially transferred, or an ED with other urbs being unlinked.
213 static int admhc_urb_dequeue(struct usb_hcd
*hcd
, struct urb
*urb
,
216 struct admhcd
*ahcd
= hcd_to_admhcd(hcd
);
220 spin_lock_irqsave(&ahcd
->lock
, flags
);
222 #ifdef ADMHC_VERBOSE_DEBUG
223 urb_print(ahcd
, urb
, "DEQUEUE", 1, status
);
225 ret
= usb_hcd_check_unlink_urb(hcd
, urb
, status
);
229 } else if (HC_IS_RUNNING(hcd
->state
)) {
230 struct urb_priv
*urb_priv
;
232 /* Unless an IRQ completed the unlink while it was being
233 * handed to us, flag it for unlink and giveback, and force
234 * some upcoming INTR_SF to call finish_unlinks()
236 urb_priv
= urb
->hcpriv
;
238 if (urb_priv
->ed
->state
== ED_OPER
)
239 start_ed_unlink(ahcd
, urb_priv
->ed
);
243 * with HC dead, we won't respect hc queue pointers
244 * any more ... just clean up every urb's memory.
247 finish_urb(ahcd
, urb
, status
);
249 spin_unlock_irqrestore(&ahcd
->lock
, flags
);
254 /*-------------------------------------------------------------------------*/
256 /* frees config/altsetting state for endpoints,
257 * including ED memory, dummy TD, and bulk/intr data toggle
260 static void admhc_endpoint_disable(struct usb_hcd
*hcd
,
261 struct usb_host_endpoint
*ep
)
263 struct admhcd
*ahcd
= hcd_to_admhcd(hcd
);
265 struct ed
*ed
= ep
->hcpriv
;
266 unsigned limit
= 1000;
268 /* ASSERT: any requests/urbs are being unlinked */
269 /* ASSERT: nobody can be submitting urbs for this any more */
274 #ifdef ADMHC_VERBOSE_DEBUG
275 spin_lock_irqsave(&ahcd
->lock
, flags
);
276 admhc_dump_ed(ahcd
, "EP-DISABLE", ed
, 1);
277 spin_unlock_irqrestore(&ahcd
->lock
, flags
);
281 spin_lock_irqsave(&ahcd
->lock
, flags
);
283 if (!HC_IS_RUNNING(hcd
->state
)) {
286 finish_unlinks(ahcd
, 0);
290 case ED_UNLINK
: /* wait for hw to finish? */
291 /* major IRQ delivery trouble loses INTR_SOFI too... */
293 admhc_warn(ahcd
, "IRQ INTR_SOFI lossage\n");
296 spin_unlock_irqrestore(&ahcd
->lock
, flags
);
297 schedule_timeout_uninterruptible(1);
299 case ED_IDLE
: /* fully unlinked */
300 if (list_empty(&ed
->td_list
)) {
301 td_free(ahcd
, ed
->dummy
);
305 /* else FALL THROUGH */
307 /* caller was supposed to have unlinked any requests;
308 * that's not our job. can't recover; must leak ed.
310 admhc_err(ahcd
, "leak ed %p (#%02x) state %d%s\n",
311 ed
, ep
->desc
.bEndpointAddress
, ed
->state
,
312 list_empty(&ed
->td_list
) ? "" : " (has tds)");
313 td_free(ahcd
, ed
->dummy
);
319 spin_unlock_irqrestore(&ahcd
->lock
, flags
);
322 static int admhc_get_frame_number(struct usb_hcd
*hcd
)
324 struct admhcd
*ahcd
= hcd_to_admhcd(hcd
);
326 return admhc_frame_no(ahcd
);
329 static void admhc_usb_reset(struct admhcd
*ahcd
)
332 ahcd
->hc_control
= admhc_readl(ahcd
, &ahcd
->regs
->control
);
333 ahcd
->hc_control
&= OHCI_CTRL_RWC
;
334 admhc_writel(ahcd
, ahcd
->hc_control
, &ahcd
->regs
->control
);
337 ahcd
->host_control
= ADMHC_BUSS_RESET
;
338 admhc_writel(ahcd
, ahcd
->host_control
, &ahcd
->regs
->host_control
);
342 /* admhc_shutdown forcibly disables IRQs and DMA, helping kexec and
343 * other cases where the next software may expect clean state from the
344 * "firmware". this is bus-neutral, unlike shutdown() methods.
347 admhc_shutdown(struct usb_hcd
*hcd
)
351 ahcd
= hcd_to_admhcd(hcd
);
352 admhc_intr_disable(ahcd
, ADMHC_INTR_MIE
);
353 admhc_dma_disable(ahcd
);
354 admhc_usb_reset(ahcd
);
355 /* flush the writes */
356 admhc_writel_flush(ahcd
);
359 /*-------------------------------------------------------------------------*
361 *-------------------------------------------------------------------------*/
363 static void admhc_eds_cleanup(struct admhcd
*ahcd
)
365 if (ahcd
->ed_tails
[PIPE_INTERRUPT
]) {
366 ed_free(ahcd
, ahcd
->ed_tails
[PIPE_INTERRUPT
]);
367 ahcd
->ed_tails
[PIPE_INTERRUPT
] = NULL
;
370 if (ahcd
->ed_tails
[PIPE_ISOCHRONOUS
]) {
371 ed_free(ahcd
, ahcd
->ed_tails
[PIPE_ISOCHRONOUS
]);
372 ahcd
->ed_tails
[PIPE_ISOCHRONOUS
] = NULL
;
375 if (ahcd
->ed_tails
[PIPE_CONTROL
]) {
376 ed_free(ahcd
, ahcd
->ed_tails
[PIPE_CONTROL
]);
377 ahcd
->ed_tails
[PIPE_CONTROL
] = NULL
;
380 if (ahcd
->ed_tails
[PIPE_BULK
]) {
381 ed_free(ahcd
, ahcd
->ed_tails
[PIPE_BULK
]);
382 ahcd
->ed_tails
[PIPE_BULK
] = NULL
;
385 ahcd
->ed_head
= NULL
;
388 #define ED_DUMMY_INFO (ED_SPEED_FULL | ED_SKIP)
390 static int admhc_eds_init(struct admhcd
*ahcd
)
394 ed
= ed_create(ahcd
, PIPE_INTERRUPT
, ED_DUMMY_INFO
);
398 ahcd
->ed_tails
[PIPE_INTERRUPT
] = ed
;
400 ed
= ed_create(ahcd
, PIPE_ISOCHRONOUS
, ED_DUMMY_INFO
);
404 ahcd
->ed_tails
[PIPE_ISOCHRONOUS
] = ed
;
405 ed
->ed_prev
= ahcd
->ed_tails
[PIPE_INTERRUPT
];
406 ahcd
->ed_tails
[PIPE_INTERRUPT
]->ed_next
= ed
;
407 ahcd
->ed_tails
[PIPE_INTERRUPT
]->hwNextED
= cpu_to_hc32(ahcd
, ed
->dma
);
409 ed
= ed_create(ahcd
, PIPE_CONTROL
, ED_DUMMY_INFO
);
413 ahcd
->ed_tails
[PIPE_CONTROL
] = ed
;
414 ed
->ed_prev
= ahcd
->ed_tails
[PIPE_ISOCHRONOUS
];
415 ahcd
->ed_tails
[PIPE_ISOCHRONOUS
]->ed_next
= ed
;
416 ahcd
->ed_tails
[PIPE_ISOCHRONOUS
]->hwNextED
= cpu_to_hc32(ahcd
, ed
->dma
);
418 ed
= ed_create(ahcd
, PIPE_BULK
, ED_DUMMY_INFO
);
422 ahcd
->ed_tails
[PIPE_BULK
] = ed
;
423 ed
->ed_prev
= ahcd
->ed_tails
[PIPE_CONTROL
];
424 ahcd
->ed_tails
[PIPE_CONTROL
]->ed_next
= ed
;
425 ahcd
->ed_tails
[PIPE_CONTROL
]->hwNextED
= cpu_to_hc32(ahcd
, ed
->dma
);
427 ahcd
->ed_head
= ahcd
->ed_tails
[PIPE_INTERRUPT
];
429 #ifdef ADMHC_VERBOSE_DEBUG
430 admhc_dump_ed(ahcd
, "ed intr", ahcd
->ed_tails
[PIPE_INTERRUPT
], 1);
431 admhc_dump_ed(ahcd
, "ed isoc", ahcd
->ed_tails
[PIPE_ISOCHRONOUS
], 1);
432 admhc_dump_ed(ahcd
, "ed ctrl", ahcd
->ed_tails
[PIPE_CONTROL
], 1);
433 admhc_dump_ed(ahcd
, "ed bulk", ahcd
->ed_tails
[PIPE_BULK
], 1);
439 admhc_eds_cleanup(ahcd
);
443 /* init memory, and kick BIOS/SMM off */
445 static int admhc_init(struct admhcd
*ahcd
)
447 struct usb_hcd
*hcd
= admhcd_to_hcd(ahcd
);
451 ahcd
->regs
= hcd
->regs
;
453 /* Disable HC interrupts */
454 admhc_intr_disable(ahcd
, ADMHC_INTR_MIE
);
456 /* Read the number of ports unless overridden */
457 if (ahcd
->num_ports
== 0)
458 ahcd
->num_ports
= admhc_read_rhdesc(ahcd
) & ADMHC_RH_NUMP
;
460 ret
= admhc_mem_init(ahcd
);
464 /* init dummy endpoints */
465 ret
= admhc_eds_init(ahcd
);
469 create_debug_files(ahcd
);
478 /*-------------------------------------------------------------------------*/
480 /* Start an OHCI controller, set the BUS operational
481 * resets USB and controller
484 static int admhc_run(struct admhcd
*ahcd
)
487 int first
= ahcd
->fminterval
== 0;
488 struct usb_hcd
*hcd
= admhcd_to_hcd(ahcd
);
492 /* boot firmware should have set this up (5.1.1.3.1) */
494 val
= admhc_readl(ahcd
, &ahcd
->regs
->fminterval
);
495 ahcd
->fminterval
= val
& ADMHC_SFI_FI_MASK
;
496 if (ahcd
->fminterval
!= FI
)
497 admhc_dbg(ahcd
, "fminterval delta %d\n",
498 ahcd
->fminterval
- FI
);
500 (FSLDP(ahcd
->fminterval
) << ADMHC_SFI_FSLDP_SHIFT
);
501 /* also: power/overcurrent flags in rhdesc */
504 #if 0 /* TODO: not applicable */
505 /* Reset USB nearly "by the book". RemoteWakeupConnected has
506 * to be checked in case boot firmware (BIOS/SMM/...) has set up
507 * wakeup in a way the bus isn't aware of (e.g., legacy PCI PM).
508 * If the bus glue detected wakeup capability then it should
509 * already be enabled; if so we'll just enable it again.
511 if ((ahcd
->hc_control
& OHCI_CTRL_RWC
) != 0)
512 device_set_wakeup_capable(hcd
->self
.controller
, 1);
515 switch (ahcd
->host_control
& ADMHC_HC_BUSS
) {
516 case ADMHC_BUSS_OPER
:
519 case ADMHC_BUSS_SUSPEND
:
521 case ADMHC_BUSS_RESUME
:
522 ahcd
->host_control
= ADMHC_BUSS_RESUME
;
523 val
= 10 /* msec wait */;
525 /* case ADMHC_BUSS_RESET: */
527 ahcd
->host_control
= ADMHC_BUSS_RESET
;
528 val
= 50 /* msec wait */;
531 admhc_writel(ahcd
, ahcd
->host_control
, &ahcd
->regs
->host_control
);
533 /* flush the writes */
534 admhc_writel_flush(ahcd
);
537 val
= admhc_read_rhdesc(ahcd
);
538 if (!(val
& ADMHC_RH_NPS
)) {
539 /* power down each port */
540 for (val
= 0; val
< ahcd
->num_ports
; val
++)
541 admhc_write_portstatus(ahcd
, val
, ADMHC_PS_CPP
);
543 /* flush those writes */
544 admhc_writel_flush(ahcd
);
546 /* 2msec timelimit here means no irqs/preempt */
547 spin_lock_irq(&ahcd
->lock
);
549 admhc_writel(ahcd
, ADMHC_CTRL_SR
, &ahcd
->regs
->gencontrol
);
550 val
= 30; /* ... allow extra time */
551 while ((admhc_readl(ahcd
, &ahcd
->regs
->gencontrol
) & ADMHC_CTRL_SR
) != 0) {
553 spin_unlock_irq(&ahcd
->lock
);
554 admhc_err(ahcd
, "USB HC reset timed out!\n");
560 /* enable HOST mode, before access any host specific register */
561 admhc_writel(ahcd
, ADMHC_CTRL_UHFE
, &ahcd
->regs
->gencontrol
);
563 /* Tell the controller where the descriptor list is */
564 admhc_writel(ahcd
, (u32
)ahcd
->ed_head
->dma
, &ahcd
->regs
->hosthead
);
566 periodic_reinit(ahcd
);
568 /* use rhsc irqs after khubd is fully initialized */
569 set_bit(HCD_FLAG_POLL_RH
, &hcd
->flags
);
570 hcd
->uses_new_polling
= 1;
573 /* wake on ConnectStatusChange, matching external hubs */
574 admhc_writel(ahcd
, RH_HS_DRWE
, &ahcd
->regs
->roothub
.status
);
576 /* FIXME roothub_write_status (ahcd, ADMHC_RH_DRWE); */
579 /* Choose the interrupts we care about now, others later on demand */
580 admhc_intr_ack(ahcd
, ~0);
581 admhc_intr_enable(ahcd
, ADMHC_INTR_INIT
);
583 admhc_writel(ahcd
, ADMHC_RH_NPS
| ADMHC_RH_LPSC
, &ahcd
->regs
->rhdesc
);
585 /* flush those writes */
586 admhc_writel_flush(ahcd
);
588 /* start controller operations */
589 ahcd
->host_control
= ADMHC_BUSS_OPER
;
590 admhc_writel(ahcd
, ahcd
->host_control
, &ahcd
->regs
->host_control
);
593 while ((admhc_readl(ahcd
, &ahcd
->regs
->host_control
)
594 & ADMHC_HC_BUSS
) != ADMHC_BUSS_OPER
) {
596 spin_unlock_irq(&ahcd
->lock
);
597 admhc_err(ahcd
, "unable to setup operational mode!\n");
603 hcd
->state
= HC_STATE_RUNNING
;
605 ahcd
->next_statechange
= jiffies
+ STATECHANGE_DELAY
;
608 /* FIXME: enabling DMA is always failed here for an unknown reason */
609 admhc_dma_enable(ahcd
);
612 while ((admhc_readl(ahcd
, &ahcd
->regs
->host_control
)
613 & ADMHC_HC_DMAE
) != ADMHC_HC_DMAE
) {
615 spin_unlock_irq(&ahcd
->lock
);
616 admhc_err(ahcd
, "unable to enable DMA!\n");
625 spin_unlock_irq(&ahcd
->lock
);
627 mdelay(ADMHC_POTPGT
);
632 /*-------------------------------------------------------------------------*/
634 /* an interrupt happens */
636 static irqreturn_t
admhc_irq(struct usb_hcd
*hcd
)
638 struct admhcd
*ahcd
= hcd_to_admhcd(hcd
);
639 struct admhcd_regs __iomem
*regs
= ahcd
->regs
;
642 ints
= admhc_readl(ahcd
, ®s
->int_status
);
643 if ((ints
& ADMHC_INTR_INTA
) == 0) {
644 /* no unmasked interrupt status is set */
648 ints
&= admhc_readl(ahcd
, ®s
->int_enable
);
650 if (ints
& ADMHC_INTR_FATI
) {
651 /* e.g. due to PCI Master/Target Abort */
653 admhc_err(ahcd
, "Fatal Error, controller disabled\n");
655 admhc_usb_reset(ahcd
);
658 if (ints
& ADMHC_INTR_BABI
) {
659 admhc_intr_disable(ahcd
, ADMHC_INTR_BABI
);
660 admhc_intr_ack(ahcd
, ADMHC_INTR_BABI
);
661 admhc_err(ahcd
, "Babble Detected\n");
664 if (ints
& ADMHC_INTR_INSM
) {
665 admhc_vdbg(ahcd
, "Root Hub Status Change\n");
666 ahcd
->next_statechange
= jiffies
+ STATECHANGE_DELAY
;
667 admhc_intr_ack(ahcd
, ADMHC_INTR_RESI
| ADMHC_INTR_INSM
);
669 /* NOTE: Vendors didn't always make the same implementation
670 * choices for RHSC. Many followed the spec; RHSC triggers
671 * on an edge, like setting and maybe clearing a port status
672 * change bit. With others it's level-triggered, active
673 * until khubd clears all the port status change bits. We'll
674 * always disable it here and rely on polling until khubd
677 admhc_intr_disable(ahcd
, ADMHC_INTR_INSM
);
678 usb_hcd_poll_rh_status(hcd
);
679 } else if (ints
& ADMHC_INTR_RESI
) {
680 /* For connect and disconnect events, we expect the controller
681 * to turn on RHSC along with RD. But for remote wakeup events
682 * this might not happen.
684 admhc_vdbg(ahcd
, "Resume Detect\n");
685 admhc_intr_ack(ahcd
, ADMHC_INTR_RESI
);
686 set_bit(HCD_FLAG_POLL_RH
, &hcd
->flags
);
687 if (ahcd
->autostop
) {
688 spin_lock(&ahcd
->lock
);
689 admhc_rh_resume(ahcd
);
690 spin_unlock(&ahcd
->lock
);
692 usb_hcd_resume_root_hub(hcd
);
695 if (ints
& ADMHC_INTR_TDC
) {
696 admhc_vdbg(ahcd
, "Transfer Descriptor Complete\n");
697 admhc_intr_ack(ahcd
, ADMHC_INTR_TDC
);
698 if (HC_IS_RUNNING(hcd
->state
))
699 admhc_intr_disable(ahcd
, ADMHC_INTR_TDC
);
700 spin_lock(&ahcd
->lock
);
701 admhc_td_complete(ahcd
);
702 spin_unlock(&ahcd
->lock
);
703 if (HC_IS_RUNNING(hcd
->state
))
704 admhc_intr_enable(ahcd
, ADMHC_INTR_TDC
);
707 if (ints
& ADMHC_INTR_SO
) {
708 /* could track INTR_SO to reduce available PCI/... bandwidth */
709 admhc_vdbg(ahcd
, "Schedule Overrun\n");
713 spin_lock(&ahcd
->lock
);
714 if (ahcd
->ed_rm_list
)
715 finish_unlinks(ahcd
, admhc_frame_no(ahcd
));
717 if ((ints
& ADMHC_INTR_SOFI
) != 0 && !ahcd
->ed_rm_list
718 && HC_IS_RUNNING(hcd
->state
))
719 admhc_intr_disable(ahcd
, ADMHC_INTR_SOFI
);
720 spin_unlock(&ahcd
->lock
);
722 if (ints
& ADMHC_INTR_SOFI
) {
723 admhc_vdbg(ahcd
, "Start Of Frame\n");
724 spin_lock(&ahcd
->lock
);
726 /* handle any pending ED removes */
727 finish_unlinks(ahcd
, admhc_frameno(ahcd
));
729 /* leaving INTR_SOFI enabled when there's still unlinking
730 * to be done in the (next frame).
732 if ((ahcd
->ed_rm_list
== NULL
) ||
733 HC_IS_RUNNING(hcd
->state
) == 0)
735 * disable INTR_SOFI if there are no unlinking to be
736 * done (in the next frame)
738 admhc_intr_disable(ahcd
, ADMHC_INTR_SOFI
);
740 spin_unlock(&ahcd
->lock
);
744 if (HC_IS_RUNNING(hcd
->state
)) {
745 admhc_intr_ack(ahcd
, ints
);
746 admhc_intr_enable(ahcd
, ADMHC_INTR_MIE
);
747 admhc_writel_flush(ahcd
);
753 /*-------------------------------------------------------------------------*/
755 static void admhc_stop(struct usb_hcd
*hcd
)
757 struct admhcd
*ahcd
= hcd_to_admhcd(hcd
);
761 flush_scheduled_work();
763 admhc_usb_reset(ahcd
);
764 admhc_intr_disable(ahcd
, ADMHC_INTR_MIE
);
766 free_irq(hcd
->irq
, hcd
);
769 remove_debug_files(ahcd
);
770 admhc_eds_cleanup(ahcd
);
771 admhc_mem_cleanup(ahcd
);
774 /*-------------------------------------------------------------------------*/
776 #ifdef CONFIG_ADM5120
777 #include "adm5120-drv.c"
778 #define PLATFORM_DRIVER usb_hcd_adm5120_driver
781 #if !defined(PLATFORM_DRIVER)
782 #error "missing bus glue for admhc-hcd"
785 #define DRIVER_INFO DRIVER_DESC " version " DRIVER_VERSION
787 static int __init
admhc_hcd_mod_init(void)
794 pr_info("%s: " DRIVER_INFO
"\n", hcd_name
);
795 pr_info("%s: block sizes: ed %Zd td %Zd\n", hcd_name
,
796 sizeof(struct ed
), sizeof(struct td
));
797 set_bit(USB_OHCI_LOADED
, &usb_hcds_loaded
);
800 admhc_debug_root
= debugfs_create_dir("admhc", usb_debug_root
);
801 if (!admhc_debug_root
) {
807 #ifdef PLATFORM_DRIVER
808 ret
= platform_driver_register(&PLATFORM_DRIVER
);
815 #ifdef PLATFORM_DRIVER
816 platform_driver_unregister(&PLATFORM_DRIVER
);
821 debugfs_remove(admhc_debug_root
);
822 admhc_debug_root
= NULL
;
825 clear_bit(USB_OHCI_LOADED
, &usb_hcds_loaded
);
828 module_init(admhc_hcd_mod_init
);
830 static void __exit
admhc_hcd_mod_exit(void)
832 platform_driver_unregister(&PLATFORM_DRIVER
);
834 debugfs_remove(admhc_debug_root
);
836 clear_bit(USB_OHCI_LOADED
, &usb_hcds_loaded
);
838 module_exit(admhc_hcd_mod_exit
);
840 MODULE_AUTHOR(DRIVER_AUTHOR
);
841 MODULE_DESCRIPTION(DRIVER_INFO
);
842 MODULE_VERSION(DRIVER_VERSION
);
843 MODULE_LICENSE("GPL v2");