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minor usb driver cleanup
[openwrt/staging/wigyori.git] / target / linux / adm5120-2.6 / files / drivers / usb / host / adm5120-hcd.c
1 /*
2 * HCD driver for ADM5120 SoC
3 *
4 * Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
5 *
6 * Based on the ADMtek 2.4 driver
7 * (C) Copyright 2003 Junius Chen <juniusc@admtek.com.tw>
8 * Which again was based on the ohci and uhci drivers.
9 */
10
11 #include <linux/module.h>
12 #include <linux/delay.h>
13 #include <linux/debugfs.h>
14 #include <linux/seq_file.h>
15 #include <linux/errno.h>
16 #include <linux/init.h>
17 #include <linux/list.h>
18 #include <linux/usb.h>
19 #include <linux/platform_device.h>
20
21 #include <asm/bootinfo.h>
22 #include <asm/io.h>
23 #include <asm/irq.h>
24 #include <asm/system.h>
25 #include <asm/byteorder.h>
26 #include <asm/mach-adm5120/adm5120_info.h>
27
28 #include "../core/hcd.h"
29
30 MODULE_DESCRIPTION("ADM5120 USB Host Controller Driver");
31 MODULE_LICENSE("GPL");
32 MODULE_AUTHOR("Jeroen Vreeken (pe1rxq@amsat.org)");
33
34 #define PFX "adm5120-hcd: "
35
36 #define ADMHCD_REG_CONTROL 0x00
37 #define ADMHCD_SW_RESET 0x00000008 /* Reset */
38 #define ADMHCD_DMAA 0x00000004 /* DMA arbitration control */
39 #define ADMHCD_SW_INTREQ 0x00000002 /* request software int */
40 #define ADMHCD_HOST_EN 0x00000001 /* Host enable */
41 #define ADMHCD_REG_INTSTATUS 0x04
42 #define ADMHCD_INT_ACT 0x80000000 /* Interrupt active */
43 #define ADMHCD_INT_FATAL 0x40000000 /* Fatal interrupt */
44 #define ADMHCD_INT_SW 0x20000000 /* software interrupt */
45 #define ADMHCD_INT_TD 0x00100000 /* TD completed */
46 #define ADMHCD_FNO 0x00000800 /* Frame number overaflow */
47 #define ADMHCD_SO 0x00000400 /* Scheduling overrun */
48 #define ADMHCD_INSMI 0x00000200 /* Root hub status change */
49 #define ADMHCD_BABI 0x00000100 /* Babble detected, host mode */
50 #define ADMHCD_RESI 0x00000020 /* Resume detected */
51 #define ADMHCD_SOFI 0x00000010 /* SOF transmitted/received, host mode */
52 #define ADMHCD_REG_INTENABLE 0x08
53 #define ADMHCD_INT_EN 0x80000000 /* Interrupt enable */
54 #define ADMHCD_INTMASK 0x00000001 /* Interrupt mask */
55 #define ADMHCD_REG_HOSTCONTROL 0x10
56 #define ADMHCD_DMA_EN 0x00000004 /* USB host DMA enable */
57 #define ADMHCD_STATE_MASK 0x00000003
58 #define ADMHCD_STATE_RST 0x00000000 /* bus state reset */
59 #define ADMHCD_STATE_RES 0x00000001 /* bus state resume */
60 #define ADMHCD_STATE_OP 0x00000002 /* bus state operational */
61 #define ADMHCD_STATE_SUS 0x00000003 /* bus state suspended */
62 #define ADMHCD_REG_FMINTERVAL 0x18
63 #define ADMHCD_REG_FMNUMBER 0x1c
64 #define ADMHCD_REG_LSTHRESH 0x70
65 #define ADMHCD_REG_RHDESCR 0x74
66 #define ADMHCD_CRWE 0x20000000 /* Clear wakeup enable */
67 #define ADMHCD_DRWE 0x10000000 /* Device remote wakeup enable */
68 #define ADMHCD_HW_OCIC 0x08000000 /* Over current indication change */
69 #define ADMHCD_LPSC 0x04000000 /* Local power switch change */
70 #define ADMHCD_OCI 0x02000000 /* Over current indication */
71 #define ADMHCD_LPS 0x01000000 /* Local power switch/global power switch */
72 #define ADMHCD_NOCP 0x00000800 /* No over current protect mode */
73 #define ADMHCD_OPCM 0x00000400 /* Over current protect mode */
74 #define ADMHCD_NPS 0x00000200 /* No Power Switch */
75 #define ADMHCD_PSM 0x00000100 /* Power switch mode */
76 #define ADMHCD_REG_PORTSTATUS0 0x78
77 #define ADMHCD_CCS 0x00000001 /* current connect status */
78 #define ADMHCD_PES 0x00000002 /* port enable status */
79 #define ADMHCD_PSS 0x00000004 /* port suspend status */
80 #define ADMHCD_POCI 0x00000008 /* port overcurrent indicator */
81 #define ADMHCD_PRS 0x00000010 /* port reset status */
82 #define ADMHCD_PPS 0x00000100 /* port power status */
83 #define ADMHCD_LSDA 0x00000200 /* low speed device attached */
84 #define ADMHCD_CSC 0x00010000 /* connect status change */
85 #define ADMHCD_PESC 0x00020000 /* enable status change */
86 #define ADMHCD_PSSC 0x00040000 /* suspend status change */
87 #define ADMHCD_OCIC 0x00080000 /* overcurrent change*/
88 #define ADMHCD_PRSC 0x00100000 /* reset status change */
89 #define ADMHCD_REG_PORTSTATUS1 0x7c
90 #define ADMHCD_REG_HOSTHEAD 0x80
91
92 #define ADMHCD_NUMPORTS 2
93
94 struct admhcd_ed {
95 /* Don't change first four, they used for DMA */
96 u32 control;
97 struct admhcd_td *tail;
98 struct admhcd_td *head;
99 struct admhcd_ed *next;
100 /* the rest is for the driver only: */
101 struct admhcd_td *cur;
102 struct usb_host_endpoint *ep;
103 struct urb *urb;
104 struct admhcd_ed *real;
105 } __attribute__ ((packed));
106
107 #define ADMHCD_ED_EPSHIFT 7 /* Shift for endpoint number */
108 #define ADMHCD_ED_INT 0x00000800 /* Is this an int endpoint */
109 #define ADMHCD_ED_SPEED 0x00002000 /* Is it a high speed dev? */
110 #define ADMHCD_ED_SKIP 0x00004000 /* Skip this ED */
111 #define ADMHCD_ED_FORMAT 0x00008000 /* Is this an isoc endpoint */
112 #define ADMHCD_ED_MAXSHIFT 16 /* Shift for max packet size */
113
114 struct admhcd_td {
115 /* Don't change first four, they are used for DMA */
116 u32 control;
117 u32 buffer;
118 u32 buflen;
119 struct admhcd_td *next;
120 /* the rest is for the driver only: */
121 struct urb *urb;
122 struct admhcd_td *real;
123 } __attribute__ ((packed));
124
125 #define ADMHCD_TD_OWN 0x80000000
126 #define ADMHCD_TD_TOGGLE 0x00000000
127 #define ADMHCD_TD_DATA0 0x01000000
128 #define ADMHCD_TD_DATA1 0x01800000
129 #define ADMHCD_TD_OUT 0x00200000
130 #define ADMHCD_TD_IN 0x00400000
131 #define ADMHCD_TD_SETUP 0x00000000
132 #define ADMHCD_TD_ISO 0x00010000
133 #define ADMHCD_TD_R 0x00040000
134 #define ADMHCD_TD_INTEN 0x00010000
135
136 static int admhcd_td_err[16] = {
137 0, /* No */
138 -EREMOTEIO, /* CRC */
139 -EREMOTEIO, /* bit stuff */
140 -EREMOTEIO, /* data toggle */
141 -EPIPE, /* stall */
142 -ETIMEDOUT, /* timeout */
143 -EPROTO, /* pid err */
144 -EPROTO, /* unexpected pid */
145 -EREMOTEIO, /* data overrun */
146 -EREMOTEIO, /* data underrun */
147 -ETIMEDOUT, /* 1010 */
148 -ETIMEDOUT, /* 1011 */
149 -EREMOTEIO, /* buffer overrun */
150 -EREMOTEIO, /* buffer underrun */
151 -ETIMEDOUT, /* 1110 */
152 -ETIMEDOUT, /* 1111 */
153 };
154
155 #define ADMHCD_TD_ERRMASK 0x38000000
156 #define ADMHCD_TD_ERRSHIFT 27
157
158 #define TD(td) ((struct admhcd_td *)(((u32)(td)) & ~0xf))
159 #define ED(ed) ((struct admhcd_ed *)(((u32)(ed)) & ~0xf))
160
161 struct admhcd {
162 spinlock_t lock;
163
164 void __iomem *data_reg;
165 /* Root hub registers */
166 u32 rhdesca;
167 u32 rhdescb;
168 u32 rhstatus;
169 u32 rhport[2];
170
171 /* async schedule: control, bulk */
172 struct list_head async;
173 u32 base;
174 u32 dma_en;
175 unsigned long flags;
176
177 };
178
179 static inline struct admhcd *hcd_to_admhcd(struct usb_hcd *hcd)
180 {
181 return (struct admhcd *)(hcd->hcd_priv);
182 }
183
184 static inline struct usb_hcd *admhcd_to_hcd(struct admhcd *admhcd)
185 {
186 return container_of((void *)admhcd, struct usb_hcd, hcd_priv);
187 }
188
189 static char hcd_name[] = "adm5120-hcd";
190
191 static u32 admhcd_reg_get(struct admhcd *ahcd, int reg)
192 {
193 return *(volatile u32 *)KSEG1ADDR(ahcd->base+reg);
194 }
195
196 static void admhcd_reg_set(struct admhcd *ahcd, int reg, u32 val)
197 {
198 *(volatile u32 *)KSEG1ADDR(ahcd->base+reg) = val;
199 }
200
201 static void admhcd_lock(struct admhcd *ahcd)
202 {
203 spin_lock_irqsave(&ahcd->lock, ahcd->flags);
204 ahcd->dma_en = admhcd_reg_get(ahcd, ADMHCD_REG_HOSTCONTROL) &
205 ADMHCD_DMA_EN;
206 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTCONTROL, ADMHCD_STATE_OP);
207 }
208
209 static void admhcd_unlock(struct admhcd *ahcd)
210 {
211 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTCONTROL,
212 ADMHCD_STATE_OP | ahcd->dma_en);
213 spin_unlock_irqrestore(&ahcd->lock, ahcd->flags);
214 }
215
216 static struct admhcd_td *admhcd_td_alloc(struct admhcd_ed *ed, struct urb *urb)
217 {
218 struct admhcd_td *tdn, *td;
219
220 tdn = kzalloc(sizeof(*tdn), GFP_ATOMIC);
221 if (!tdn)
222 return NULL;
223
224 tdn->real = tdn;
225 tdn = (struct admhcd_td *)KSEG1ADDR(tdn);
226 if (ed->cur == NULL) {
227 ed->cur = tdn;
228 ed->head = tdn;
229 ed->tail = tdn;
230 td = tdn;
231 } else {
232 /* Supply back the old tail and link in new td as tail */
233 td = TD(ed->tail);
234 TD(ed->tail)->next = tdn;
235 ed->tail = tdn;
236 }
237 td->urb = urb;
238
239 return td;
240 }
241
242 static void admhcd_td_free(struct admhcd_ed *ed, struct urb *urb)
243 {
244 struct admhcd_td *td, **tdp;
245
246 if (urb == NULL)
247 ed->control |= ADMHCD_ED_SKIP;
248 tdp = &ed->cur;
249 td = ed->cur;
250 do {
251 if (td->urb == urb)
252 break;
253 tdp = &td->next;
254 td = TD(td->next);
255 } while (td);
256 while (td && td->urb == urb) {
257 *tdp = TD(td->next);
258 kfree(td->real);
259 td = *tdp;
260 }
261 }
262
263 /* Find an endpoint's descriptor, if needed allocate a new one and link it
264 in the DMA chain
265 */
266 static struct admhcd_ed *admhcd_get_ed(struct admhcd *ahcd,
267 struct usb_host_endpoint *ep, struct urb *urb)
268 {
269 struct admhcd_ed *hosthead;
270 struct admhcd_ed *found = NULL, *ed = NULL;
271 unsigned int pipe = urb->pipe;
272
273 admhcd_lock(ahcd);
274 hosthead = (struct admhcd_ed *)admhcd_reg_get(ahcd, ADMHCD_REG_HOSTHEAD);
275 if (hosthead) {
276 for (ed = hosthead;; ed = ED(ed->next)) {
277 if (ed->ep == ep) {
278 found = ed;
279 break;
280 }
281 if (ED(ed->next) == hosthead)
282 break;
283 }
284 }
285 if (!found) {
286 found = kzalloc(sizeof(*found), GFP_ATOMIC);
287 if (!found)
288 goto out;
289 found->real = found;
290 found->ep = ep;
291 found = (struct admhcd_ed *)KSEG1ADDR(found);
292 found->control = usb_pipedevice(pipe) |
293 (usb_pipeendpoint(pipe) << ADMHCD_ED_EPSHIFT) |
294 (usb_pipeint(pipe) ? ADMHCD_ED_INT : 0) |
295 (urb->dev->speed == USB_SPEED_FULL ? ADMHCD_ED_SPEED : 0) |
296 (usb_pipeisoc(pipe) ? ADMHCD_ED_FORMAT : 0) |
297 (usb_maxpacket(urb->dev, pipe, usb_pipeout(pipe)) << ADMHCD_ED_MAXSHIFT);
298 /* Alloc first dummy td */
299 admhcd_td_alloc(found, NULL);
300 if (hosthead) {
301 found->next = hosthead;
302 ed->next = found;
303 } else {
304 found->next = found;
305 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, (u32)found);
306 }
307 }
308 out:
309 admhcd_unlock(ahcd);
310 return found;
311 }
312
313 static struct admhcd_td *admhcd_td_fill(u32 control, struct admhcd_td *td,
314 dma_addr_t data, int len)
315 {
316 td->buffer = data;
317 td->buflen = len;
318 td->control = control;
319 return TD(td->next);
320 }
321
322 static void admhcd_ed_start(struct admhcd *ahcd, struct admhcd_ed *ed)
323 {
324 struct admhcd_td *td = ed->cur;
325
326 if (ed->urb)
327 return;
328 if (td->urb) {
329 ed->urb = td->urb;
330 while (1) {
331 td->control |= ADMHCD_TD_OWN;
332 if (TD(td->next)->urb != td->urb) {
333 td->buflen |= ADMHCD_TD_INTEN;
334 break;
335 }
336 td = TD(td->next);
337 }
338 }
339 ed->head = TD(ed->head);
340 ahcd->dma_en |= ADMHCD_DMA_EN;
341 }
342
343 static irqreturn_t admhcd_irq(struct usb_hcd *hcd)
344 {
345 struct admhcd *ahcd = hcd_to_admhcd(hcd);
346 u32 intstatus;
347
348 intstatus = admhcd_reg_get(ahcd, ADMHCD_REG_INTSTATUS);
349 if (intstatus & ADMHCD_INT_FATAL) {
350 admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_FATAL);
351 /* FIXME: handle fatal interrupts */
352 }
353
354 if (intstatus & ADMHCD_INT_SW) {
355 admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_SW);
356 /* FIXME: handle software interrupts */
357 }
358
359 if (intstatus & ADMHCD_INT_TD) {
360 struct admhcd_ed *ed, *head;
361
362 admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_TD);
363
364 head = (struct admhcd_ed *)admhcd_reg_get(ahcd, ADMHCD_REG_HOSTHEAD);
365 ed = head;
366 if (ed) do {
367 /* Is it a finished TD? */
368 if (ed->urb && !(ed->cur->control & ADMHCD_TD_OWN)) {
369 struct admhcd_td *td;
370 int error;
371
372 td = ed->cur;
373 error = (td->control & ADMHCD_TD_ERRMASK) >>
374 ADMHCD_TD_ERRSHIFT;
375 ed->urb->status = admhcd_td_err[error];
376 admhcd_td_free(ed, ed->urb);
377 // Calculate real length!!!
378 ed->urb->actual_length = ed->urb->transfer_buffer_length;
379 ed->urb->hcpriv = NULL;
380 usb_hcd_giveback_urb(hcd, ed->urb);
381 ed->urb = NULL;
382 }
383 admhcd_ed_start(ahcd, ed);
384 ed = ED(ed->next);
385 } while (ed != head);
386 }
387
388 return IRQ_HANDLED;
389 }
390
391 static int admhcd_urb_enqueue(struct usb_hcd *hcd, struct usb_host_endpoint *ep,
392 struct urb *urb, gfp_t mem_flags)
393 {
394 struct admhcd *ahcd = hcd_to_admhcd(hcd);
395 struct admhcd_ed *ed;
396 struct admhcd_td *td;
397 int size = 0, i, zero = 0, ret = 0;
398 unsigned int pipe = urb->pipe, toggle = 0;
399 dma_addr_t data = (dma_addr_t)urb->transfer_buffer;
400 int data_len = urb->transfer_buffer_length;
401
402 ed = admhcd_get_ed(ahcd, ep, urb);
403 if (!ed)
404 return -ENOMEM;
405
406 switch(usb_pipetype(pipe)) {
407 case PIPE_CONTROL:
408 size = 2;
409 case PIPE_INTERRUPT:
410 case PIPE_BULK:
411 default:
412 size += urb->transfer_buffer_length / 4096;
413 if (urb->transfer_buffer_length % 4096)
414 size++;
415 if (size == 0)
416 size++;
417 else if (urb->transfer_flags & URB_ZERO_PACKET &&
418 !(urb->transfer_buffer_length %
419 usb_maxpacket(urb->dev, pipe, usb_pipeout(pipe)))) {
420 size++;
421 zero = 1;
422 }
423 break;
424 case PIPE_ISOCHRONOUS:
425 size = urb->number_of_packets;
426 break;
427 }
428
429 admhcd_lock(ahcd);
430 /* Remember the first td */
431 td = admhcd_td_alloc(ed, urb);
432 if (!td) {
433 ret = -ENOMEM;
434 goto out;
435 }
436 /* Allocate additionall tds first */
437 for (i = 1; i < size; i++) {
438 if (admhcd_td_alloc(ed, urb) == NULL) {
439 admhcd_td_free(ed, urb);
440 ret = -ENOMEM;
441 goto out;
442 }
443 }
444
445 if (usb_gettoggle(urb->dev, usb_pipeendpoint(pipe), usb_pipeout(pipe)))
446 toggle = ADMHCD_TD_TOGGLE;
447 else {
448 toggle = ADMHCD_TD_DATA0;
449 usb_settoggle(urb->dev, usb_pipeendpoint(pipe),
450 usb_pipeout(pipe), 1);
451 }
452
453 switch(usb_pipetype(pipe)) {
454 case PIPE_CONTROL:
455 td = admhcd_td_fill(ADMHCD_TD_SETUP | ADMHCD_TD_DATA0,
456 td, (dma_addr_t)urb->setup_packet, 8);
457 while (data_len > 0) {
458 td = admhcd_td_fill(ADMHCD_TD_DATA1
459 | ADMHCD_TD_R |
460 (usb_pipeout(pipe) ?
461 ADMHCD_TD_OUT : ADMHCD_TD_IN), td,
462 data, data_len % 4097);
463 data_len -= 4096;
464 }
465 admhcd_td_fill(ADMHCD_TD_DATA1 | (usb_pipeout(pipe) ?
466 ADMHCD_TD_IN : ADMHCD_TD_OUT), td,
467 data, 0);
468 break;
469 case PIPE_INTERRUPT:
470 case PIPE_BULK:
471 //info ok for interrupt?
472 i = 0;
473 while(data_len > 4096) {
474 td = admhcd_td_fill((usb_pipeout(pipe) ?
475 ADMHCD_TD_OUT :
476 ADMHCD_TD_IN | ADMHCD_TD_R) |
477 (i ? ADMHCD_TD_TOGGLE : toggle), td,
478 data, 4096);
479 data += 4096;
480 data_len -= 4096;
481 i++;
482 }
483 td = admhcd_td_fill((usb_pipeout(pipe) ?
484 ADMHCD_TD_OUT : ADMHCD_TD_IN) |
485 (i ? ADMHCD_TD_TOGGLE : toggle), td, data, data_len);
486 i++;
487 if (zero)
488 admhcd_td_fill((usb_pipeout(pipe) ?
489 ADMHCD_TD_OUT : ADMHCD_TD_IN) |
490 (i ? ADMHCD_TD_TOGGLE : toggle), td, 0, 0);
491 break;
492 case PIPE_ISOCHRONOUS:
493 for (i = 0; i < urb->number_of_packets; i++) {
494 td = admhcd_td_fill(ADMHCD_TD_ISO |
495 ((urb->start_frame + i) & 0xffff), td,
496 data + urb->iso_frame_desc[i].offset,
497 urb->iso_frame_desc[i].length);
498 }
499 break;
500 }
501 urb->hcpriv = ed;
502 admhcd_ed_start(ahcd, ed);
503 out:
504 admhcd_unlock(ahcd);
505 return ret;
506 }
507
508 static int admhcd_urb_dequeue(struct usb_hcd *hcd, struct urb *urb)
509 {
510 struct admhcd *ahcd = hcd_to_admhcd(hcd);
511 struct admhcd_ed *ed;
512
513 admhcd_lock(ahcd);
514
515 ed = urb->hcpriv;
516 if (ed && ed->urb != urb)
517 admhcd_td_free(ed, urb);
518
519 admhcd_unlock(ahcd);
520 return 0;
521 }
522
523 static void admhcd_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
524 {
525 struct admhcd *ahcd = hcd_to_admhcd(hcd);
526 struct admhcd_ed *ed, *edt, *head;
527
528 admhcd_lock(ahcd);
529
530 head = (struct admhcd_ed *)admhcd_reg_get(ahcd, ADMHCD_REG_HOSTHEAD);
531 if (!head)
532 goto out;
533 for (ed = head; ED(ed->next) != head; ed = ED(ed->next))
534 if (ed->ep == ep)
535 break;
536 if (ed->ep != ep)
537 goto out;
538 while (ed->cur)
539 admhcd_td_free(ed, ed->cur->urb);
540 if (head == ed) {
541 if (ED(ed->next) == ed) {
542 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, 0);
543 ahcd->dma_en = 0;
544 goto out_free;
545 }
546 head = ED(ed->next);
547 for (edt = head; ED(edt->next) != head; edt = ED(edt->next));
548 edt->next = ED(ed->next);
549 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, (u32)ed->next);
550 goto out_free;
551 }
552 for (edt = head; edt->next != ed; edt = edt->next);
553 edt->next = ed->next;
554
555 out_free:
556 kfree(ed->real);
557 out:
558 admhcd_unlock(ahcd);
559 }
560
561 static int admhcd_get_frame_number(struct usb_hcd *hcd)
562 {
563 struct admhcd *ahcd = hcd_to_admhcd(hcd);
564
565 return admhcd_reg_get(ahcd, ADMHCD_REG_FMNUMBER) & 0x0000ffff;
566 }
567
568 static int admhcd_hub_status_data(struct usb_hcd *hcd, char *buf)
569 {
570 struct admhcd *ahcd = hcd_to_admhcd(hcd);
571 int port;
572
573 *buf = 0;
574 for (port = 0; port < ADMHCD_NUMPORTS; port++) {
575 if (admhcd_reg_get(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4) &
576 (ADMHCD_CSC | ADMHCD_PESC | ADMHCD_PSSC | ADMHCD_OCIC |
577 ADMHCD_PRSC))
578 *buf |= (1 << (port + 1));
579 }
580 return !!*buf;
581 }
582
583 static __u8 root_hub_hub_des[] = {
584 0x09, /* __u8 bLength; */
585 0x29, /* __u8 bDescriptorType; Hub-descriptor */
586 0x02, /* __u8 bNbrPorts; */
587 0x0a, 0x00, /* __u16 wHubCharacteristics; */
588 0x01, /* __u8 bPwrOn2pwrGood; 2ms */
589 0x00, /* __u8 bHubContrCurrent; 0mA */
590 0x00, /* __u8 DeviceRemovable; */
591 0xff, /* __u8 PortPwrCtrlMask; */
592 };
593
594 static int admhcd_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
595 u16 wIndex, char *buf, u16 wLength)
596 {
597 struct admhcd *ahcd = hcd_to_admhcd(hcd);
598 int retval = 0, len;
599 unsigned int port = wIndex -1;
600
601 switch (typeReq) {
602
603 case GetHubStatus:
604 *(__le32 *)buf = cpu_to_le32(0);
605 break;
606 case GetPortStatus:
607 if (port >= ADMHCD_NUMPORTS)
608 goto err;
609 *(__le32 *)buf = cpu_to_le32(
610 admhcd_reg_get(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4));
611 break;
612 case SetHubFeature: /* We don't implement these */
613 case ClearHubFeature:
614 switch (wValue) {
615 case C_HUB_OVER_CURRENT:
616 case C_HUB_LOCAL_POWER:
617 break;
618 default:
619 goto err;
620 }
621 case SetPortFeature:
622 if (port >= ADMHCD_NUMPORTS)
623 goto err;
624
625 switch (wValue) {
626 case USB_PORT_FEAT_SUSPEND:
627 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
628 ADMHCD_PSS);
629 break;
630 case USB_PORT_FEAT_RESET:
631 if (admhcd_reg_get(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4)
632 & ADMHCD_CCS) {
633 admhcd_reg_set(ahcd,
634 ADMHCD_REG_PORTSTATUS0 + port*4,
635 ADMHCD_PRS | ADMHCD_CSC);
636 mdelay(50);
637 admhcd_reg_set(ahcd,
638 ADMHCD_REG_PORTSTATUS0 + port*4,
639 ADMHCD_PES | ADMHCD_CSC);
640 }
641 break;
642 case USB_PORT_FEAT_POWER:
643 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
644 ADMHCD_PPS);
645 break;
646 default:
647 goto err;
648 }
649 break;
650 case ClearPortFeature:
651 if (port >= ADMHCD_NUMPORTS)
652 goto err;
653
654 switch (wValue) {
655 case USB_PORT_FEAT_ENABLE:
656 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
657 ADMHCD_CCS);
658 break;
659 case USB_PORT_FEAT_C_ENABLE:
660 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
661 ADMHCD_PESC);
662 break;
663 case USB_PORT_FEAT_SUSPEND:
664 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
665 ADMHCD_POCI);
666 break;
667 case USB_PORT_FEAT_C_SUSPEND:
668 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
669 ADMHCD_PSSC);
670 case USB_PORT_FEAT_POWER:
671 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
672 ADMHCD_LSDA);
673 break;
674 case USB_PORT_FEAT_C_CONNECTION:
675 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
676 ADMHCD_CSC);
677 break;
678 case USB_PORT_FEAT_C_OVER_CURRENT:
679 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
680 ADMHCD_OCIC);
681 break;
682 case USB_PORT_FEAT_C_RESET:
683 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
684 ADMHCD_PRSC);
685 break;
686 default:
687 goto err;
688 }
689 break;
690 case GetHubDescriptor:
691 len = min_t(unsigned int, sizeof(root_hub_hub_des), wLength);
692 memcpy(buf, root_hub_hub_des, len);
693 break;
694 default:
695 err:
696 retval = -EPIPE;
697 }
698
699 return retval;
700 }
701
702 static int admhcd_start(struct usb_hcd *hcd)
703 {
704 struct admhcd *ahcd = hcd_to_admhcd(hcd);
705 unsigned long flags;
706
707 printk(KERN_DEBUG PFX "calling admhcd_start\n");
708
709 spin_lock_irqsave(&ahcd->lock, flags);
710
711 /* Initialise the HCD registers */
712 admhcd_reg_set(ahcd, ADMHCD_REG_INTENABLE, 0);
713 mdelay(10);
714
715 admhcd_reg_set(ahcd, ADMHCD_REG_CONTROL, ADMHCD_SW_RESET);
716
717 while (admhcd_reg_get(ahcd, ADMHCD_REG_CONTROL) & ADMHCD_SW_RESET) {
718 printk(KERN_WARNING PFX "waiting for reset to complete\n");
719 mdelay(1);
720 }
721
722 hcd->uses_new_polling = 1;
723
724 /* Enable USB host mode */
725 admhcd_reg_set(ahcd, ADMHCD_REG_CONTROL, ADMHCD_HOST_EN);
726
727 /* Set host specific settings */
728 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, 0x00000000);
729 admhcd_reg_set(ahcd, ADMHCD_REG_FMINTERVAL, 0x20002edf);
730 admhcd_reg_set(ahcd, ADMHCD_REG_LSTHRESH, 0x628);
731
732 /* Set interrupts */
733 admhcd_reg_set(ahcd, ADMHCD_REG_INTENABLE, ADMHCD_INT_ACT |
734 ADMHCD_INT_FATAL | ADMHCD_INT_SW | ADMHCD_INT_TD);
735 admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_ACT |
736 ADMHCD_INT_FATAL | ADMHCD_INT_SW | ADMHCD_INT_TD);
737
738 /* Power on all ports */
739 admhcd_reg_set(ahcd, ADMHCD_REG_RHDESCR, ADMHCD_NPS | ADMHCD_LPSC);
740
741 /* HCD is now operationnal */
742 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTCONTROL, ADMHCD_STATE_OP);
743
744 hcd->state = HC_STATE_RUNNING;
745
746 spin_unlock_irqrestore(&ahcd->lock, flags);
747
748 printk(KERN_DEBUG PFX "returning 0 from admhcd_start\n");
749 return 0;
750 }
751
752 static int admhcd_sw_reset(struct admhcd *ahcd)
753 {
754 int retries = 15;
755 unsigned long flags;
756 int ret = 0;
757
758 spin_lock_irqsave(&ahcd->lock, flags);
759
760 admhcd_reg_set(ahcd, ADMHCD_REG_INTENABLE, 0);
761 mdelay(10);
762
763 admhcd_reg_set(ahcd, ADMHCD_REG_CONTROL, ADMHCD_SW_RESET);
764
765 while (--retries) {
766 mdelay(1);
767 if (!(admhcd_reg_get(ahcd, ADMHCD_REG_CONTROL) & ADMHCD_SW_RESET))
768 break;
769 }
770 if (!retries) {
771 printk(KERN_WARNING "%s: software reset timeout\n", hcd_name);
772 ret = -ETIME;
773 }
774 spin_unlock_irqrestore(&ahcd->lock, flags);
775 return ret;
776 }
777
778 static int admhcd_reset(struct usb_hcd *hcd)
779 {
780 struct admhcd *ahcd = hcd_to_admhcd(hcd);
781 u32 state = 0;
782 int ret, timeout = 15; /* ms */
783 unsigned long t;
784
785 ret = admhcd_sw_reset(ahcd);
786 if (ret)
787 return ret;
788
789 t = jiffies + msecs_to_jiffies(timeout);
790 do {
791 spin_lock_irq(&ahcd->lock);
792 state = admhcd_reg_get(ahcd, ADMHCD_REG_HOSTCONTROL);
793 spin_unlock_irq(&ahcd->lock);
794 state &= ADMHCD_STATE_MASK;
795 if (state == ADMHCD_STATE_RST)
796 break;
797 msleep(4);
798 } while (time_before_eq(jiffies, t));
799
800 if (state != ADMHCD_STATE_RST) {
801 printk(KERN_WARNING "%s: device not ready after %dms\n",
802 hcd_name, timeout);
803 ret = -ENODEV;
804 }
805
806 return ret;
807 }
808
809 static void admhcd_stop(struct usb_hcd *hcd)
810 {
811 struct admhcd *ahcd = hcd_to_admhcd(hcd);
812 unsigned long flags;
813 u32 val;
814
815 spin_lock_irqsave(&ahcd->lock, flags);
816 admhcd_reg_set(ahcd, ADMHCD_REG_INTENABLE, 0);
817
818 /* Set global control of power for ports */
819 val = admhcd_reg_get(ahcd, ADMHCD_REG_RHDESCR);
820 val &= (~ADMHCD_PSM | ADMHCD_LPS);
821 admhcd_reg_set(ahcd, ADMHCD_REG_RHDESCR, val);
822
823 spin_unlock_irqrestore(&ahcd->lock, flags);
824
825 /* Ask for software reset */
826 admhcd_sw_reset(ahcd);
827 }
828
829
830 static struct hc_driver adm5120_hc_driver = {
831 .description = hcd_name,
832 .product_desc = "ADM5120 HCD",
833 .hcd_priv_size = sizeof(struct admhcd),
834 .irq = admhcd_irq,
835 .flags = HCD_USB11,
836 .urb_enqueue = admhcd_urb_enqueue,
837 .urb_dequeue = admhcd_urb_dequeue,
838 .endpoint_disable = admhcd_endpoint_disable,
839 .get_frame_number = admhcd_get_frame_number,
840 .hub_status_data = admhcd_hub_status_data,
841 .hub_control = admhcd_hub_control,
842 .start = admhcd_start,
843 .stop = admhcd_stop,
844 .reset = admhcd_reset,
845 };
846
847 #define resource_len(r) (((r)->end - (r)->start) + 1)
848
849 static int __init adm5120hcd_probe(struct platform_device *pdev)
850 {
851 struct usb_hcd *hcd;
852 struct admhcd *ahcd;
853 struct resource *data;
854 void __iomem *data_reg;
855
856 int err = 0, irq;
857
858 if (pdev->num_resources < 2) {
859 printk(KERN_WARNING PFX "not enough resources\n");
860 err = -ENODEV;
861 goto out;
862 }
863
864 irq = platform_get_irq(pdev, 0);
865 data = platform_get_resource(pdev, IORESOURCE_MEM, 0);
866
867 if (pdev->dev.dma_mask) {
868 printk(KERN_DEBUG PFX "no we won't dma\n");
869 return -EINVAL;
870 }
871
872 if (!data || irq < 0) {
873 printk(KERN_DEBUG PFX "either IRQ or data resource is invalid\n");
874 err = -ENODEV;
875 goto out;
876 }
877
878 if (!request_mem_region(data->start, resource_len(data), hcd_name)) {
879 printk(KERN_DEBUG PFX "cannot request memory regions for the data resource\n");
880 err = -EBUSY;
881 goto out;
882 }
883
884 data_reg = ioremap(data->start, resource_len(data));
885 if (data_reg == NULL) {
886 printk(KERN_DEBUG PFX "unable to ioremap\n");
887 err = -ENOMEM;
888 goto out_mem;
889 }
890
891 hcd = usb_create_hcd(&adm5120_hc_driver, &pdev->dev, pdev->dev.bus_id);
892 if (!hcd) {
893 printk(KERN_DEBUG PFX "unable to create the hcd\n");
894 err = -ENOMEM;
895 goto out_unmap;
896 }
897
898 hcd->rsrc_start = data->start;
899 hcd->rsrc_len = resource_len(data);
900 hcd->regs = data_reg;
901
902 ahcd = hcd_to_admhcd(hcd);
903 ahcd->data_reg = data_reg;
904 ahcd->base = (u32)data_reg;
905
906 spin_lock_init(&ahcd->lock);
907 INIT_LIST_HEAD(&ahcd->async);
908
909 hcd->product_desc = "ADM5120 HCD";
910
911 err = usb_add_hcd(hcd, irq, IRQF_DISABLED);
912 if (err) {
913 printk(KERN_DEBUG PFX "unable to add hcd\n");
914 goto out_dev;
915 }
916
917 return 0;
918
919 out_dev:
920 usb_put_hcd(hcd);
921 out_unmap:
922 iounmap(data_reg);
923 out_mem:
924 release_mem_region(pdev->resource[0].start, pdev->resource[0].end - pdev->resource[0].start +1);
925 out:
926 return err;
927 }
928
929 #ifdef CONFIG_PM
930 static int adm5120hcd_suspend(struct platform_device *pdev, pm_message_t state)
931 {
932 pdev-dev.power.power_state = state;
933 mdelay(1);
934 return 0;
935 }
936
937 static int adm5120hcd_resume(struct platform_device *pdev, pm_message_t state)
938 {
939 pdev->dev.power.power_state = PMSG_ON;
940 mdelay(1);
941 return 0;
942 }
943 #else
944 #define adm5120hcd_suspend NULL
945 #define adm5120hcd_resume NULL
946 #endif
947
948 static int __init_or_module adm5120hcd_remove(struct platform_device *pdev)
949 {
950 struct usb_hcd *hcd = platform_get_drvdata(pdev);
951 struct admhcd *ahcd;
952
953 if (!hcd)
954 return 0;
955 ahcd = hcd_to_admhcd(hcd);
956 usb_remove_hcd(hcd);
957
958 usb_put_hcd(hcd);
959 return 0;
960 }
961
962 static struct platform_driver adm5120hcd_driver = {
963 .probe = adm5120hcd_probe,
964 .remove = adm5120hcd_remove,
965 .suspend = adm5120hcd_suspend,
966 .remove = adm5120hcd_resume,
967 .driver = {
968 .name = (char *)hcd_name,
969 .owner = THIS_MODULE,
970 },
971 };
972
973 static int __init adm5120hcd_init(void)
974 {
975 int ret;
976
977 if (usb_disabled()) {
978 printk(KERN_DEBUG PFX "USB support is disabled\n");
979 return -ENODEV;
980 }
981
982 if (mips_machgroup != MACH_GROUP_ADM5120) {
983 printk(KERN_DEBUG PFX "unsupported machine group\n");
984 return -ENODEV;
985 }
986
987 ret = platform_driver_register(&adm5120hcd_driver);
988 if (ret == 0)
989 printk(KERN_INFO PFX "registered\n");
990
991 return ret;
992 }
993
994 static void __exit adm5120hcd_exit(void)
995 {
996 platform_driver_unregister(&adm5120hcd_driver);
997 printk(KERN_INFO PFX "driver unregistered\n");
998 }
999
1000 module_init(adm5120hcd_init);
1001 module_exit(adm5120hcd_exit);
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