2 * ADM8668 minimal clock support
4 * Copyright (C) 2012, Florian Fainelli <florian@openwrt.org>
6 * Licensed under the terms of the GPLv2
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/device.h>
12 #include <linux/err.h>
13 #include <linux/clk.h>
21 static struct clk uart_clk
= {
22 .rate
= ADM8668_UARTCLK_FREQ
,
25 static struct clk sys_clk
;
27 struct clk
*clk_get(struct device
*dev
, const char *id
)
29 const char *lookup
= id
;
32 lookup
= dev_name(dev
);
34 if (!strcmp(lookup
, "apb:uart0"))
36 if (!strcmp(lookup
, "sys"))
39 return ERR_PTR(-ENOENT
);
41 EXPORT_SYMBOL(clk_get
);
43 int clk_enable(struct clk
*clk
)
47 EXPORT_SYMBOL(clk_enable
);
49 void clk_disable(struct clk
*clk
)
52 EXPORT_SYMBOL(clk_disable
);
54 unsigned long clk_get_rate(struct clk
*clk
)
58 EXPORT_SYMBOL(clk_get_rate
);
60 void clk_put(struct clk
*clk
)
63 EXPORT_SYMBOL(clk_put
);
65 void __init
adm8668_init_clocks(void)
69 /* adjustable clock selection
70 * CR3 bit 14~11, 0000 -> 175MHz, 0001 -> 180MHz, etc...
72 adj
= (ADM8668_CONFIG_REG(ADM8668_CR3
) >> 11) & 0xf;
73 sys_clk
.rate
= SYS_CLOCK
+ adj
* 5000000;
75 pr_info("ADM8668 CPU clock: %lu MHz\n", sys_clk
.rate
/ 1000000);