4 #include <linux/atmdev.h>
5 #include <linux/netdevice.h>
6 #include <linux/ioctl.h>
8 #ifdef CONFIG_IFX_ATM_MIB
9 /* For ATM-MIB lists */
10 #include <linux/list.h>
12 #include <asm/amazon/atm_mib.h>
14 /* CBM Queue arranagement
16 * Q1~ Q15: upstream queues
18 * Q17~Q31: downstream queues
20 #define AMAZON_ATM_MAX_QUEUE_NUM 32
21 #define AMAZON_ATM_PORT_NUM 2
22 #define AMAZON_ATM_FREE_CELLS 4000
23 #define AMAZON_ATM_MAX_VCC_NUM (AMAZON_ATM_MAX_QUEUE_NUM/2 - 1)
24 #define AMAZON_AAL0_SDU (ATM_AAL0_SDU+4) //one more word for status
25 #define CBM_RX_OFFSET 16 //offset from the same q for tx
26 #define AMAZON_ATM_OAM_Q_ID 16
27 #define AMAZON_ATM_RM_Q_ID 16
28 #define AMAZON_ATM_OTHER_Q_ID 16
29 #define CBM_DEFAULT_Q_OFFSET 1
30 #define HTUTIMEOUT 0xffff//timeoutofhtutocbm
31 #define QSB_WFQ_NONUBR_MAX 0x3f00
32 #define QSB_WFQ_UBR_BYPASS 0x3fff
33 #define QSB_TP_TS_MAX 65472
34 #define QSB_TAUS_MAX 64512
35 #define QSB_GCR_MIN 18
36 #define HTU_RAM_ACCESS_MAX 1024//maxium time for HTU RAM access
48 /***************** internal data structure ********************/
49 typedef int (*push_back_t
)(struct atm_vcc
*vcc
,struct sk_buff
*skb
,int err
) ;
50 /* Device private data */
55 u32 cnt_cpy
; //no. of packets that need a copy due to alignment
59 u32 max_q_off
; //maxium queues used in real scenario
64 #ifdef CONFIG_USE_VENUS
65 u8
* qd_addr_free
; //to work around a bug, bit15 of QDOFF address should be 1
77 u32 tau
; //cell delay variation due to concurrency(?)
78 u32 tstepc
; //time step, all legal values are 1,2,4
79 u32 sbl
; //scheduler burse length (for PHY)
83 u32 qid
; //QID of the current extraction queue
84 struct semaphore in_sem
; // Software-Insertion semaphore
85 volatile long lock
; //lock that avoids race contions between SWIN and SWEX
86 wait_queue_head_t sleep
; //wait queue for SWIE and SWEX
92 u32 tx
,rx
; //number AAL5 CPCS PDU from/to higher-layer
93 u32 tx_err
,rx_err
; //ifInErrors and ifOutErros
94 u32 tx_drop
,rx_drop
; //discarded received packets due to mm shortage
95 u32 htu_unp
; //number of unknown received cells
96 u32 rx_cnt_h
; //number of octets received, high 32 bits
97 u32 rx_cnt_l
; //number of octets received, low 32 bits
98 u32 tx_cnt_h
; //number of octets transmitted, high 32 bits
99 u32 tx_cnt_l
; //number of octets transmitted, low 32 bits
100 u32 tx_ppd
; //number of cells for AAL5 upstream PPD discards
101 u64 rx_cells
; //number of cells for downstream
102 u64 tx_cells
; //number of cells for upstream
103 u32 rx_err_cells
; //number of cells dropped due to uncorrectable HEC errors
104 }amazon_mib_counter_t
;
108 typedef enum {QS_PKT
,QS_LEN
,QS_ERR
,QS_HW_DROP
,QS_SW_DROP
,QS_MAX
} qs_t
;
109 //queue statics no. of packet received / sent
110 //queue statics no. of bytes received / sent
111 //queue statics no. of packets with error
112 //queue statics no. of packets dropped by hw
113 //queue statics no. of packets dropped by sw
116 push_back_t push
; //call back function
117 struct atm_vcc
* vcc
; //opened vcc
118 struct timeval access_time
; //time when last F4/F5 user cells arrive
119 int free
; //whether this queue is occupied, 0: occupied, 1: free
120 u32 aal5VccCrcErrors
; //MIB counter
121 u32 aal5VccOverSizedSDUs
; //MIB counter
123 #if defined(AMAZON_ATM_DEBUG) || defined (CONFIG_IFX_ATM_MIB)
130 int enable
; //enable / disable
131 u32 max_conn
; //maximum number of connections per port
132 u32 tx_max_cr
; //Remaining cellrate for this device for tx direction
133 u32 tx_rem_cr
; //Remaining cellrate for this device for tx direction
134 u32 tx_cur_cr
; //Current cellrate for this device for tx direction
138 amazon_aal5_dev_t aal5
;
139 amazon_cbm_dev_t cbm
;
140 amazon_htu_dev_t htu
;
141 amazon_qsb_dev_t qsb
;
142 amazon_swie_dev_t swie
;
143 amazon_mib_counter_t mib_counter
;
144 amazon_atm_queue_t queues
[AMAZON_ATM_MAX_QUEUE_NUM
];
145 amazon_atm_port_t ports
[AMAZON_ATM_PORT_NUM
];
146 atomic_t dma_tx_free_0
;//TX_CH0 has availabe descriptors
149 struct oam_last_activity
{
150 u8 vpi
; //vpi for this connection
151 u16 vci
; //vci for t his connection
152 struct timeval stamp
; //time when last F4/F5 user cells arrive
153 struct oam_last_activity
* next
;//for link list purpose
157 #ifdef CONFIG_CPU_LITTLE_ENDIAN
178 #ifdef CONFIG_CPU_LITTLE_ENDIAN
195 struct amazon_atm_cell_header
{
196 #ifdef CONFIG_CPU_LITTLE_ENDIAN
198 u32 clp
:1; // Cell Loss Priority
199 u32 pti
:3; // Payload Type Identifier
200 u32 vci
:16; // Virtual Channel Identifier
201 u32 vpi
:8; // Vitual Path Identifier
202 u32 gfc
:4; // Generic Flow Control
206 u32 gfc
:4; // Generic Flow Control
207 u32 vpi
:8; // Vitual Path Identifier
208 u32 vci
:16; // Virtual Channel Identifier
209 u32 pti
:3; // Payload Type Identifier
210 u32 clp
:1; // Cell Loss Priority
216 /************************ Function Declarations **************************/
217 amazon_atm_dev_t
* amazon_atm_create(void);
218 int amazon_atm_open(struct atm_vcc
*vcc
,push_back_t
);
219 int amazon_atm_send(struct atm_vcc
*vcc
,struct sk_buff
*skb
);
220 int amazon_atm_send_oam(struct atm_vcc
*vcc
,void *cell
, int flags
);
221 void amazon_atm_close(struct atm_vcc
*vcc
);
222 void amazon_atm_cleanup(void);
223 const struct oam_last_activity
* get_oam_time_stamp(void);
226 int amazon_atm_cell_mib(atm_cell_ifEntry_t
* to
,u32 itf
);
227 int amazon_atm_aal5_mib(atm_aal5_ifEntry_t
* to
);
228 int amazon_atm_vcc_mib(struct atm_vcc
*vcc
,atm_aal5_vcc_t
* to
);
229 int amazon_atm_vcc_mib_x(int vpi
, int vci
,atm_aal5_vcc_t
* to
);
231 #define AMAZON_WRITE_REGISTER_L(data,addr) do{ *((volatile u32*)(addr)) = (u32)(data); wmb();} while (0)
232 #define AMAZON_READ_REGISTER_L(addr) (*((volatile u32*)(addr)))
233 /******************************* ioctl stuff****************************************/
234 #define NUM(dev) (MINOR(dev) & 0xf)
238 /* Use 'o' as magic number */
239 #define AMAZON_ATM_IOC_MAGIC 'o'
240 /* MIB_CELL: get atm cell level mib counter
241 * MIB_AAL5: get aal5 mib counter
242 * MIB_VCC: get vcc mib counter
247 atm_aal5_vcc_t mib_vcc
;
249 #define AMAZON_ATM_MIB_CELL _IOWR(AMAZON_ATM_IOC_MAGIC, 0, atm_cell_ifEntry_t)
250 #define AMAZON_ATM_MIB_AAL5 _IOWR(AMAZON_ATM_IOC_MAGIC, 1, atm_aal5_ifEntry_t)
251 #define AMAZON_ATM_MIB_VCC _IOWR(AMAZON_ATM_IOC_MAGIC, 2, atm_aal5_vcc_x_t)
252 #define AMAZON_ATM_IOC_MAXNR 3
255 #define SO_AMAZON_ATM_MIB_VCC __SO_ENCODE(SOL_ATM,5,atm_aal5_vcc_t)
257 #endif // AMAZON_TPE_H