2 * Device Tree for Bluestone (APM821xx) board.
4 * Copyright (c) 2010, Applied Micro Circuits Corporation
5 * Author: Tirumala R Marri <tmarri@apm.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 #include <dt-bindings/dma/dw-dmac.h>
25 #include <dt-bindings/input/input.h>
26 #include <dt-bindings/interrupt-controller/irq.h>
27 #include <dt-bindings/gpio/gpio.h>
32 dcr-parent = <&{/cpus/cpu@0}>;
33 compatible = "apm,bluestone";
36 ethernet0 = &EMAC0; /* needed for BSP u-boot */
45 model = "PowerPC,apm82181";
47 clock-frequency = <0>; /* Filled in by U-Boot */
48 timebase-frequency = <0>; /* Filled in by U-Boot */
49 i-cache-line-size = <32>;
50 d-cache-line-size = <32>;
51 i-cache-size = <32768>;
52 d-cache-size = <32768>;
54 dcr-access-method = "native";
55 next-level-cache = <&L2C0>;
60 device_type = "memory";
61 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
64 UIC0: interrupt-controller0 {
65 compatible = "apm,uic-apm82181", "ibm,uic";
68 dcr-reg = <0x0c0 0x009>;
71 #interrupt-cells = <2>;
74 UIC1: interrupt-controller1 {
75 compatible = "apm,uic-apm82181", "ibm,uic";
78 dcr-reg = <0x0d0 0x009>;
81 #interrupt-cells = <2>;
82 interrupts = <0x1e IRQ_TYPE_LEVEL_HIGH>,
83 <0x1f IRQ_TYPE_LEVEL_HIGH>; /* cascade */
84 interrupt-parent = <&UIC0>;
87 UIC2: interrupt-controller2 {
88 compatible = "apm,uic-apm82181", "ibm,uic";
91 dcr-reg = <0x0e0 0x009>;
94 #interrupt-cells = <2>;
95 interrupts = <0x0a IRQ_TYPE_LEVEL_HIGH>,
96 <0x0b IRQ_TYPE_LEVEL_HIGH>; /* cascade */
97 interrupt-parent = <&UIC0>;
100 UIC3: interrupt-controller3 {
101 compatible = "apm,uic-apm82181","ibm,uic";
102 interrupt-controller;
104 dcr-reg = <0x0f0 0x009>;
105 #address-cells = <0>;
107 #interrupt-cells = <2>;
108 interrupts = <0x10 IRQ_TYPE_LEVEL_HIGH>,
109 <0x11 IRQ_TYPE_LEVEL_HIGH>; /* cascade */
110 interrupt-parent = <&UIC0>;
113 OCM1: ocm@400040000 {
114 compatible = "apm,ocm-apm82181", "ibm,ocm";
117 /* configured in U-Boot */
118 reg = <4 0x00040000 0x8000>; /* 32K */
122 compatible = "apm,sdr-apm82181", "ibm,sdr-460ex";
123 dcr-reg = <0x00e 0x002>;
127 compatible = "apm,cpr-apm82181", "ibm,cpr-460ex";
128 dcr-reg = <0x00c 0x002>;
132 compatible = "ibm,l2-cache-apm82181", "ibm,l2-cache";
133 dcr-reg = <0x020 0x008
135 cache-line-size = <32>;
136 cache-size = <262144>;
137 interrupt-parent = <&UIC1>;
138 interrupts = <0x0b IRQ_TYPE_EDGE_RISING>;
142 compatible = "ibm,cpm-apm821xx", "ibm,cpm";
144 dcr-reg = <0x160 0x003>;
145 pm-cpu = <0x02000000>;
146 pm-doze = <0x302570F0>;
147 pm-nap = <0x302570F0>;
148 pm-deepsleep = <0x302570F0>;
149 pm-iic-device = <&IIC0>;
150 pm-emac-device = <&EMAC0>;
151 unused-units = <0x00000100>;
152 idle-doze = <0x02000000>;
153 standby = <0xfeff791d>;
157 compatible = "apm,plb-apm82181", "ibm,plb-460ex", "ibm,plb4";
158 #address-cells = <2>;
160 ranges; /* Filled in by U-Boot */
161 clock-frequency = <0>; /* Filled in by U-Boot */
164 compatible = "apm,sdram-apm82181", "ibm,sdram-460ex", "ibm,sdram-405gp";
165 dcr-reg = <0x010 0x002>;
169 compatible = "ibm,rtc";
170 dcr-reg = <0x240 0x009>;
171 interrupts = <0x1a IRQ_TYPE_LEVEL_HIGH>;
172 interrupt-parent = <&UIC2>;
177 compatible = "amcc,ppc460ex-rng", "ppc4xx-rng", "amcc, ppc4xx-trng";
178 reg = <4 0x00110000 0x100>;
179 interrupt-parent = <&UIC1>;
180 interrupts = <0x03 IRQ_TYPE_LEVEL_HIGH>;
185 compatible = "ppc4xx-pka", "amcc,ppc4xx-pka", "amcc, ppc4xx-pka";
186 reg = <4 0x00114000 0x4000>;
187 interrupt-parent = <&UIC0>;
188 interrupts = <0x14 IRQ_TYPE_EDGE_RISING>;
192 CRYPTO: crypto@180000 {
193 compatible = "amcc,ppc460ex-crypto", "amcc,ppc4xx-crypto";
194 reg = <4 0x00180000 0x80400>;
195 interrupt-parent = <&UIC0>;
196 interrupts = <0x1d IRQ_TYPE_LEVEL_HIGH>;
197 status = "disabled"; /* hardware option */
201 compatible = "ibm,mcmal-460ex", "ibm,mcmal2";
202 descriptor-memory = "ocm";
203 dcr-reg = <0x180 0x062>;
206 #address-cells = <0>;
208 interrupt-parent = <&UIC2>;
209 interrupts = <0x06 IRQ_TYPE_LEVEL_HIGH>,
210 <0x07 IRQ_TYPE_LEVEL_HIGH>,
211 <0x03 IRQ_TYPE_LEVEL_HIGH>,
212 <0x04 IRQ_TYPE_LEVEL_HIGH>,
213 <0x05 IRQ_TYPE_LEVEL_HIGH>,
214 <0x08 IRQ_TYPE_EDGE_FALLING>,
215 <0x09 IRQ_TYPE_EDGE_FALLING>,
216 <0x0c IRQ_TYPE_EDGE_FALLING>,
217 <0x0d IRQ_TYPE_EDGE_FALLING>;
218 interrupt-names = "txeob", "rxeob", "serr",
220 "tx0coal", "tx1coal",
221 "rx0coal", "rx1coal";
225 compatible = "ibm,opb-460ex", "ibm,opb";
226 #address-cells = <1>;
228 ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
229 clock-frequency = <0>; /* Filled in by U-Boot */
232 compatible = "ibm,ebc-460ex", "ibm,ebc";
233 dcr-reg = <0x012 0x002>;
234 #address-cells = <2>;
236 clock-frequency = <0>; /* Filled in by U-Boot */
237 /* ranges property is supplied by U-Boot */
238 ranges = <0x00000003 0x00000000 0xe0000000 0x8000000>;
239 interrupts = <0x06 IRQ_TYPE_LEVEL_HIGH>;
240 interrupt-parent = <&UIC1>;
243 compatible = "cfi-flash";
245 reg = <0x00000000 0x00000000 0x00100000>;
246 #address-cells = <1>;
252 compatible = "ibm,ndfc";
253 reg = <00000003 00000000 00002000>;
255 bank-settings = <0x80002222>;
259 #address-cells = <1>;
265 UART0: serial@ef600300 {
267 * AMCC's BSP u-boot scans for the "ns16550"
268 * compatible, without it, u-boot wouldn't
269 * set the required "clock-frequency".
271 * The hardware documentation states:
272 * "Register compatibility with 16750 register set"
274 compatible = "ns16750", "ns16550";
275 reg = <0xef600300 0x00000008>;
276 virtual-reg = <0xef600300>;
277 clock-frequency = <0>; /* Filled in by U-Boot */
278 interrupt-parent = <&UIC1>;
279 interrupts = <0x01 IRQ_TYPE_LEVEL_HIGH>;
283 UART1: serial@ef600400 {
284 /* same "ns16750" as with UART0 */
285 compatible = "ns16750", "ns16550";
286 reg = <0xef600400 0x00000008>;
287 virtual-reg = <0xef600400>;
288 clock-frequency = <0>; /* Filled in by U-Boot */
289 interrupt-parent = <&UIC0>;
290 interrupts = <0x01 IRQ_TYPE_LEVEL_HIGH>;
295 compatible = "ibm,iic-460ex", "ibm,iic";
296 reg = <0xef600700 0x00000014>;
297 interrupt-parent = <&UIC0>;
298 interrupts = <0x02 IRQ_TYPE_LEVEL_HIGH>;
299 #address-cells = <1>;
305 compatible = "ibm,iic-460ex", "ibm,iic";
306 reg = <0xef600800 0x00000014>;
307 interrupt-parent = <&UIC0>;
308 interrupts = <0x03 IRQ_TYPE_LEVEL_HIGH>;
312 GPIO0: gpio@ef600b00 {
313 compatible = "ibm,ppc4xx-gpio";
314 reg = <0xef600b00 0x00000048>;
320 EMAC0: ethernet@ef600c00 {
321 device_type = "network";
322 compatible = "ibm,emac-apm821xx", "ibm,emac4sync";
323 interrupt-parent = <&EMAC0>;
325 #interrupt-cells = <1>;
326 #address-cells = <0>;
328 interrupt-map = <0 &UIC2 0x10 IRQ_TYPE_LEVEL_HIGH>,
329 <1 &UIC2 0x14 IRQ_TYPE_LEVEL_HIGH>;
330 interrupt-names = "status", "wake";
332 reg = <0xef600c00 0x000000c4>;
333 local-mac-address = [000000000000]; /* Filled in by U-Boot */
334 mal-device = <&MAL0>;
335 mal-tx-channel = <0>;
336 mal-rx-channel = <0>;
338 max-frame-size = <9000>;
339 rx-fifo-size = <16384>;
340 tx-fifo-size = <2048>;
342 phy-map = <0x00000000>;
343 rgmii-device = <&RGMII0>;
345 tah-device = <&TAH0>;
347 has-inverted-stacr-oc;
348 has-new-stacr-staopc;
352 TAH0: emac-tah@ef601350 {
353 compatible = "ibm,tah-460ex", "ibm,tah";
354 reg = <0xef601350 0x00000030>;
357 RGMII0: emac-rgmii@ef601500 {
358 compatible = "ibm,rgmii-405ex", "ibm,rgmii";
359 reg = <0xef601500 0x00000008>;
364 USBOTG0: usbotg@bff80000 {
365 compatible = "amcc,dwc-otg";
366 reg = <4 0xbff80000 0x10000>;
367 interrupt-parent = <&USBOTG0>;
368 interrupts = <0 1 2>;
369 #interrupt-cells = <1>;
370 #address-cells = <0>;
372 interrupt-map = <0 &UIC2 0x1c IRQ_TYPE_LEVEL_HIGH>,
373 <1 &UIC1 0x1a IRQ_TYPE_LEVEL_LOW>,
374 <2 &UIC0 0x0c IRQ_TYPE_LEVEL_HIGH>;
375 interrupt-names = "usb-otg", "high-power", "dma";
380 AHBDMA0: dma@bffd0800 {
381 compatible = "snps,dma-spear1340";
382 reg = <4 0xbffd0800 0x400>;
383 interrupt-parent = <&UIC0>;
384 interrupts = <0x19 IRQ_TYPE_LEVEL_HIGH>;
390 data-width = <4>, <4>, <4>;
391 multi-block = <1>, <1>;
393 chan_allocation_order = <1>;
396 snps,dma-protection-control =
397 <(DW_DMAC_HPROT1_PRIVILEGED_MODE |
398 DW_DMAC_HPROT2_BUFFERABLE)>;
402 SATA0: sata@bffd1000 {
403 compatible = "amcc,sata-460ex";
404 reg = <4 0xbffd1000 0x800>;
405 interrupt-parent = <&UIC0>;
406 interrupts = <0x1a IRQ_TYPE_LEVEL_HIGH>;
407 dmas = <&AHBDMA0 0 0 1>;
408 dma-names = "sata-dma";
412 SATA1: sata@bffd1800 {
413 compatible = "amcc,sata-460ex";
414 reg = <4 0xbffd1800 0x800>;
415 interrupt-parent = <&UIC0>;
416 interrupts = <0x1b IRQ_TYPE_LEVEL_HIGH>;
417 dmas = <&AHBDMA0 1 0 2>;
418 dma-names = "sata-dma";
422 MSI: ppc4xx-msi@c10000000 {
423 compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
424 reg = <0xc 0x10000000 0x100
425 0xc 0x10000000 0x100>;
427 msi-data = <0x00004440>;
428 msi-mask = <0x0000ffe0>;
429 interrupts =<0 1 2 3 4 5 6 7>;
430 interrupt-parent = <&MSI>;
431 #interrupt-cells = <1>;
432 #address-cells = <0>;
434 msi-available-ranges = <0x0 0x100>;
436 <0 &UIC3 0x18 IRQ_TYPE_EDGE_RISING>,
437 <1 &UIC3 0x19 IRQ_TYPE_EDGE_RISING>,
438 <2 &UIC3 0x1a IRQ_TYPE_EDGE_RISING>,
439 <3 &UIC3 0x1b IRQ_TYPE_EDGE_RISING>,
440 <4 &UIC3 0x1c IRQ_TYPE_EDGE_RISING>,
441 <5 &UIC3 0x1d IRQ_TYPE_EDGE_RISING>,
442 <6 &UIC3 0x1e IRQ_TYPE_EDGE_RISING>,
443 <7 &UIC3 0x1f IRQ_TYPE_EDGE_RISING>;
447 PCIE0: pciex@d00000000 {
448 device_type = "pci"; /* see ppc4xx_pci_find_bridge */
449 #interrupt-cells = <1>;
451 #address-cells = <3>;
452 compatible = "ibm,plb-pciex-apm821xx", "ibm,plb-pciex";
454 port = <0x0>; /* port number */
455 reg = <0x0000000d 0x00000000 0x20000000>, /* Config space access */
456 <0x0000000c 0x08010000 0x00001000>; /* Registers */
457 dcr-reg = <0x100 0x020>;
460 /* Outbound ranges, one memory and one IO,
461 * later cannot be changed
463 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000>,
464 <0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000>,
465 <0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
467 /* Inbound 2GB range starting at 0 */
468 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
470 /* This drives busses 0x40 to 0x7f */
471 bus-range = <0x40 0x7f>;
473 /* Legacy interrupts (note the weird polarity, the bridge seems
474 * to invert PCIe legacy interrupts).
475 * We are de-swizzling here because the numbers are actually for
476 * port of the root complex virtual P2P bridge. But I want
477 * to avoid putting a node for it in the tree, so the numbers
478 * below are basically de-swizzled numbers.
479 * The real slot is on idsel 0, so the swizzling is 1:1
481 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
483 <0x0 0x0 0x0 0x1 &UIC3 0x0c IRQ_TYPE_LEVEL_HIGH>, /* swizzled int A */
484 <0x0 0x0 0x0 0x2 &UIC3 0x0d IRQ_TYPE_LEVEL_HIGH>, /* swizzled int B */
485 <0x0 0x0 0x0 0x3 &UIC3 0x0e IRQ_TYPE_LEVEL_HIGH>, /* swizzled int C */
486 <0x0 0x0 0x0 0x4 &UIC3 0x0f IRQ_TYPE_LEVEL_HIGH>; /* swizzled int D */