1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Device Tree for Bluestone (APM821xx) board.
5 * Copyright (c) 2010, Applied Micro Circuits Corporation
6 * Author: Tirumala R Marri <tmarri@apm.com>
9 #include <dt-bindings/dma/dw-dmac.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
17 dcr-parent = <&{/cpus/cpu@0}>;
18 compatible = "apm,bluestone";
21 ethernet0 = &EMAC0; /* needed for BSP u-boot */
30 model = "PowerPC,apm82181";
32 clock-frequency = <0>; /* Filled in by U-Boot */
33 timebase-frequency = <0>; /* Filled in by U-Boot */
34 i-cache-line-size = <32>;
35 d-cache-line-size = <32>;
36 i-cache-size = <32768>;
37 d-cache-size = <32768>;
39 dcr-access-method = "native";
40 next-level-cache = <&L2C0>;
45 device_type = "memory";
46 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
49 UIC0: interrupt-controller0 {
50 compatible = "apm,uic-apm82181", "ibm,uic";
53 dcr-reg = <0x0c0 0x009>;
56 #interrupt-cells = <2>;
59 UIC1: interrupt-controller1 {
60 compatible = "apm,uic-apm82181", "ibm,uic";
63 dcr-reg = <0x0d0 0x009>;
66 #interrupt-cells = <2>;
67 interrupts = <0x1e IRQ_TYPE_LEVEL_HIGH>,
68 <0x1f IRQ_TYPE_LEVEL_HIGH>; /* cascade */
69 interrupt-parent = <&UIC0>;
72 UIC2: interrupt-controller2 {
73 compatible = "apm,uic-apm82181", "ibm,uic";
76 dcr-reg = <0x0e0 0x009>;
79 #interrupt-cells = <2>;
80 interrupts = <0x0a IRQ_TYPE_LEVEL_HIGH>,
81 <0x0b IRQ_TYPE_LEVEL_HIGH>; /* cascade */
82 interrupt-parent = <&UIC0>;
85 UIC3: interrupt-controller3 {
86 compatible = "apm,uic-apm82181","ibm,uic";
89 dcr-reg = <0x0f0 0x009>;
92 #interrupt-cells = <2>;
93 interrupts = <0x10 IRQ_TYPE_LEVEL_HIGH>,
94 <0x11 IRQ_TYPE_LEVEL_HIGH>; /* cascade */
95 interrupt-parent = <&UIC0>;
99 compatible = "apm,ocm-apm82181", "ibm,ocm";
102 /* configured in U-Boot */
103 reg = <4 0x00040000 0x8000>; /* 32K */
107 compatible = "apm,sdr-apm82181", "ibm,sdr-460ex";
108 dcr-reg = <0x00e 0x002>;
112 compatible = "apm,cpr-apm82181", "ibm,cpr-460ex";
113 dcr-reg = <0x00c 0x002>;
117 compatible = "ibm,l2-cache-apm82181", "ibm,l2-cache";
118 dcr-reg = <0x020 0x008
120 cache-line-size = <32>;
121 cache-size = <262144>;
122 interrupt-parent = <&UIC1>;
123 interrupts = <0x0b IRQ_TYPE_EDGE_RISING>;
127 compatible = "ibm,cpm-apm821xx", "ibm,cpm";
129 dcr-reg = <0x160 0x003>;
130 pm-cpu = <0x02000000>;
131 pm-doze = <0x302570F0>;
132 pm-nap = <0x302570F0>;
133 pm-deepsleep = <0x302570F0>;
134 pm-iic-device = <&IIC0>;
135 pm-emac-device = <&EMAC0>;
136 unused-units = <0x00000100>;
137 idle-doze = <0x02000000>;
138 standby = <0xfeff791d>;
142 compatible = "apm,plb-apm82181", "ibm,plb-460ex", "ibm,plb4";
143 #address-cells = <2>;
145 ranges; /* Filled in by U-Boot */
146 clock-frequency = <0>; /* Filled in by U-Boot */
149 compatible = "apm,sdram-apm82181", "ibm,sdram-460ex", "ibm,sdram-405gp";
150 dcr-reg = <0x010 0x002>;
154 compatible = "ibm,rtc";
155 dcr-reg = <0x240 0x009>;
156 interrupts = <0x1a IRQ_TYPE_LEVEL_HIGH>;
157 interrupt-parent = <&UIC2>;
162 compatible = "amcc,ppc460ex-rng", "ppc4xx-rng", "amcc, ppc4xx-trng";
163 reg = <4 0x00110000 0x100>;
164 interrupt-parent = <&UIC1>;
165 interrupts = <0x03 IRQ_TYPE_LEVEL_HIGH>;
170 compatible = "ppc4xx-pka", "amcc,ppc4xx-pka", "amcc, ppc4xx-pka";
171 reg = <4 0x00114000 0x4000>;
172 interrupt-parent = <&UIC0>;
173 interrupts = <0x14 IRQ_TYPE_EDGE_RISING>;
177 CRYPTO: crypto@180000 {
178 compatible = "amcc,ppc460ex-crypto", "amcc,ppc4xx-crypto";
179 reg = <4 0x00180000 0x80400>;
180 interrupt-parent = <&UIC0>;
181 interrupts = <0x1d IRQ_TYPE_LEVEL_HIGH>;
182 status = "disabled"; /* hardware option */
186 compatible = "ibm,mcmal-460ex", "ibm,mcmal2";
187 descriptor-memory = "ocm";
188 dcr-reg = <0x180 0x062>;
191 #address-cells = <0>;
193 interrupt-parent = <&UIC2>;
194 interrupts = <0x06 IRQ_TYPE_LEVEL_HIGH>,
195 <0x07 IRQ_TYPE_LEVEL_HIGH>,
196 <0x03 IRQ_TYPE_LEVEL_HIGH>,
197 <0x04 IRQ_TYPE_LEVEL_HIGH>,
198 <0x05 IRQ_TYPE_LEVEL_HIGH>,
199 <0x08 IRQ_TYPE_EDGE_FALLING>,
200 <0x09 IRQ_TYPE_EDGE_FALLING>,
201 <0x0c IRQ_TYPE_EDGE_FALLING>,
202 <0x0d IRQ_TYPE_EDGE_FALLING>;
203 interrupt-names = "txeob", "rxeob", "serr",
205 "tx0coal", "tx1coal",
206 "rx0coal", "rx1coal";
210 compatible = "ibm,opb-460ex", "ibm,opb";
211 #address-cells = <1>;
213 ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
214 clock-frequency = <0>; /* Filled in by U-Boot */
217 compatible = "ibm,ebc-460ex", "ibm,ebc";
218 dcr-reg = <0x012 0x002>;
219 #address-cells = <2>;
221 clock-frequency = <0>; /* Filled in by U-Boot */
222 /* ranges property is supplied by U-Boot */
223 ranges = <0x00000003 0x00000000 0xe0000000 0x8000000>;
224 interrupts = <0x06 IRQ_TYPE_LEVEL_HIGH>;
225 interrupt-parent = <&UIC1>;
228 compatible = "cfi-flash";
230 reg = <0x00000000 0x00000000 0x00100000>;
231 #address-cells = <1>;
237 compatible = "ibm,ndfc";
238 reg = <00000003 00000000 00002000>;
240 bank-settings = <0x80002222>;
245 * These are the same fixed "MAGIC" values
246 * settings as in the drivers code.
247 * They are the same for all devices that
250 nand-ecc-engine = <&ndfc>;
251 nand-ecc-algo = "hamming";
252 nand-ecc-step-size = <256>;
253 nand-ecc-strength = <1>;
255 #address-cells = <1>;
261 UART0: serial@ef600300 {
263 * AMCC's BSP u-boot scans for the "ns16550"
264 * compatible, without it, u-boot wouldn't
265 * set the required "clock-frequency".
267 * The hardware documentation states:
268 * "Register compatibility with 16750 register set"
270 compatible = "ns16750", "ns16550";
271 reg = <0xef600300 0x00000008>;
272 virtual-reg = <0xef600300>;
273 clock-frequency = <0>; /* Filled in by U-Boot */
274 interrupt-parent = <&UIC1>;
275 interrupts = <0x01 IRQ_TYPE_LEVEL_HIGH>;
279 UART1: serial@ef600400 {
280 /* same "ns16750" as with UART0 */
281 compatible = "ns16750", "ns16550";
282 reg = <0xef600400 0x00000008>;
283 virtual-reg = <0xef600400>;
284 clock-frequency = <0>; /* Filled in by U-Boot */
285 interrupt-parent = <&UIC0>;
286 interrupts = <0x01 IRQ_TYPE_LEVEL_HIGH>;
291 compatible = "ibm,iic-460ex", "ibm,iic";
292 reg = <0xef600700 0x00000014>;
293 interrupt-parent = <&UIC0>;
294 interrupts = <0x02 IRQ_TYPE_LEVEL_HIGH>;
295 #address-cells = <1>;
301 compatible = "ibm,iic-460ex", "ibm,iic";
302 reg = <0xef600800 0x00000014>;
303 interrupt-parent = <&UIC0>;
304 interrupts = <0x03 IRQ_TYPE_LEVEL_HIGH>;
305 #address-cells = <1>;
310 GPIO0: gpio@ef600b00 {
311 compatible = "ibm,ppc4xx-gpio";
312 reg = <0xef600b00 0x00000048>;
318 EMAC0: ethernet@ef600c00 {
319 device_type = "network";
320 compatible = "ibm,emac-apm821xx", "ibm,emac4sync";
321 interrupt-parent = <&EMAC0>;
323 #interrupt-cells = <1>;
324 #address-cells = <0>;
326 interrupt-map = <0 &UIC2 0x10 IRQ_TYPE_LEVEL_HIGH>,
327 <1 &UIC2 0x14 IRQ_TYPE_LEVEL_HIGH>;
328 interrupt-names = "status", "wake";
330 reg = <0xef600c00 0x000000c4>;
331 local-mac-address = [000000000000]; /* Filled in by U-Boot */
332 mal-device = <&MAL0>;
333 mal-tx-channel = <0>;
334 mal-rx-channel = <0>;
336 max-frame-size = <9000>;
337 rx-fifo-size = <16384>;
338 tx-fifo-size = <2048>;
340 phy-map = <0x00000000>;
341 rgmii-device = <&RGMII0>;
343 tah-device = <&TAH0>;
345 has-inverted-stacr-oc;
346 has-new-stacr-staopc;
350 TAH0: emac-tah@ef601350 {
351 compatible = "ibm,tah-460ex", "ibm,tah";
352 reg = <0xef601350 0x00000030>;
355 RGMII0: emac-rgmii@ef601500 {
356 compatible = "ibm,rgmii-405ex", "ibm,rgmii";
357 reg = <0xef601500 0x00000008>;
362 USBOTG0: usbotg@bff80000 {
363 compatible = "amcc,dwc-otg";
364 reg = <4 0xbff80000 0x10000>;
365 interrupt-parent = <&USBOTG0>;
366 interrupts = <0 1 2>;
367 #interrupt-cells = <1>;
368 #address-cells = <0>;
370 interrupt-map = <0 &UIC2 0x1c IRQ_TYPE_LEVEL_HIGH>,
371 <1 &UIC1 0x1a IRQ_TYPE_LEVEL_LOW>,
372 <2 &UIC0 0x0c IRQ_TYPE_LEVEL_HIGH>;
373 interrupt-names = "usb-otg", "high-power", "dma";
378 AHBDMA0: dma@bffd0800 {
379 compatible = "snps,dma-spear1340";
380 reg = <4 0xbffd0800 0x400>;
381 interrupt-parent = <&UIC0>;
382 interrupts = <0x19 IRQ_TYPE_LEVEL_HIGH>;
388 data-width = <4>, <4>, <4>;
389 multi-block = <1>, <1>;
391 chan_allocation_order = <1>;
394 snps,dma-protection-control =
395 <(DW_DMAC_HPROT1_PRIVILEGED_MODE |
396 DW_DMAC_HPROT2_BUFFERABLE)>;
400 SATA0: sata@bffd1000 {
401 compatible = "amcc,sata-460ex";
402 reg = <4 0xbffd1000 0x800>;
403 interrupt-parent = <&UIC0>;
404 interrupts = <0x1a IRQ_TYPE_LEVEL_HIGH>;
405 dmas = <&AHBDMA0 0 0 1>;
406 dma-names = "sata-dma";
408 #address-cells = <1>;
412 SATA1: sata@bffd1800 {
413 compatible = "amcc,sata-460ex";
414 reg = <4 0xbffd1800 0x800>;
415 interrupt-parent = <&UIC0>;
416 interrupts = <0x1b IRQ_TYPE_LEVEL_HIGH>;
417 dmas = <&AHBDMA0 1 0 2>;
418 dma-names = "sata-dma";
420 #address-cells = <1>;
424 MSI: ppc4xx-msi@c10000000 {
425 compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
426 reg = <0xc 0x10000000 0x100
427 0xc 0x10000000 0x100>;
429 msi-data = <0x00004440>;
430 msi-mask = <0x0000ffe0>;
431 interrupts =<0 1 2 3 4 5 6 7>;
432 interrupt-parent = <&MSI>;
433 #interrupt-cells = <1>;
434 #address-cells = <0>;
436 msi-available-ranges = <0x0 0x100>;
438 <0 &UIC3 0x18 IRQ_TYPE_EDGE_RISING>,
439 <1 &UIC3 0x19 IRQ_TYPE_EDGE_RISING>,
440 <2 &UIC3 0x1a IRQ_TYPE_EDGE_RISING>,
441 <3 &UIC3 0x1b IRQ_TYPE_EDGE_RISING>,
442 <4 &UIC3 0x1c IRQ_TYPE_EDGE_RISING>,
443 <5 &UIC3 0x1d IRQ_TYPE_EDGE_RISING>,
444 <6 &UIC3 0x1e IRQ_TYPE_EDGE_RISING>,
445 <7 &UIC3 0x1f IRQ_TYPE_EDGE_RISING>;
449 PCIE0: pciex@d00000000 {
450 device_type = "pci"; /* see ppc4xx_pci_find_bridge */
451 #interrupt-cells = <1>;
453 #address-cells = <3>;
454 compatible = "ibm,plb-pciex-apm821xx", "ibm,plb-pciex";
456 port = <0x0>; /* port number */
457 reg = <0x0000000d 0x00000000 0x20000000>, /* Config space access */
458 <0x0000000c 0x08010000 0x00001000>; /* Registers */
459 dcr-reg = <0x100 0x020>;
463 * Outbound ranges, one memory and one IO,
464 * later cannot be changed
466 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000>,
467 <0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000>,
468 <0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
470 /* Inbound 2GB range starting at 0 */
471 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
473 /* This drives busses 0x40 to 0x7f */
474 bus-range = <0x40 0x7f>;
477 * Legacy interrupts (note the weird polarity, the bridge seems
478 * to invert PCIe legacy interrupts).
479 * We are de-swizzling here because the numbers are actually for
480 * port of the root complex virtual P2P bridge. But I want
481 * to avoid putting a node for it in the tree, so the numbers
482 * below are basically de-swizzled numbers.
483 * The real slot is on idsel 0, so the swizzling is 1:1
485 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
487 <0x0 0x0 0x0 0x1 &UIC3 0x0c IRQ_TYPE_LEVEL_HIGH>, /* swizzled int A */
488 <0x0 0x0 0x0 0x2 &UIC3 0x0d IRQ_TYPE_LEVEL_HIGH>, /* swizzled int B */
489 <0x0 0x0 0x0 0x3 &UIC3 0x0e IRQ_TYPE_LEVEL_HIGH>, /* swizzled int C */
490 <0x0 0x0 0x0 0x4 &UIC3 0x0f IRQ_TYPE_LEVEL_HIGH>; /* swizzled int D */