1 // SPDX-License-Identifier: GPL-2.0-only
3 * Device Tree Source for Meraki MR24 (Ikarem)
5 * Copyright (C) 2016 Chris Blake <chrisrblake93@gmail.com>
7 * Based on Cisco Meraki GPL Release r23-20150601 MR24 DTS
12 #include "apm82181.dtsi"
15 model = "Meraki MR24 Access Point";
16 compatible = "meraki,mr24", "meraki,ikarem", "apm,bluestone";
21 led-failsafe = &failsafe;
22 led-running = &status;
23 led-upgrade = &status;
27 stdout-path = "/plb/opb/serial@ef600400";
45 /* Ikarem has 32MB of NAND */
48 /* 32 MiB NAND Flash */
52 reg = <0x00000000 0x00150000>;
58 * The u-boot environment size is one NAND
59 * block (16KiB). u-boot allocates four NAND
60 * blocks (64KiB) in order to have spares
61 * around for bad block management
64 reg = <0x00150000 0x00010000>;
70 * redundant u-boot environment.
71 * has to be kept it in sync with the
72 * data in "u-boot-env".
74 label = "u-boot-env-redundant";
75 reg = <0x00160000 0x00010000>;
81 reg = <0x00170000 0x00010000>;
86 reg = <0x00180000 0x01e80000>;
102 /* Boot ROM is at 0x52-0x53, do not touch */
103 /* Unknown chip at 0x6e, not sure what it is */
109 phy-mode = "rgmii-id";
115 #address-cells = <1>;
119 compatible = "ethernet-phy-ieee802.3-c22";
127 compatible = "gpio-leds";
129 status: power-green {
130 label = "mr24:green:power";
131 gpios = <&GPIO0 18 GPIO_ACTIVE_LOW>;
134 failsafe: power-orange {
135 label = "mr24:orange:power";
136 gpios = <&GPIO0 19 GPIO_ACTIVE_LOW>;
140 label = "mr24:green:wan";
141 gpios = <&GPIO0 17 GPIO_ACTIVE_LOW>;
145 label = "mr24:green:wifi1";
146 gpios = <&GPIO0 23 GPIO_ACTIVE_LOW>;
150 label = "mr24:green:wifi2";
151 gpios = <&GPIO0 22 GPIO_ACTIVE_LOW>;
155 label = "mr24:green:wifi3";
156 gpios = <&GPIO0 21 GPIO_ACTIVE_LOW>;
160 label = "mr24:green:wifi4";
161 gpios = <&GPIO0 20 GPIO_ACTIVE_LOW>;
166 compatible = "gpio-keys";
169 /* Label as per Meraki's "MR24 Installation Guide" */
170 label = "Factory Reset Button";
171 linux,code = <KEY_RESTART>;
172 interrupt-parent = <&UIC1>;
173 interrupts = <0x15 IRQ_TYPE_EDGE_FALLING>;
174 gpios = <&GPIO0 16 GPIO_ACTIVE_LOW>;
175 debounce-interval = <60>;
183 * relevant lspci topology:
185 * -+-[0000:40]---00.0-[41-7f]----00.0-[42-45]--+-02.0-[43]----00.0
186 * +-03.0-[44]----00.0
191 reg = <0x00400000 0 0 0 0>;
192 #address-cells = <3>;
197 /* IDT PES3T3 PCI Express Switch */
198 compatible = "pci111d,8039";
199 reg = <0x00410000 0 0 0 0>;
200 #address-cells = <3>;
205 compatible = "pci111d,8039";
206 reg = <0x00421000 0 0 0 0>;
207 #address-cells = <3>;
212 /* Atheros AR9380 2.4GHz */
213 compatible = "pci168c,0030";
214 reg = <0x00430000 0 0 0 0>;
219 compatible = "pci111d,8039";
220 reg = <0x00421800 0 0 0 0>;
221 #address-cells = <3>;
226 /* Atheros AR9380 5GHz */
227 compatible = "pci168c,0030";
228 reg = <0x00440000 0 0 0 0>;