ar71xx: vanity changes for dir-825-c1
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-dir-825-c1.c
1 /*
2 * D-Link DIR-825 rev. C1 board support
3 *
4 * Copyright (C) 2013 Alexander Stadler
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 */
10
11 #include <linux/pci.h>
12 #include <linux/phy.h>
13 #include <linux/gpio.h>
14 #include <linux/platform_device.h>
15 #include <linux/ath9k_platform.h>
16 #include <linux/ar8216_platform.h>
17
18 #include <asm/mach-ath79/ar71xx_regs.h>
19
20 #include "common.h"
21 #include "dev-ap9x-pci.h"
22 #include "dev-eth.h"
23 #include "dev-gpio-buttons.h"
24 #include "dev-leds-gpio.h"
25 #include "dev-m25p80.h"
26 #include "dev-spi.h"
27 #include "dev-usb.h"
28 #include "dev-wmac.h"
29 #include "machtypes.h"
30
31 #define DIR825C1_GPIO_LED_BLUE_USB 11
32 #define DIR825C1_GPIO_LED_AMBER_POWER 14
33 #define DIR825C1_GPIO_LED_BLUE_POWER 22
34 #define DIR825C1_GPIO_LED_BLUE_WPS 15
35 #define DIR825C1_GPIO_LED_AMBER_PLANET 19
36 #define DIR825C1_GPIO_LED_BLUE_PLANET 18
37 #define DIR825C1_GPIO_LED_WLAN_2G 13
38
39 #define DIR825C1_GPIO_WAN_LED_ENABLE 20
40
41 #define DIR825C1_GPIO_BTN_RESET 17
42 #define DIR825C1_GPIO_BTN_WPS 16
43
44 #define DIR825C1_KEYS_POLL_INTERVAL 20 /* msecs */
45 #define DIR825C1_KEYS_DEBOUNCE_INTERVAL (3 * DIR825C1_KEYS_POLL_INTERVAL)
46
47 #define DIR825C1_MAC0_OFFSET 0x4
48 #define DIR825C1_MAC1_OFFSET 0x18
49 #define DIR825C1_WMAC_CALDATA_OFFSET 0x1000
50 #define DIR825C1_PCIE_CALDATA_OFFSET 0x5000
51
52 static struct gpio_led dir825c1_leds_gpio[] __initdata = {
53 {
54 .name = "d-link:blue:usb",
55 .gpio = DIR825C1_GPIO_LED_BLUE_USB,
56 .active_low = 1,
57 },
58 {
59 .name = "d-link:amber:power",
60 .gpio = DIR825C1_GPIO_LED_AMBER_POWER,
61 .active_low = 1,
62 },
63 {
64 .name = "d-link:blue:power",
65 .gpio = DIR825C1_GPIO_LED_BLUE_POWER,
66 .active_low = 1,
67 },
68 {
69 .name = "d-link:blue:wps",
70 .gpio = DIR825C1_GPIO_LED_BLUE_WPS,
71 .active_low = 1,
72 },
73 {
74 .name = "d-link:amber:planet",
75 .gpio = DIR825C1_GPIO_LED_AMBER_PLANET,
76 .active_low = 1,
77 },
78 {
79 .name = "d-link:blue:wlan2g",
80 .gpio = DIR825C1_GPIO_LED_WLAN_2G,
81 .active_low = 1,
82 },
83 };
84
85 static struct gpio_led dir835a1_leds_gpio[] __initdata = {
86 {
87 .name = "d-link:amber:power",
88 .gpio = DIR825C1_GPIO_LED_AMBER_POWER,
89 .active_low = 1,
90 },
91 {
92 .name = "d-link:green:power",
93 .gpio = DIR825C1_GPIO_LED_BLUE_POWER,
94 .active_low = 1,
95 },
96 {
97 .name = "d-link:blue:wps",
98 .gpio = DIR825C1_GPIO_LED_BLUE_WPS,
99 .active_low = 1,
100 },
101 {
102 .name = "d-link:amber:planet",
103 .gpio = DIR825C1_GPIO_LED_AMBER_PLANET,
104 .active_low = 1,
105 },
106 {
107 .name = "d-link:green:planet",
108 .gpio = DIR825C1_GPIO_LED_BLUE_PLANET,
109 .active_low = 1,
110 },
111 };
112
113 static struct gpio_keys_button dir825c1_gpio_keys[] __initdata = {
114 {
115 .desc = "Soft reset",
116 .type = EV_KEY,
117 .code = KEY_RESTART,
118 .debounce_interval = DIR825C1_KEYS_DEBOUNCE_INTERVAL,
119 .gpio = DIR825C1_GPIO_BTN_RESET,
120 .active_low = 1,
121 },
122 {
123 .desc = "WPS button",
124 .type = EV_KEY,
125 .code = KEY_WPS_BUTTON,
126 .debounce_interval = DIR825C1_KEYS_DEBOUNCE_INTERVAL,
127 .gpio = DIR825C1_GPIO_BTN_WPS,
128 .active_low = 1,
129 },
130 };
131
132 static struct ar8327_pad_cfg dir825c1_ar8327_pad0_cfg = {
133 .mode = AR8327_PAD_MAC_RGMII,
134 .txclk_delay_en = true,
135 .rxclk_delay_en = true,
136 .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
137 .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
138 };
139
140 static struct ar8327_led_cfg dir825c1_ar8327_led_cfg = {
141 .led_ctrl0 = 0x00000000,
142 .led_ctrl1 = 0xc737c737,
143 .led_ctrl2 = 0x00000000,
144 .led_ctrl3 = 0x00c30c00,
145 .open_drain = true,
146 };
147
148 static struct ar8327_platform_data dir825c1_ar8327_data = {
149 .pad0_cfg = &dir825c1_ar8327_pad0_cfg,
150 .port0_cfg = {
151 .force_link = 1,
152 .speed = AR8327_PORT_SPEED_1000,
153 .duplex = 1,
154 .txpause = 1,
155 .rxpause = 1,
156 },
157 .led_cfg = &dir825c1_ar8327_led_cfg,
158 };
159
160 static struct mdio_board_info dir825c1_mdio0_info[] = {
161 {
162 .bus_id = "ag71xx-mdio.0",
163 .phy_addr = 0,
164 .platform_data = &dir825c1_ar8327_data,
165 },
166 };
167
168 static void __init dir825c1_generic_setup(void)
169 {
170 u8 *mac = (u8 *) KSEG1ADDR(0x1ffe0000);
171 u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
172 u8 mac0[ETH_ALEN], mac1[ETH_ALEN];
173 u8 wmac0[ETH_ALEN], wmac1[ETH_ALEN];
174
175 ath79_parse_ascii_mac(mac + DIR825C1_MAC0_OFFSET, mac0);
176 ath79_parse_ascii_mac(mac + DIR825C1_MAC1_OFFSET, mac1);
177
178 ath79_register_m25p80(NULL);
179
180 ath79_register_gpio_keys_polled(-1, DIR825C1_KEYS_POLL_INTERVAL,
181 ARRAY_SIZE(dir825c1_gpio_keys),
182 dir825c1_gpio_keys);
183
184 ath79_init_mac(wmac0, mac0, 0);
185 ath79_register_wmac(art + DIR825C1_WMAC_CALDATA_OFFSET, wmac0);
186
187 ath79_init_mac(wmac1, mac1, 1);
188 ap91_pci_init(art + DIR825C1_PCIE_CALDATA_OFFSET, wmac1);
189
190 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
191
192 mdiobus_register_board_info(dir825c1_mdio0_info,
193 ARRAY_SIZE(dir825c1_mdio0_info));
194
195 ath79_register_mdio(0, 0x0);
196
197 ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0);
198
199 /* GMAC0 is connected to an AR8327N switch */
200 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
201 ath79_eth0_data.phy_mask = BIT(0);
202 ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
203 ath79_eth0_pll_data.pll_1000 = 0x06000000;
204 ath79_register_eth(0);
205
206 ath79_register_usb();
207 }
208
209 static void __init dir825c1_setup(void)
210 {
211 ath79_gpio_output_select(DIR825C1_GPIO_LED_BLUE_USB,
212 AR934X_GPIO_OUT_GPIO);
213
214 gpio_request_one(DIR825C1_GPIO_WAN_LED_ENABLE,
215 GPIOF_OUT_INIT_LOW, "WAN LED enable");
216
217 ath79_register_leds_gpio(-1, ARRAY_SIZE(dir825c1_leds_gpio),
218 dir825c1_leds_gpio);
219
220 ap9x_pci_setup_wmac_led_pin(0, 13);
221 ap9x_pci_setup_wmac_led_pin(1, 32);
222
223 dir825c1_generic_setup();
224 }
225
226 static void __init dir835a1_setup(void)
227 {
228 dir825c1_ar8327_data.led_cfg = NULL;
229
230 ath79_register_leds_gpio(-1, ARRAY_SIZE(dir835a1_leds_gpio),
231 dir835a1_leds_gpio);
232
233 dir825c1_generic_setup();
234 }
235
236 MIPS_MACHINE(ATH79_MACH_DIR_825_C1, "DIR-825-C1",
237 "D-Link DIR-825 rev. C1",
238 dir825c1_setup);
239
240 MIPS_MACHINE(ATH79_MACH_DIR_835_A1, "DIR-835-A1",
241 "D-Link DIR-835 rev. A1",
242 dir835a1_setup);