ar71xx: add kernel support for WD My Net N750
[openwrt/staging/lynxis.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-mynet-n750.c
1 /*
2 * WD My Net N750 board support
3 *
4 * Copyright (C) 2013 Felix Kaechele <felix@fetzig.org>
5 * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation.
10 */
11
12 #include <linux/pci.h>
13 #include <linux/phy.h>
14 #include <linux/gpio.h>
15 #include <linux/platform_device.h>
16 #include <linux/ath9k_platform.h>
17 #include <linux/ar8216_platform.h>
18
19 #include <asm/mach-ath79/ar71xx_regs.h>
20
21 #include "common.h"
22 #include "dev-ap9x-pci.h"
23 #include "dev-eth.h"
24 #include "dev-gpio-buttons.h"
25 #include "dev-leds-gpio.h"
26 #include "dev-m25p80.h"
27 #include "dev-spi.h"
28 #include "dev-usb.h"
29 #include "dev-wmac.h"
30 #include "machtypes.h"
31 #include "nvram.h"
32
33
34 /*
35 * Taken from GPL bootloader source:
36 * board/ar7240/db12x/alpha_gpio.c
37 */
38 #define MYNET_N750_GPIO_LED_WIFI 11
39 #define MYNET_N750_GPIO_LED_INTERNET 12
40 #define MYNET_N750_GPIO_LED_WPS 13
41 #define MYNET_N750_GPIO_LED_POWER 14
42
43 #define MYNET_N750_GPIO_BTN_RESET 17
44 #define MYNET_N750_GPIO_BTN_WPS 19
45
46 #define MYNET_N750_GPIO_EXTERNAL_LNA0 15
47 #define MYNET_N750_GPIO_EXTERNAL_LNA1 18
48
49 #define MYNET_N750_KEYS_POLL_INTERVAL 20 /* msecs */
50 #define MYNET_N750_KEYS_DEBOUNCE_INTERVAL (3 * MYNET_N750_KEYS_POLL_INTERVAL)
51
52 #define MYNET_N750_WMAC_CALDATA_OFFSET 0x1000
53 #define MYNET_N750_PCIE_CALDATA_OFFSET 0x5000
54
55 #define MYNET_N750_NVRAM_ADDR 0x1f058010
56 #define MYNET_N750_NVRAM_SIZE 0x7ff0
57
58 static struct gpio_led mynet_n750_leds_gpio[] __initdata = {
59 {
60 .name = "wd:blue:power",
61 .gpio = MYNET_N750_GPIO_LED_POWER,
62 .active_low = 0,
63 },
64 {
65 .name = "wd:blue:wps",
66 .gpio = MYNET_N750_GPIO_LED_WPS,
67 .active_low = 0,
68 },
69 {
70 .name = "wd:blue:wireless",
71 .gpio = MYNET_N750_GPIO_LED_WIFI,
72 .active_low = 0,
73 },
74 {
75 .name = "wd:blue:internet",
76 .gpio = MYNET_N750_GPIO_LED_INTERNET,
77 .active_low = 0,
78 },
79 };
80
81 static struct gpio_keys_button mynet_n750_gpio_keys[] __initdata = {
82 {
83 .desc = "Reset button",
84 .type = EV_KEY,
85 .code = KEY_RESTART,
86 .debounce_interval = MYNET_N750_KEYS_DEBOUNCE_INTERVAL,
87 .gpio = MYNET_N750_GPIO_BTN_RESET,
88 .active_low = 1,
89 },
90 {
91 .desc = "WPS button",
92 .type = EV_KEY,
93 .code = KEY_WPS_BUTTON,
94 .debounce_interval = MYNET_N750_KEYS_DEBOUNCE_INTERVAL,
95 .gpio = MYNET_N750_GPIO_BTN_WPS,
96 .active_low = 1,
97 },
98 };
99
100 static struct ar8327_pad_cfg mynet_n750_ar8327_pad0_cfg = {
101 .mode = AR8327_PAD_MAC_RGMII,
102 .txclk_delay_en = true,
103 .rxclk_delay_en = true,
104 .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
105 .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
106 };
107
108 static struct ar8327_led_cfg mynet_n750_ar8327_led_cfg = {
109 .led_ctrl0 = 0xc737c737,
110 .led_ctrl1 = 0x00000000,
111 .led_ctrl2 = 0x00000000,
112 .led_ctrl3 = 0x0030c300,
113 .open_drain = false,
114 };
115
116 static struct ar8327_platform_data mynet_n750_ar8327_data = {
117 .pad0_cfg = &mynet_n750_ar8327_pad0_cfg,
118 .port0_cfg = {
119 .force_link = 1,
120 .speed = AR8327_PORT_SPEED_1000,
121 .duplex = 1,
122 .txpause = 1,
123 .rxpause = 1,
124 },
125 .led_cfg = &mynet_n750_ar8327_led_cfg,
126 };
127
128 static struct mdio_board_info mynet_n750_mdio0_info[] = {
129 {
130 .bus_id = "ag71xx-mdio.0",
131 .phy_addr = 0,
132 .platform_data = &mynet_n750_ar8327_data,
133 },
134 };
135
136 static void mynet_n750_get_mac(const char *name, char *mac)
137 {
138 u8 *nvram = (u8 *) KSEG1ADDR(MYNET_N750_NVRAM_ADDR);
139 int err;
140
141 err = ath79_nvram_parse_mac_addr(nvram, MYNET_N750_NVRAM_SIZE,
142 name, mac);
143 if (err)
144 pr_err("no MAC address found for %s\n", name);
145 }
146
147 static void __init mynet_n750_setup(void)
148 {
149 u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
150 u8 tmpmac[ETH_ALEN];
151
152 ath79_register_m25p80(NULL);
153 ath79_register_leds_gpio(-1, ARRAY_SIZE(mynet_n750_leds_gpio),
154 mynet_n750_leds_gpio);
155 ath79_register_gpio_keys_polled(-1, MYNET_N750_KEYS_POLL_INTERVAL,
156 ARRAY_SIZE(mynet_n750_gpio_keys),
157 mynet_n750_gpio_keys);
158 /*
159 * Control signal for external LNAs 0 and 1
160 * Taken from GPL bootloader source:
161 * board/ar7240/db12x/alpha_gpio.c
162 */
163 gpio_request_one(MYNET_N750_GPIO_EXTERNAL_LNA0,
164 GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
165 "External LNA0");
166 gpio_request_one(MYNET_N750_GPIO_EXTERNAL_LNA1,
167 GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
168 "External LNA1");
169
170 mynet_n750_get_mac("wlan24mac=", tmpmac);
171 ath79_register_wmac(art + MYNET_N750_WMAC_CALDATA_OFFSET, tmpmac);
172
173 mynet_n750_get_mac("wlan5mac=", tmpmac);
174 ap91_pci_init(art + MYNET_N750_PCIE_CALDATA_OFFSET, tmpmac);
175
176 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
177
178 mdiobus_register_board_info(mynet_n750_mdio0_info,
179 ARRAY_SIZE(mynet_n750_mdio0_info));
180
181 ath79_register_mdio(0, 0x0);
182
183 mynet_n750_get_mac("lanmac=", ath79_eth0_data.mac_addr);
184
185 /* GMAC0 is connected to an AR8327N switch */
186 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
187 ath79_eth0_data.phy_mask = BIT(0);
188 ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
189 ath79_eth0_pll_data.pll_1000 = 0x06000000;
190 ath79_register_eth(0);
191
192 ath79_register_usb();
193 }
194
195 MIPS_MACHINE(ATH79_MACH_MYNET_N750, "MYNET-N750", "WD My Net N750",
196 mynet_n750_setup);