ar71xx: om2p-hs: use correct bit mask to disable JTAG functionality
[openwrt/svn-archive/archive.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-mzk-w04nu.c
1 /*
2 * Planex MZK-W04NU board support
3 *
4 * Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 */
10
11 #include <asm/mach-ath79/ath79.h>
12
13 #include "dev-eth.h"
14 #include "dev-gpio-buttons.h"
15 #include "dev-leds-gpio.h"
16 #include "dev-m25p80.h"
17 #include "dev-usb.h"
18 #include "dev-wmac.h"
19 #include "machtypes.h"
20
21 #define MZK_W04NU_GPIO_LED_USB 0
22 #define MZK_W04NU_GPIO_LED_STATUS 1
23 #define MZK_W04NU_GPIO_LED_WPS 3
24 #define MZK_W04NU_GPIO_LED_WLAN 6
25 #define MZK_W04NU_GPIO_LED_AP 15
26 #define MZK_W04NU_GPIO_LED_ROUTER 16
27
28 #define MZK_W04NU_GPIO_BTN_APROUTER 5
29 #define MZK_W04NU_GPIO_BTN_WPS 12
30 #define MZK_W04NU_GPIO_BTN_RESET 21
31
32 #define MZK_W04NU_KEYS_POLL_INTERVAL 20 /* msecs */
33 #define MZK_W04NU_KEYS_DEBOUNCE_INTERVAL (3 * MZK_W04NU_KEYS_POLL_INTERVAL)
34
35 static struct gpio_led mzk_w04nu_leds_gpio[] __initdata = {
36 {
37 .name = "planex:green:status",
38 .gpio = MZK_W04NU_GPIO_LED_STATUS,
39 .active_low = 1,
40 }, {
41 .name = "planex:blue:wps",
42 .gpio = MZK_W04NU_GPIO_LED_WPS,
43 .active_low = 1,
44 }, {
45 .name = "planex:green:wlan",
46 .gpio = MZK_W04NU_GPIO_LED_WLAN,
47 .active_low = 1,
48 }, {
49 .name = "planex:green:usb",
50 .gpio = MZK_W04NU_GPIO_LED_USB,
51 .active_low = 1,
52 }, {
53 .name = "planex:green:ap",
54 .gpio = MZK_W04NU_GPIO_LED_AP,
55 .active_low = 1,
56 }, {
57 .name = "planex:green:router",
58 .gpio = MZK_W04NU_GPIO_LED_ROUTER,
59 .active_low = 1,
60 }
61 };
62
63 static struct gpio_keys_button mzk_w04nu_gpio_keys[] __initdata = {
64 {
65 .desc = "reset",
66 .type = EV_KEY,
67 .code = KEY_RESTART,
68 .debounce_interval = MZK_W04NU_KEYS_DEBOUNCE_INTERVAL,
69 .gpio = MZK_W04NU_GPIO_BTN_RESET,
70 .active_low = 1,
71 }, {
72 .desc = "wps",
73 .type = EV_KEY,
74 .code = KEY_WPS_BUTTON,
75 .debounce_interval = MZK_W04NU_KEYS_DEBOUNCE_INTERVAL,
76 .gpio = MZK_W04NU_GPIO_BTN_WPS,
77 .active_low = 1,
78 }, {
79 .desc = "aprouter",
80 .type = EV_KEY,
81 .code = BTN_2,
82 .debounce_interval = MZK_W04NU_KEYS_DEBOUNCE_INTERVAL,
83 .gpio = MZK_W04NU_GPIO_BTN_APROUTER,
84 .active_low = 0,
85 }
86 };
87
88 #define MZK_W04NU_WAN_PHYMASK BIT(4)
89 #define MZK_W04NU_MDIO_MASK (~MZK_W04NU_WAN_PHYMASK)
90
91 static void __init mzk_w04nu_setup(void)
92 {
93 u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000);
94
95 ath79_register_mdio(0, MZK_W04NU_MDIO_MASK);
96
97 ath79_init_mac(ath79_eth0_data.mac_addr, eeprom, 0);
98 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
99 ath79_eth0_data.speed = SPEED_100;
100 ath79_eth0_data.duplex = DUPLEX_FULL;
101 ath79_eth0_data.has_ar8216 = 1;
102
103 ath79_init_mac(ath79_eth1_data.mac_addr, eeprom, 1);
104 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
105 ath79_eth1_data.phy_mask = MZK_W04NU_WAN_PHYMASK;
106
107 ath79_register_eth(0);
108 ath79_register_eth(1);
109
110 ath79_register_m25p80(NULL);
111
112 ath79_register_leds_gpio(-1, ARRAY_SIZE(mzk_w04nu_leds_gpio),
113 mzk_w04nu_leds_gpio);
114
115 ath79_register_gpio_keys_polled(-1, MZK_W04NU_KEYS_POLL_INTERVAL,
116 ARRAY_SIZE(mzk_w04nu_gpio_keys),
117 mzk_w04nu_gpio_keys);
118 ath79_register_usb();
119
120 ath79_register_wmac(eeprom, NULL);
121 }
122
123 MIPS_MACHINE(ATH79_MACH_MZK_W04NU, "MZK-W04NU", "Planex MZK-W04NU",
124 mzk_w04nu_setup);