2 * MikroTik RouterBOARD 4xx series support
4 * Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation.
12 #include <linux/platform_device.h>
13 #include <linux/irq.h>
14 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,4,0)
15 #include <linux/mdio-gpio.h>
17 #include <linux/platform_data/mdio-gpio.h>
19 #include <linux/mmc/host.h>
20 #include <linux/spi/spi.h>
21 #include <linux/spi/flash.h>
22 #include <linux/spi/mmc_spi.h>
23 #include <linux/mtd/mtd.h>
24 #include <linux/mtd/partitions.h>
26 #include <asm/mach-ath79/ar71xx_regs.h>
27 #include <asm/mach-ath79/ath79.h>
28 #include <asm/mach-ath79/rb4xx_cpld.h>
32 #include "dev-gpio-buttons.h"
33 #include "dev-leds-gpio.h"
35 #include "machtypes.h"
38 #define RB4XX_GPIO_USER_LED 4
39 #define RB4XX_GPIO_RESET_SWITCH 7
41 #define RB4XX_GPIO_CPLD_BASE 32
42 #define RB4XX_GPIO_CPLD_LED1 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED1)
43 #define RB4XX_GPIO_CPLD_LED2 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED2)
44 #define RB4XX_GPIO_CPLD_LED3 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED3)
45 #define RB4XX_GPIO_CPLD_LED4 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED4)
46 #define RB4XX_GPIO_CPLD_LED5 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED5)
48 #define RB4XX_KEYS_POLL_INTERVAL 20 /* msecs */
49 #define RB4XX_KEYS_DEBOUNCE_INTERVAL (3 * RB4XX_KEYS_POLL_INTERVAL)
51 static struct gpio_led rb4xx_leds_gpio
[] __initdata
= {
53 .name
= "rb4xx:yellow:user",
54 .gpio
= RB4XX_GPIO_USER_LED
,
57 .name
= "rb4xx:green:led1",
58 .gpio
= RB4XX_GPIO_CPLD_LED1
,
61 .name
= "rb4xx:green:led2",
62 .gpio
= RB4XX_GPIO_CPLD_LED2
,
65 .name
= "rb4xx:green:led3",
66 .gpio
= RB4XX_GPIO_CPLD_LED3
,
69 .name
= "rb4xx:green:led4",
70 .gpio
= RB4XX_GPIO_CPLD_LED4
,
73 .name
= "rb4xx:green:led5",
74 .gpio
= RB4XX_GPIO_CPLD_LED5
,
79 static struct gpio_keys_button rb4xx_gpio_keys
[] __initdata
= {
81 .desc
= "reset_switch",
84 .debounce_interval
= RB4XX_KEYS_DEBOUNCE_INTERVAL
,
85 .gpio
= RB4XX_GPIO_RESET_SWITCH
,
90 static struct platform_device rb4xx_nand_device
= {
95 static struct ath79_pci_irq rb4xx_pci_irqs
[] __initdata
= {
99 .irq
= ATH79_PCI_IRQ(2),
103 .irq
= ATH79_PCI_IRQ(0),
107 .irq
= ATH79_PCI_IRQ(1),
111 .irq
= ATH79_PCI_IRQ(1),
115 .irq
= ATH79_PCI_IRQ(2),
119 .irq
= ATH79_PCI_IRQ(2),
123 .irq
= ATH79_PCI_IRQ(0),
127 .irq
= ATH79_PCI_IRQ(0),
131 .irq
= ATH79_PCI_IRQ(1),
135 .irq
= ATH79_PCI_IRQ(2),
139 .irq
= ATH79_PCI_IRQ(2),
143 .irq
= ATH79_PCI_IRQ(0),
147 static struct mtd_partition rb4xx_partitions
[] = {
149 .name
= "routerboot",
152 .mask_flags
= MTD_WRITEABLE
,
154 .name
= "hard_config",
157 .mask_flags
= MTD_WRITEABLE
,
162 .mask_flags
= MTD_WRITEABLE
,
164 .name
= "soft_config",
170 static struct flash_platform_data rb4xx_flash_data
= {
172 .parts
= rb4xx_partitions
,
173 .nr_parts
= ARRAY_SIZE(rb4xx_partitions
),
176 static struct rb4xx_cpld_platform_data rb4xx_cpld_data
= {
177 .gpio_base
= RB4XX_GPIO_CPLD_BASE
,
180 static struct mmc_spi_platform_data rb4xx_mmc_data
= {
181 .ocr_mask
= MMC_VDD_32_33
| MMC_VDD_33_34
,
184 static struct spi_board_info rb4xx_spi_info
[] = {
188 .max_speed_hz
= 25000000,
189 .modalias
= "m25p80",
190 .platform_data
= &rb4xx_flash_data
,
194 .max_speed_hz
= 25000000,
195 .modalias
= "spi-rb4xx-cpld",
196 .platform_data
= &rb4xx_cpld_data
,
200 static struct spi_board_info rb4xx_microsd_info
[] = {
204 .max_speed_hz
= 25000000,
205 .modalias
= "mmc_spi",
206 .platform_data
= &rb4xx_mmc_data
,
211 static struct resource rb4xx_spi_resources
[] = {
213 .start
= AR71XX_SPI_BASE
,
214 .end
= AR71XX_SPI_BASE
+ AR71XX_SPI_SIZE
- 1,
215 .flags
= IORESOURCE_MEM
,
219 static struct platform_device rb4xx_spi_device
= {
222 .resource
= rb4xx_spi_resources
,
223 .num_resources
= ARRAY_SIZE(rb4xx_spi_resources
),
226 static void __init
rb4xx_generic_setup(void)
228 ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN
|
229 AR71XX_GPIO_FUNC_SPI_CS2_EN
);
231 ath79_register_leds_gpio(-1, ARRAY_SIZE(rb4xx_leds_gpio
),
234 ath79_register_gpio_keys_polled(-1, RB4XX_KEYS_POLL_INTERVAL
,
235 ARRAY_SIZE(rb4xx_gpio_keys
),
238 spi_register_board_info(rb4xx_spi_info
, ARRAY_SIZE(rb4xx_spi_info
));
239 platform_device_register(&rb4xx_spi_device
);
240 platform_device_register(&rb4xx_nand_device
);
243 static void __init
rb411_setup(void)
245 rb4xx_generic_setup();
246 spi_register_board_info(rb4xx_microsd_info
,
247 ARRAY_SIZE(rb4xx_microsd_info
));
249 ath79_register_mdio(0, 0xfffffffc);
251 ath79_init_mac(ath79_eth0_data
.mac_addr
, ath79_mac_base
, 0);
252 ath79_eth0_data
.phy_if_mode
= PHY_INTERFACE_MODE_MII
;
253 ath79_eth0_data
.phy_mask
= 0x00000003;
255 ath79_register_eth(0);
257 ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs
), rb4xx_pci_irqs
);
258 ath79_register_pci();
261 MIPS_MACHINE(ATH79_MACH_RB_411
, "411", "MikroTik RouterBOARD 411/A/AH",
264 static void __init
rb411u_setup(void)
267 ath79_register_usb();
270 MIPS_MACHINE(ATH79_MACH_RB_411U
, "411U", "MikroTik RouterBOARD 411U",
273 #define RB433_LAN_PHYMASK BIT(0)
274 #define RB433_WAN_PHYMASK BIT(4)
275 #define RB433_MDIO_PHYMASK (RB433_LAN_PHYMASK | RB433_WAN_PHYMASK)
277 static void __init
rb433_setup(void)
279 rb4xx_generic_setup();
280 spi_register_board_info(rb4xx_microsd_info
,
281 ARRAY_SIZE(rb4xx_microsd_info
));
283 ath79_register_mdio(0, ~RB433_MDIO_PHYMASK
);
285 ath79_init_mac(ath79_eth0_data
.mac_addr
, ath79_mac_base
, 1);
286 ath79_eth0_data
.phy_if_mode
= PHY_INTERFACE_MODE_MII
;
287 ath79_eth0_data
.phy_mask
= RB433_LAN_PHYMASK
;
289 ath79_init_mac(ath79_eth1_data
.mac_addr
, ath79_mac_base
, 0);
290 ath79_eth1_data
.phy_if_mode
= PHY_INTERFACE_MODE_RMII
;
291 ath79_eth1_data
.phy_mask
= RB433_WAN_PHYMASK
;
293 ath79_register_eth(1);
294 ath79_register_eth(0);
296 ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs
), rb4xx_pci_irqs
);
297 ath79_register_pci();
300 MIPS_MACHINE(ATH79_MACH_RB_433
, "433", "MikroTik RouterBOARD 433/AH",
303 static void __init
rb433u_setup(void)
306 ath79_register_usb();
309 MIPS_MACHINE(ATH79_MACH_RB_433U
, "433U", "MikroTik RouterBOARD 433UAH",
312 static void __init
rb435g_setup(void)
314 rb4xx_generic_setup();
316 spi_register_board_info(rb4xx_microsd_info
,
317 ARRAY_SIZE(rb4xx_microsd_info
));
319 ath79_register_mdio(0, ~RB433_MDIO_PHYMASK
);
321 ath79_init_mac(ath79_eth0_data
.mac_addr
, ath79_mac_base
, 1);
322 ath79_eth0_data
.phy_if_mode
= PHY_INTERFACE_MODE_RGMII
;
323 ath79_eth0_data
.phy_mask
= RB433_LAN_PHYMASK
;
325 ath79_init_mac(ath79_eth1_data
.mac_addr
, ath79_mac_base
, 0);
326 ath79_eth1_data
.phy_if_mode
= PHY_INTERFACE_MODE_RGMII
;
327 ath79_eth1_data
.phy_mask
= RB433_WAN_PHYMASK
;
329 ath79_register_eth(1);
330 ath79_register_eth(0);
332 ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs
), rb4xx_pci_irqs
);
333 ath79_register_pci();
335 ath79_register_usb();
338 MIPS_MACHINE(ATH79_MACH_RB_435G
, "435G", "MikroTik RouterBOARD 435G",
341 #define RB450_LAN_PHYMASK BIT(0)
342 #define RB450_WAN_PHYMASK BIT(4)
343 #define RB450_MDIO_PHYMASK (RB450_LAN_PHYMASK | RB450_WAN_PHYMASK)
345 static void __init
rb450_generic_setup(int gige
)
347 rb4xx_generic_setup();
348 ath79_register_mdio(0, ~RB450_MDIO_PHYMASK
);
350 ath79_init_mac(ath79_eth0_data
.mac_addr
, ath79_mac_base
, 1);
351 ath79_eth0_data
.phy_if_mode
= (gige
) ?
352 PHY_INTERFACE_MODE_RGMII
: PHY_INTERFACE_MODE_MII
;
353 ath79_eth0_data
.phy_mask
= RB450_LAN_PHYMASK
;
355 ath79_init_mac(ath79_eth1_data
.mac_addr
, ath79_mac_base
, 0);
356 ath79_eth1_data
.phy_if_mode
= (gige
) ?
357 PHY_INTERFACE_MODE_RGMII
: PHY_INTERFACE_MODE_RMII
;
358 ath79_eth1_data
.phy_mask
= RB450_WAN_PHYMASK
;
360 ath79_register_eth(1);
361 ath79_register_eth(0);
364 static void __init
rb450_setup(void)
366 rb450_generic_setup(0);
369 MIPS_MACHINE(ATH79_MACH_RB_450
, "450", "MikroTik RouterBOARD 450",
372 static void __init
rb450g_setup(void)
374 rb450_generic_setup(1);
375 spi_register_board_info(rb4xx_microsd_info
,
376 ARRAY_SIZE(rb4xx_microsd_info
));
379 MIPS_MACHINE(ATH79_MACH_RB_450G
, "450G", "MikroTik RouterBOARD 450G",
382 static void __init
rb493_setup(void)
384 rb4xx_generic_setup();
386 ath79_register_mdio(0, 0x3fffff00);
388 ath79_init_mac(ath79_eth0_data
.mac_addr
, ath79_mac_base
, 0);
389 ath79_eth0_data
.phy_if_mode
= PHY_INTERFACE_MODE_MII
;
390 ath79_eth0_data
.speed
= SPEED_100
;
391 ath79_eth0_data
.duplex
= DUPLEX_FULL
;
393 ath79_init_mac(ath79_eth1_data
.mac_addr
, ath79_mac_base
, 1);
394 ath79_eth1_data
.phy_if_mode
= PHY_INTERFACE_MODE_RMII
;
395 ath79_eth1_data
.phy_mask
= 0x00000001;
397 ath79_register_eth(0);
398 ath79_register_eth(1);
400 ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs
), rb4xx_pci_irqs
);
401 ath79_register_pci();
404 MIPS_MACHINE(ATH79_MACH_RB_493
, "493", "MikroTik RouterBOARD 493/AH",
407 #define RB493G_GPIO_MDIO_MDC 7
408 #define RB493G_GPIO_MDIO_DATA 8
410 #define RB493G_MDIO_PHYMASK BIT(0)
412 static struct mdio_gpio_platform_data rb493g_mdio_data
= {
413 .mdc
= RB493G_GPIO_MDIO_MDC
,
414 .mdio
= RB493G_GPIO_MDIO_DATA
,
416 .phy_mask
= ~RB493G_MDIO_PHYMASK
,
419 static struct platform_device rb493g_mdio_device
= {
423 .platform_data
= &rb493g_mdio_data
,
427 static void __init
rb493g_setup(void)
429 ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN
|
430 AR71XX_GPIO_FUNC_SPI_CS2_EN
);
432 ath79_register_leds_gpio(-1, ARRAY_SIZE(rb4xx_leds_gpio
),
435 spi_register_board_info(rb4xx_spi_info
, ARRAY_SIZE(rb4xx_spi_info
));
436 spi_register_board_info(rb4xx_microsd_info
,
437 ARRAY_SIZE(rb4xx_microsd_info
));
439 platform_device_register(&rb4xx_spi_device
);
440 platform_device_register(&rb4xx_nand_device
);
442 ath79_register_mdio(0, ~RB493G_MDIO_PHYMASK
);
444 ath79_init_mac(ath79_eth0_data
.mac_addr
, ath79_mac_base
, 0);
445 ath79_eth0_data
.phy_if_mode
= PHY_INTERFACE_MODE_RGMII
;
446 ath79_eth0_data
.phy_mask
= RB493G_MDIO_PHYMASK
;
447 ath79_eth0_data
.speed
= SPEED_1000
;
448 ath79_eth0_data
.duplex
= DUPLEX_FULL
;
450 ath79_init_mac(ath79_eth1_data
.mac_addr
, ath79_mac_base
, 1);
451 ath79_eth1_data
.phy_if_mode
= PHY_INTERFACE_MODE_RGMII
;
452 ath79_eth1_data
.mii_bus_dev
= &rb493g_mdio_device
.dev
;
453 ath79_eth1_data
.phy_mask
= RB493G_MDIO_PHYMASK
;
454 ath79_eth1_data
.speed
= SPEED_1000
;
455 ath79_eth1_data
.duplex
= DUPLEX_FULL
;
457 platform_device_register(&rb493g_mdio_device
);
459 ath79_register_eth(1);
460 ath79_register_eth(0);
462 ath79_register_usb();
464 ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs
), rb4xx_pci_irqs
);
465 ath79_register_pci();
468 MIPS_MACHINE(ATH79_MACH_RB_493G
, "493G", "MikroTik RouterBOARD 493G",