2 * MikroTik RouterBOARD 4xx series support
4 * Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation.
12 #include <linux/platform_device.h>
13 #include <linux/irq.h>
14 #include <linux/version.h>
15 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,4,0)
16 #include <linux/mdio-gpio.h>
18 #include <linux/platform_data/mdio-gpio.h>
20 #include <linux/mmc/host.h>
21 #include <linux/spi/spi.h>
22 #include <linux/spi/flash.h>
23 #include <linux/spi/mmc_spi.h>
24 #include <linux/mtd/mtd.h>
25 #include <linux/mtd/partitions.h>
27 #include <asm/mach-ath79/ar71xx_regs.h>
28 #include <asm/mach-ath79/ath79.h>
29 #include <asm/mach-ath79/rb4xx_cpld.h>
33 #include "dev-gpio-buttons.h"
34 #include "dev-leds-gpio.h"
36 #include "machtypes.h"
39 #define RB4XX_GPIO_USER_LED 4
40 #define RB4XX_GPIO_RESET_SWITCH 7
42 #define RB4XX_GPIO_CPLD_BASE 32
43 #define RB4XX_GPIO_CPLD_LED1 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED1)
44 #define RB4XX_GPIO_CPLD_LED2 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED2)
45 #define RB4XX_GPIO_CPLD_LED3 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED3)
46 #define RB4XX_GPIO_CPLD_LED4 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED4)
47 #define RB4XX_GPIO_CPLD_LED5 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED5)
49 #define RB4XX_KEYS_POLL_INTERVAL 20 /* msecs */
50 #define RB4XX_KEYS_DEBOUNCE_INTERVAL (3 * RB4XX_KEYS_POLL_INTERVAL)
52 static struct gpio_led rb4xx_leds_gpio
[] __initdata
= {
54 .name
= "rb4xx:yellow:user",
55 .gpio
= RB4XX_GPIO_USER_LED
,
58 .name
= "rb4xx:green:led1",
59 .gpio
= RB4XX_GPIO_CPLD_LED1
,
62 .name
= "rb4xx:green:led2",
63 .gpio
= RB4XX_GPIO_CPLD_LED2
,
66 .name
= "rb4xx:green:led3",
67 .gpio
= RB4XX_GPIO_CPLD_LED3
,
70 .name
= "rb4xx:green:led4",
71 .gpio
= RB4XX_GPIO_CPLD_LED4
,
74 .name
= "rb4xx:green:led5",
75 .gpio
= RB4XX_GPIO_CPLD_LED5
,
80 static struct gpio_keys_button rb4xx_gpio_keys
[] __initdata
= {
82 .desc
= "reset_switch",
85 .debounce_interval
= RB4XX_KEYS_DEBOUNCE_INTERVAL
,
86 .gpio
= RB4XX_GPIO_RESET_SWITCH
,
91 static struct platform_device rb4xx_nand_device
= {
96 static struct ath79_pci_irq rb4xx_pci_irqs
[] __initdata
= {
100 .irq
= ATH79_PCI_IRQ(2),
104 .irq
= ATH79_PCI_IRQ(0),
108 .irq
= ATH79_PCI_IRQ(1),
112 .irq
= ATH79_PCI_IRQ(1),
116 .irq
= ATH79_PCI_IRQ(2),
120 .irq
= ATH79_PCI_IRQ(2),
124 .irq
= ATH79_PCI_IRQ(0),
128 .irq
= ATH79_PCI_IRQ(0),
132 .irq
= ATH79_PCI_IRQ(1),
136 .irq
= ATH79_PCI_IRQ(2),
140 .irq
= ATH79_PCI_IRQ(2),
144 .irq
= ATH79_PCI_IRQ(0),
148 static struct mtd_partition rb4xx_partitions
[] = {
150 .name
= "routerboot",
153 .mask_flags
= MTD_WRITEABLE
,
155 .name
= "hard_config",
158 .mask_flags
= MTD_WRITEABLE
,
163 .mask_flags
= MTD_WRITEABLE
,
165 .name
= "soft_config",
171 static struct flash_platform_data rb4xx_flash_data
= {
173 .parts
= rb4xx_partitions
,
174 .nr_parts
= ARRAY_SIZE(rb4xx_partitions
),
177 static struct rb4xx_cpld_platform_data rb4xx_cpld_data
= {
178 .gpio_base
= RB4XX_GPIO_CPLD_BASE
,
181 static struct mmc_spi_platform_data rb4xx_mmc_data
= {
182 .ocr_mask
= MMC_VDD_32_33
| MMC_VDD_33_34
,
185 static struct spi_board_info rb4xx_spi_info
[] = {
189 .max_speed_hz
= 25000000,
190 .modalias
= "m25p80",
191 .platform_data
= &rb4xx_flash_data
,
195 .max_speed_hz
= 25000000,
196 .modalias
= "spi-rb4xx-cpld",
197 .platform_data
= &rb4xx_cpld_data
,
201 static struct spi_board_info rb4xx_microsd_info
[] = {
205 .max_speed_hz
= 25000000,
206 .modalias
= "mmc_spi",
207 .platform_data
= &rb4xx_mmc_data
,
212 static struct resource rb4xx_spi_resources
[] = {
214 .start
= AR71XX_SPI_BASE
,
215 .end
= AR71XX_SPI_BASE
+ AR71XX_SPI_SIZE
- 1,
216 .flags
= IORESOURCE_MEM
,
220 static struct platform_device rb4xx_spi_device
= {
223 .resource
= rb4xx_spi_resources
,
224 .num_resources
= ARRAY_SIZE(rb4xx_spi_resources
),
227 static void __init
rb4xx_generic_setup(void)
229 ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN
|
230 AR71XX_GPIO_FUNC_SPI_CS2_EN
);
232 ath79_register_leds_gpio(-1, ARRAY_SIZE(rb4xx_leds_gpio
),
235 ath79_register_gpio_keys_polled(-1, RB4XX_KEYS_POLL_INTERVAL
,
236 ARRAY_SIZE(rb4xx_gpio_keys
),
239 spi_register_board_info(rb4xx_spi_info
, ARRAY_SIZE(rb4xx_spi_info
));
240 platform_device_register(&rb4xx_spi_device
);
241 platform_device_register(&rb4xx_nand_device
);
244 static void __init
rb411_setup(void)
246 rb4xx_generic_setup();
247 spi_register_board_info(rb4xx_microsd_info
,
248 ARRAY_SIZE(rb4xx_microsd_info
));
250 ath79_register_mdio(0, 0xfffffffc);
252 ath79_init_mac(ath79_eth0_data
.mac_addr
, ath79_mac_base
, 0);
253 ath79_eth0_data
.phy_if_mode
= PHY_INTERFACE_MODE_MII
;
254 ath79_eth0_data
.phy_mask
= 0x00000003;
256 ath79_register_eth(0);
258 ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs
), rb4xx_pci_irqs
);
259 ath79_register_pci();
262 MIPS_MACHINE(ATH79_MACH_RB_411
, "411", "MikroTik RouterBOARD 411/A/AH",
265 static void __init
rb411u_setup(void)
268 ath79_register_usb();
271 MIPS_MACHINE(ATH79_MACH_RB_411U
, "411U", "MikroTik RouterBOARD 411U",
274 #define RB433_LAN_PHYMASK BIT(0)
275 #define RB433_WAN_PHYMASK BIT(4)
276 #define RB433_MDIO_PHYMASK (RB433_LAN_PHYMASK | RB433_WAN_PHYMASK)
278 static void __init
rb433_setup(void)
280 rb4xx_generic_setup();
281 spi_register_board_info(rb4xx_microsd_info
,
282 ARRAY_SIZE(rb4xx_microsd_info
));
284 ath79_register_mdio(0, ~RB433_MDIO_PHYMASK
);
286 ath79_init_mac(ath79_eth0_data
.mac_addr
, ath79_mac_base
, 1);
287 ath79_eth0_data
.phy_if_mode
= PHY_INTERFACE_MODE_MII
;
288 ath79_eth0_data
.phy_mask
= RB433_LAN_PHYMASK
;
290 ath79_init_mac(ath79_eth1_data
.mac_addr
, ath79_mac_base
, 0);
291 ath79_eth1_data
.phy_if_mode
= PHY_INTERFACE_MODE_RMII
;
292 ath79_eth1_data
.phy_mask
= RB433_WAN_PHYMASK
;
294 ath79_register_eth(1);
295 ath79_register_eth(0);
297 ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs
), rb4xx_pci_irqs
);
298 ath79_register_pci();
301 MIPS_MACHINE(ATH79_MACH_RB_433
, "433", "MikroTik RouterBOARD 433/AH",
304 static void __init
rb433u_setup(void)
307 ath79_register_usb();
310 MIPS_MACHINE(ATH79_MACH_RB_433U
, "433U", "MikroTik RouterBOARD 433UAH",
313 static void __init
rb435g_setup(void)
315 rb4xx_generic_setup();
317 spi_register_board_info(rb4xx_microsd_info
,
318 ARRAY_SIZE(rb4xx_microsd_info
));
320 ath79_register_mdio(0, ~RB433_MDIO_PHYMASK
);
322 ath79_init_mac(ath79_eth0_data
.mac_addr
, ath79_mac_base
, 1);
323 ath79_eth0_data
.phy_if_mode
= PHY_INTERFACE_MODE_RGMII
;
324 ath79_eth0_data
.phy_mask
= RB433_LAN_PHYMASK
;
326 ath79_init_mac(ath79_eth1_data
.mac_addr
, ath79_mac_base
, 0);
327 ath79_eth1_data
.phy_if_mode
= PHY_INTERFACE_MODE_RGMII
;
328 ath79_eth1_data
.phy_mask
= RB433_WAN_PHYMASK
;
330 ath79_register_eth(1);
331 ath79_register_eth(0);
333 ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs
), rb4xx_pci_irqs
);
334 ath79_register_pci();
336 ath79_register_usb();
339 MIPS_MACHINE(ATH79_MACH_RB_435G
, "435G", "MikroTik RouterBOARD 435G",
342 #define RB450_LAN_PHYMASK BIT(0)
343 #define RB450_WAN_PHYMASK BIT(4)
344 #define RB450_MDIO_PHYMASK (RB450_LAN_PHYMASK | RB450_WAN_PHYMASK)
346 static void __init
rb450_generic_setup(int gige
)
348 rb4xx_generic_setup();
349 ath79_register_mdio(0, ~RB450_MDIO_PHYMASK
);
351 ath79_init_mac(ath79_eth0_data
.mac_addr
, ath79_mac_base
, 1);
352 ath79_eth0_data
.phy_if_mode
= (gige
) ?
353 PHY_INTERFACE_MODE_RGMII
: PHY_INTERFACE_MODE_MII
;
354 ath79_eth0_data
.phy_mask
= RB450_LAN_PHYMASK
;
356 ath79_init_mac(ath79_eth1_data
.mac_addr
, ath79_mac_base
, 0);
357 ath79_eth1_data
.phy_if_mode
= (gige
) ?
358 PHY_INTERFACE_MODE_RGMII
: PHY_INTERFACE_MODE_RMII
;
359 ath79_eth1_data
.phy_mask
= RB450_WAN_PHYMASK
;
361 ath79_register_eth(1);
362 ath79_register_eth(0);
365 static void __init
rb450_setup(void)
367 rb450_generic_setup(0);
370 MIPS_MACHINE(ATH79_MACH_RB_450
, "450", "MikroTik RouterBOARD 450",
373 static void __init
rb450g_setup(void)
375 rb450_generic_setup(1);
376 spi_register_board_info(rb4xx_microsd_info
,
377 ARRAY_SIZE(rb4xx_microsd_info
));
380 MIPS_MACHINE(ATH79_MACH_RB_450G
, "450G", "MikroTik RouterBOARD 450G",
383 static void __init
rb493_setup(void)
385 rb4xx_generic_setup();
387 ath79_register_mdio(0, 0x3fffff00);
389 ath79_init_mac(ath79_eth0_data
.mac_addr
, ath79_mac_base
, 0);
390 ath79_eth0_data
.phy_if_mode
= PHY_INTERFACE_MODE_MII
;
391 ath79_eth0_data
.speed
= SPEED_100
;
392 ath79_eth0_data
.duplex
= DUPLEX_FULL
;
394 ath79_init_mac(ath79_eth1_data
.mac_addr
, ath79_mac_base
, 1);
395 ath79_eth1_data
.phy_if_mode
= PHY_INTERFACE_MODE_RMII
;
396 ath79_eth1_data
.phy_mask
= 0x00000001;
398 ath79_register_eth(0);
399 ath79_register_eth(1);
401 ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs
), rb4xx_pci_irqs
);
402 ath79_register_pci();
405 MIPS_MACHINE(ATH79_MACH_RB_493
, "493", "MikroTik RouterBOARD 493/AH",
408 #define RB493G_GPIO_MDIO_MDC 7
409 #define RB493G_GPIO_MDIO_DATA 8
411 #define RB493G_MDIO_PHYMASK BIT(0)
413 static struct mdio_gpio_platform_data rb493g_mdio_data
= {
414 .mdc
= RB493G_GPIO_MDIO_MDC
,
415 .mdio
= RB493G_GPIO_MDIO_DATA
,
417 .phy_mask
= ~RB493G_MDIO_PHYMASK
,
420 static struct platform_device rb493g_mdio_device
= {
424 .platform_data
= &rb493g_mdio_data
,
428 static void __init
rb493g_setup(void)
430 ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN
|
431 AR71XX_GPIO_FUNC_SPI_CS2_EN
);
433 ath79_register_leds_gpio(-1, ARRAY_SIZE(rb4xx_leds_gpio
),
436 spi_register_board_info(rb4xx_spi_info
, ARRAY_SIZE(rb4xx_spi_info
));
437 spi_register_board_info(rb4xx_microsd_info
,
438 ARRAY_SIZE(rb4xx_microsd_info
));
440 platform_device_register(&rb4xx_spi_device
);
441 platform_device_register(&rb4xx_nand_device
);
443 ath79_register_mdio(0, ~RB493G_MDIO_PHYMASK
);
445 ath79_init_mac(ath79_eth0_data
.mac_addr
, ath79_mac_base
, 0);
446 ath79_eth0_data
.phy_if_mode
= PHY_INTERFACE_MODE_RGMII
;
447 ath79_eth0_data
.phy_mask
= RB493G_MDIO_PHYMASK
;
448 ath79_eth0_data
.speed
= SPEED_1000
;
449 ath79_eth0_data
.duplex
= DUPLEX_FULL
;
451 ath79_init_mac(ath79_eth1_data
.mac_addr
, ath79_mac_base
, 1);
452 ath79_eth1_data
.phy_if_mode
= PHY_INTERFACE_MODE_RGMII
;
453 ath79_eth1_data
.mii_bus_dev
= &rb493g_mdio_device
.dev
;
454 ath79_eth1_data
.phy_mask
= RB493G_MDIO_PHYMASK
;
455 ath79_eth1_data
.speed
= SPEED_1000
;
456 ath79_eth1_data
.duplex
= DUPLEX_FULL
;
458 platform_device_register(&rb493g_mdio_device
);
460 ath79_register_eth(1);
461 ath79_register_eth(0);
463 ath79_register_usb();
465 ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs
), rb4xx_pci_irqs
);
466 ath79_register_pci();
469 MIPS_MACHINE(ATH79_MACH_RB_493G
, "493G", "MikroTik RouterBOARD 493G",