2 * MikroTik RouterBOARD 91X support
4 * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
11 #define pr_fmt(fmt) "rb91x: " fmt
13 #include <linux/phy.h>
14 #include <linux/delay.h>
15 #include <linux/platform_device.h>
16 #include <linux/ath9k_platform.h>
17 #include <linux/mtd/mtd.h>
18 #include <linux/mtd/nand.h>
19 #include <linux/mtd/partitions.h>
20 #include <linux/spi/spi.h>
21 #include <linux/spi/74x164.h>
22 #include <linux/spi/flash.h>
23 #include <linux/routerboot.h>
24 #include <linux/gpio.h>
25 #include <linux/platform_data/gpio-latch.h>
26 #include <linux/platform_data/rb91x_nand.h>
27 #include <linux/platform_data/phy-at803x.h>
30 #include <asm/mach-ath79/ath79.h>
31 #include <asm/mach-ath79/ath79_spi_platform.h>
32 #include <asm/mach-ath79/ar71xx_regs.h>
36 #include "dev-leds-gpio.h"
41 #include "machtypes.h"
43 #include "routerboot.h"
45 #define RB_ROUTERBOOT_OFFSET 0x0000
46 #define RB_ROUTERBOOT_MIN_SIZE 0xb000
47 #define RB_HARD_CFG_SIZE 0x1000
48 #define RB_BIOS_OFFSET 0xd000
49 #define RB_BIOS_SIZE 0x1000
50 #define RB_SOFT_CFG_OFFSET 0xf000
51 #define RB_SOFT_CFG_SIZE 0x1000
53 #define RB91X_FLAG_USB BIT(0)
54 #define RB91X_FLAG_PCIE BIT(1)
56 #define RB91X_LATCH_GPIO_BASE AR934X_GPIO_COUNT
57 #define RB91X_LATCH_GPIO(_x) (RB91X_LATCH_GPIO_BASE + (_x))
59 #define RB91X_SSR_GPIO_BASE (RB91X_LATCH_GPIO_BASE + AR934X_GPIO_COUNT)
60 #define RB91X_SSR_GPIO(_x) (RB91X_SSR_GPIO_BASE + (_x))
62 #define RB91X_SSR_BIT_LED1 0
63 #define RB91X_SSR_BIT_LED2 1
64 #define RB91X_SSR_BIT_LED3 2
65 #define RB91X_SSR_BIT_LED4 3
66 #define RB91X_SSR_BIT_LED5 4
67 #define RB91X_SSR_BIT_5 5
68 #define RB91X_SSR_BIT_USB_POWER 6
69 #define RB91X_SSR_BIT_PCIE_POWER 7
71 #define RB91X_GPIO_SSR_STROBE RB91X_LATCH_GPIO(0)
72 #define RB91X_GPIO_LED_POWER RB91X_LATCH_GPIO(1)
73 #define RB91X_GPIO_LED_USER RB91X_LATCH_GPIO(2)
74 #define RB91X_GPIO_NAND_READ RB91X_LATCH_GPIO(3)
75 #define RB91X_GPIO_NAND_RDY RB91X_LATCH_GPIO(4)
76 #define RB91X_GPIO_NLE RB91X_LATCH_GPIO(11)
77 #define RB91X_GPIO_NAND_NRW RB91X_LATCH_GPIO(12)
78 #define RB91X_GPIO_NAND_NCE RB91X_LATCH_GPIO(13)
79 #define RB91X_GPIO_NAND_CLE RB91X_LATCH_GPIO(14)
80 #define RB91X_GPIO_NAND_ALE RB91X_LATCH_GPIO(15)
82 #define RB91X_GPIO_LED_1 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED1)
83 #define RB91X_GPIO_LED_2 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED2)
84 #define RB91X_GPIO_LED_3 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED3)
85 #define RB91X_GPIO_LED_4 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED4)
86 #define RB91X_GPIO_LED_5 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED5)
87 #define RB91X_GPIO_USB_POWER RB91X_SSR_GPIO(RB91X_SSR_BIT_USB_POWER)
88 #define RB91X_GPIO_PCIE_POWER RB91X_SSR_GPIO(RB91X_SSR_BIT_PCIE_POWER)
90 struct rb_board_info
{
95 static struct mtd_partition rb711gr100_spi_partitions
[] = {
98 .offset
= RB_ROUTERBOOT_OFFSET
,
99 .mask_flags
= MTD_WRITEABLE
,
101 .name
= "hard_config",
102 .size
= RB_HARD_CFG_SIZE
,
103 .mask_flags
= MTD_WRITEABLE
,
106 .offset
= RB_BIOS_OFFSET
,
107 .size
= RB_BIOS_SIZE
,
108 .mask_flags
= MTD_WRITEABLE
,
110 .name
= "soft_config",
111 .size
= RB_SOFT_CFG_SIZE
,
115 static struct flash_platform_data rb711gr100_spi_flash_data
= {
116 .parts
= rb711gr100_spi_partitions
,
117 .nr_parts
= ARRAY_SIZE(rb711gr100_spi_partitions
),
120 static int rb711gr100_gpio_latch_gpios
[AR934X_GPIO_COUNT
] __initdata
= {
121 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11,
122 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22
125 static struct gpio_latch_platform_data rb711gr100_gpio_latch_data __initdata
= {
126 .base
= RB91X_LATCH_GPIO_BASE
,
127 .num_gpios
= ARRAY_SIZE(rb711gr100_gpio_latch_gpios
),
128 .gpios
= rb711gr100_gpio_latch_gpios
,
130 .le_active_low
= true,
133 static struct rb91x_nand_platform_data rb711gr100_nand_data __initdata
= {
134 .gpio_nce
= RB91X_GPIO_NAND_NCE
,
135 .gpio_ale
= RB91X_GPIO_NAND_ALE
,
136 .gpio_cle
= RB91X_GPIO_NAND_CLE
,
137 .gpio_rdy
= RB91X_GPIO_NAND_RDY
,
138 .gpio_read
= RB91X_GPIO_NAND_READ
,
139 .gpio_nrw
= RB91X_GPIO_NAND_NRW
,
140 .gpio_nle
= RB91X_GPIO_NLE
,
143 static u8 rb711gr100_ssr_initdata
[] __initdata
= {
144 BIT(RB91X_SSR_BIT_PCIE_POWER
) |
145 BIT(RB91X_SSR_BIT_USB_POWER
) |
149 static struct gen_74x164_chip_platform_data rb711gr100_ssr_data
= {
150 .base
= RB91X_SSR_GPIO_BASE
,
151 .num_registers
= ARRAY_SIZE(rb711gr100_ssr_initdata
),
152 .init_data
= rb711gr100_ssr_initdata
,
155 static struct spi_board_info rb711gr100_spi_info
[] = {
159 .max_speed_hz
= 25000000,
160 .modalias
= "m25p80",
161 .platform_data
= &rb711gr100_spi_flash_data
,
165 .max_speed_hz
= 10000000,
166 .modalias
= "74x164",
167 .platform_data
= &rb711gr100_ssr_data
,
171 static int rb711gr100_spi_cs_gpios
[2] = {
173 RB91X_GPIO_SSR_STROBE
,
176 static struct ath79_spi_platform_data rb711gr100_spi_data __initdata
= {
179 .cs_gpios
= rb711gr100_spi_cs_gpios
,
182 static struct gpio_led rb711gr100_leds
[] __initdata
= {
184 .name
= "rb:green:led1",
185 .gpio
= RB91X_GPIO_LED_1
,
189 .name
= "rb:green:led2",
190 .gpio
= RB91X_GPIO_LED_2
,
194 .name
= "rb:green:led3",
195 .gpio
= RB91X_GPIO_LED_3
,
199 .name
= "rb:green:led4",
200 .gpio
= RB91X_GPIO_LED_4
,
204 .name
= "rb:green:led5",
205 .gpio
= RB91X_GPIO_LED_5
,
209 .name
= "rb:green:user",
210 .gpio
= RB91X_GPIO_LED_USER
,
214 .name
= "rb:green:power",
215 .gpio
= RB91X_GPIO_LED_POWER
,
220 static struct at803x_platform_data rb91x_at803x_data
= {
221 .disable_smarteee
= 1,
222 .enable_rgmii_rx_delay
= 1,
223 .enable_rgmii_tx_delay
= 1,
226 static struct mdio_board_info rb91x_mdio0_info
[] = {
228 .bus_id
= "ag71xx-mdio.0",
230 .platform_data
= &rb91x_at803x_data
,
234 static void __init
rb711gr100_init_partitions(const struct rb_info
*info
)
236 rb711gr100_spi_partitions
[0].size
= info
->hard_cfg_offs
;
237 rb711gr100_spi_partitions
[1].offset
= info
->hard_cfg_offs
;
239 rb711gr100_spi_partitions
[3].offset
= info
->soft_cfg_offs
;
242 void __init
rb711gr100_wlan_init(void)
245 u8 wlan_mac
[ETH_ALEN
];
247 caldata
= rb_get_wlan_data();
251 ath79_init_mac(wlan_mac
, ath79_mac_base
, 1);
252 ath79_register_wmac(caldata
+ 0x1000, wlan_mac
);
257 #define RB_BOARD_INFO(_name, _flags) \
263 static const struct rb_board_info rb711gr100_boards
[] __initconst
= {
264 RB_BOARD_INFO("911G-2HPnD", 0),
265 RB_BOARD_INFO("911G-5HPnD", 0),
266 RB_BOARD_INFO("912UAG-2HPnD", RB91X_FLAG_USB
| RB91X_FLAG_PCIE
),
267 RB_BOARD_INFO("912UAG-5HPnD", RB91X_FLAG_USB
| RB91X_FLAG_PCIE
),
270 static u32
rb711gr100_get_flags(const struct rb_info
*info
)
274 for (i
= 0; i
< ARRAY_SIZE(rb711gr100_boards
); i
++) {
275 const struct rb_board_info
*bi
;
277 bi
= &rb711gr100_boards
[i
];
278 if (strcmp(info
->board_name
, bi
->name
) == 0)
285 static void __init
rb711gr100_setup(void)
287 const struct rb_info
*info
;
291 info
= rb_init_info((void *) KSEG1ADDR(0x1f000000), 0x10000);
295 scnprintf(buf
, sizeof(buf
), "Mikrotik RouterBOARD %s",
296 (info
->board_name
) ? info
->board_name
: "");
297 mips_set_machine_name(buf
);
299 rb711gr100_init_partitions(info
);
300 ath79_register_spi(&rb711gr100_spi_data
, rb711gr100_spi_info
,
301 ARRAY_SIZE(rb711gr100_spi_info
));
303 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0
|
304 AR934X_ETH_CFG_RXD_DELAY
|
305 AR934X_ETH_CFG_SW_ONLY_MODE
);
307 ath79_register_mdio(0, 0x0);
309 mdiobus_register_board_info(rb91x_mdio0_info
,
310 ARRAY_SIZE(rb91x_mdio0_info
));
312 ath79_init_mac(ath79_eth0_data
.mac_addr
, ath79_mac_base
, 0);
313 ath79_eth0_data
.phy_if_mode
= PHY_INTERFACE_MODE_RGMII
;
314 ath79_eth0_data
.phy_mask
= BIT(0);
315 ath79_eth0_pll_data
.pll_1000
= 0x02000000;
317 ath79_register_eth(0);
319 rb711gr100_wlan_init();
321 platform_device_register_data(NULL
, "rb91x-nand", -1,
322 &rb711gr100_nand_data
,
323 sizeof(rb711gr100_nand_data
));
325 platform_device_register_data(NULL
, "gpio-latch", -1,
326 &rb711gr100_gpio_latch_data
,
327 sizeof(rb711gr100_gpio_latch_data
));
329 ath79_register_leds_gpio(-1, ARRAY_SIZE(rb711gr100_leds
),
332 flags
= rb711gr100_get_flags(info
);
334 if (flags
& RB91X_FLAG_USB
)
335 ath79_register_usb();
337 if (flags
& RB91X_FLAG_PCIE
)
338 ath79_register_pci();
342 MIPS_MACHINE_NONAME(ATH79_MACH_RB_711GR100
, "711Gr100", rb711gr100_setup
);