2 * MikroTik SPI-NOR RouterBOARDs support
4 * - MikroTik RouterBOARD mAP 2nD
5 * - MikroTik RouterBOARD mAP L-2nD
6 * - MikroTik RouterBOARD 911-2Hn (911 Lite2)
7 * - MikroTik RouterBOARD 911-5Hn (911 Lite5)
8 * - MikroTik RouterBOARD 931-2nD (hAP mini)
9 * - MikroTik RouterBOARD 941L-2nD
10 * - MikroTik RouterBOARD 951Ui-2nD
11 * - MikroTik RouterBOARD 952Ui-5ac2nD
12 * - MikroTik RouterBOARD 962UiGS-5HacT2HnT
13 * - MikroTik RouterBOARD 750UP r2
14 * - MikroTik RouterBOARD 750P-PBr2
15 * - MikroTik RouterBOARD 750 r2
16 * - MikroTik RouterBOARD LHG 5nD
17 * - MikroTik RouterBOARD wAP2nD
18 * - MikroTik RouterBOARD wAP G-5HacT2HnDwAP (wAP AC)
19 * - MikroTik RouterBOARD wAP R-2nD
21 * Preliminary support for the following hardware
22 * - MikroTik RouterBOARD cAP2nD
23 * Furthermore, the cAP lite (cAPL2nD) appears to feature the exact same
24 * hardware as the mAP L-2nD. It is unknown if they share the same board
27 * Copyright (C) 2017-2018 Thibaut VARENE <varenet@parisc-linux.org>
28 * Copyright (C) 2016 David Hutchison <dhutchison@bluemesh.net>
29 * Copyright (C) 2017 Ryan Mounce <ryan@mounce.com.au>
31 * This program is free software; you can redistribute it and/or modify it
32 * under the terms of the GNU General Public License version 2 as published
33 * by the Free Software Foundation.
36 #include <linux/pci.h>
37 #include <linux/platform_device.h>
38 #include <linux/phy.h>
39 #include <linux/routerboot.h>
40 #include <linux/gpio.h>
42 #include <linux/spi/spi.h>
43 #include <linux/spi/74x164.h>
45 #include <linux/mtd/mtd.h>
46 #include <linux/mtd/partitions.h>
48 #include <linux/ar8216_platform.h>
49 #include <linux/platform_data/phy-at803x.h>
50 #include <linux/platform_data/mdio-gpio.h>
53 #include <asm/mach-ath79/ar71xx_regs.h>
54 #include <asm/mach-ath79/ath79.h>
59 #include "dev-gpio-buttons.h"
60 #include "dev-leds-gpio.h"
61 #include "dev-m25p80.h"
64 #include "machtypes.h"
66 #include "routerboot.h"
68 #define RBSPI_KEYS_POLL_INTERVAL 20 /* msecs */
69 #define RBSPI_KEYS_DEBOUNCE_INTERVAL (3 * RBSPI_KEYS_POLL_INTERVAL)
71 #define RBSPI_HAS_USB BIT(0)
72 #define RBSPI_HAS_WLAN0 BIT(1)
73 #define RBSPI_HAS_WLAN1 BIT(2)
74 #define RBSPI_HAS_WAN4 BIT(3) /* has WAN port on PHY4 */
75 #define RBSPI_HAS_SSR BIT(4) /* has an SSR on SPI bus 0 */
76 #define RBSPI_HAS_POE BIT(5)
77 #define RBSPI_HAS_MDIO1 BIT(6)
78 #define RBSPI_HAS_PCI BIT(7)
80 #define RB_ROUTERBOOT_OFFSET 0x0000
81 #define RB_BIOS_SIZE 0x1000
82 #define RB_SOFT_CFG_SIZE 0x1000
84 /* Flash partitions indexes */
95 static struct mtd_partition rbspi_spi_partitions
[RBSPI_PARTS
];
98 * Setup the SPI flash partition table based on initial parsing.
99 * The kernel can be at any aligned position and have any size.
101 static void __init
rbspi_init_partitions(const struct rb_info
*info
)
103 struct mtd_partition
*parts
= rbspi_spi_partitions
;
104 memset(parts
, 0x0, sizeof(*parts
));
106 parts
[RBSPI_PART_RBOOT
].name
= "routerboot";
107 parts
[RBSPI_PART_RBOOT
].offset
= RB_ROUTERBOOT_OFFSET
;
108 parts
[RBSPI_PART_RBOOT
].size
= info
->hard_cfg_offs
;
109 parts
[RBSPI_PART_RBOOT
].mask_flags
= MTD_WRITEABLE
;
111 parts
[RBSPI_PART_HCONF
].name
= "hard_config";
112 parts
[RBSPI_PART_HCONF
].offset
= info
->hard_cfg_offs
;
113 parts
[RBSPI_PART_HCONF
].size
= info
->hard_cfg_size
;
114 parts
[RBSPI_PART_HCONF
].mask_flags
= MTD_WRITEABLE
;
116 parts
[RBSPI_PART_BIOS
].name
= "bios";
117 parts
[RBSPI_PART_BIOS
].offset
= info
->hard_cfg_offs
118 + info
->hard_cfg_size
;
119 parts
[RBSPI_PART_BIOS
].size
= RB_BIOS_SIZE
;
120 parts
[RBSPI_PART_BIOS
].mask_flags
= MTD_WRITEABLE
;
122 parts
[RBSPI_PART_RBOOT2
].name
= "routerboot2";
123 parts
[RBSPI_PART_RBOOT2
].offset
= parts
[RBSPI_PART_BIOS
].offset
125 parts
[RBSPI_PART_RBOOT2
].size
= info
->soft_cfg_offs
126 - parts
[RBSPI_PART_RBOOT2
].offset
;
127 parts
[RBSPI_PART_RBOOT2
].mask_flags
= MTD_WRITEABLE
;
129 parts
[RBSPI_PART_SCONF
].name
= "soft_config";
130 parts
[RBSPI_PART_SCONF
].offset
= info
->soft_cfg_offs
;
131 parts
[RBSPI_PART_SCONF
].size
= RB_SOFT_CFG_SIZE
;
133 parts
[RBSPI_PART_FIRMW
].name
= "firmware";
134 parts
[RBSPI_PART_FIRMW
].offset
= parts
[RBSPI_PART_SCONF
].offset
135 + parts
[RBSPI_PART_SCONF
].size
;
136 parts
[RBSPI_PART_FIRMW
].size
= MTDPART_SIZ_FULL
;
139 static struct flash_platform_data rbspi_spi_flash_data
= {
140 .parts
= rbspi_spi_partitions
,
141 .nr_parts
= ARRAY_SIZE(rbspi_spi_partitions
),
145 * Several boards only have a single reset button, use a common
146 * structure for that.
148 static struct gpio_keys_button rbspi_gpio_keys_reset
[] __initdata
= {
150 .desc
= "Reset button",
153 .debounce_interval
= RBSPI_KEYS_DEBOUNCE_INTERVAL
,
154 .gpio
= -ENOENT
, /* filled dynamically */
159 /* RB mAP L-2nD gpios */
160 #define RBMAPL_GPIO_LED_POWER 17
161 #define RBMAPL_GPIO_LED_USER 14
162 #define RBMAPL_GPIO_LED_ETH 4
163 #define RBMAPL_GPIO_LED_WLAN 11
164 #define RBMAPL_GPIO_BTN_RESET 16
166 static struct gpio_led rbmapl_leds
[] __initdata
= {
168 .name
= "rb:green:power",
169 .gpio
= RBMAPL_GPIO_LED_POWER
,
171 .default_state
= LEDS_GPIO_DEFSTATE_ON
,
173 .name
= "rb:green:user",
174 .gpio
= RBMAPL_GPIO_LED_USER
,
177 .name
= "rb:green:eth",
178 .gpio
= RBMAPL_GPIO_LED_ETH
,
181 .name
= "rb:green:wlan",
182 .gpio
= RBMAPL_GPIO_LED_WLAN
,
187 /* RB 941L-2nD gpios */
188 #define RBHAPL_GPIO_LED_USER 14
189 #define RBHAPL_GPIO_BTN_RESET 16
191 static struct gpio_led rbhapl_leds
[] __initdata
= {
193 .name
= "rb:green:user",
194 .gpio
= RBHAPL_GPIO_LED_USER
,
200 #define RBSPI_SSR_GPIO_BASE 40
201 #define RBSPI_SSR_GPIO(bit) (RBSPI_SSR_GPIO_BASE + (bit))
203 /* RB 951Ui-2nD gpios */
204 #define RB952_SSR_BIT_LED_LAN1 0
205 #define RB952_SSR_BIT_LED_LAN2 1
206 #define RB952_SSR_BIT_LED_LAN3 2
207 #define RB952_SSR_BIT_LED_LAN4 3
208 #define RB952_SSR_BIT_LED_LAN5 4
209 #define RB952_SSR_BIT_USB_POWER 5
210 #define RB952_SSR_BIT_LED_WLAN 6
211 #define RB952_GPIO_SSR_CS 11
212 #define RB952_GPIO_LED_USER 4
213 #define RB952_GPIO_POE_POWER 14
214 #define RB952_GPIO_POE_STATUS 12
215 #define RB952_GPIO_BTN_RESET 16
216 #define RB952_GPIO_USB_POWER RBSPI_SSR_GPIO(RB952_SSR_BIT_USB_POWER)
217 #define RB952_GPIO_LED_LAN1 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN1)
218 #define RB952_GPIO_LED_LAN2 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN2)
219 #define RB952_GPIO_LED_LAN3 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN3)
220 #define RB952_GPIO_LED_LAN4 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN4)
221 #define RB952_GPIO_LED_LAN5 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN5)
222 #define RB952_GPIO_LED_WLAN RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_WLAN)
224 static struct gpio_led rb952_leds
[] __initdata
= {
226 .name
= "rb:green:user",
227 .gpio
= RB952_GPIO_LED_USER
,
230 .name
= "rb:blue:wlan",
231 .gpio
= RB952_GPIO_LED_WLAN
,
234 .name
= "rb:green:port1",
235 .gpio
= RB952_GPIO_LED_LAN1
,
238 .name
= "rb:green:port2",
239 .gpio
= RB952_GPIO_LED_LAN2
,
242 .name
= "rb:green:port3",
243 .gpio
= RB952_GPIO_LED_LAN3
,
246 .name
= "rb:green:port4",
247 .gpio
= RB952_GPIO_LED_LAN4
,
250 .name
= "rb:green:port5",
251 .gpio
= RB952_GPIO_LED_LAN5
,
257 /* RB 962UiGS-5HacT2HnT gpios */
258 #define RB962_GPIO_POE_STATUS 2
259 #define RB962_GPIO_POE_POWER 3
260 #define RB962_GPIO_LED_USER 12
261 #define RB962_GPIO_USB_POWER 13
262 #define RB962_GPIO_BTN_RESET 20
264 static struct gpio_led rb962_leds_gpio
[] __initdata
= {
266 .name
= "rb:green:user",
267 .gpio
= RB962_GPIO_LED_USER
,
272 static const struct ar8327_led_info rb962_leds_ar8327
[] = {
273 AR8327_LED_INFO(PHY0_0
, HW
, "rb:green:port1"),
274 AR8327_LED_INFO(PHY1_0
, HW
, "rb:green:port2"),
275 AR8327_LED_INFO(PHY2_0
, HW
, "rb:green:port3"),
276 AR8327_LED_INFO(PHY3_0
, HW
, "rb:green:port4"),
277 AR8327_LED_INFO(PHY4_0
, HW
, "rb:green:port5"),
280 static struct ar8327_pad_cfg rb962_ar8327_pad0_cfg
= {
281 .mode
= AR8327_PAD_MAC_RGMII
,
282 .txclk_delay_en
= true,
283 .rxclk_delay_en
= true,
284 .txclk_delay_sel
= AR8327_CLK_DELAY_SEL1
,
285 .rxclk_delay_sel
= AR8327_CLK_DELAY_SEL2
,
286 .mac06_exchange_dis
= true,
289 static struct ar8327_pad_cfg rb962_ar8327_pad6_cfg
= {
290 /* Use SGMII interface for GMAC6 of the AR8337 switch */
291 .mode
= AR8327_PAD_MAC_SGMII
,
292 .rxclk_delay_en
= true,
293 .rxclk_delay_sel
= AR8327_CLK_DELAY_SEL0
,
296 static struct ar8327_led_cfg rb962_ar8327_led_cfg
= {
297 .led_ctrl0
= 0xc737c737,
298 .led_ctrl1
= 0x00000000,
299 .led_ctrl2
= 0x00000000,
300 .led_ctrl3
= 0x0030c300,
304 static struct ar8327_platform_data rb962_ar8327_data
= {
305 .pad0_cfg
= &rb962_ar8327_pad0_cfg
,
306 .pad6_cfg
= &rb962_ar8327_pad6_cfg
,
309 .speed
= AR8327_PORT_SPEED_1000
,
316 .speed
= AR8327_PORT_SPEED_1000
,
321 .led_cfg
= &rb962_ar8327_led_cfg
,
322 .num_leds
= ARRAY_SIZE(rb962_leds_ar8327
),
323 .leds
= rb962_leds_ar8327
,
326 static struct mdio_board_info rb962_mdio0_info
[] = {
328 .bus_id
= "ag71xx-mdio.0",
330 .platform_data
= &rb962_ar8327_data
,
334 /* RB wAP-2nD gpios */
335 #define RBWAP_GPIO_LED_USER 14
336 #define RBWAP_GPIO_LED_WLAN 11
337 #define RBWAP_GPIO_BTN_RESET 16
339 static struct gpio_led rbwap_leds
[] __initdata
= {
341 .name
= "rb:green:user",
342 .gpio
= RBWAP_GPIO_LED_USER
,
345 .name
= "rb:green:wlan",
346 .gpio
= RBWAP_GPIO_LED_WLAN
,
351 /* RB cAP-2nD gpios */
352 #define RBCAP_GPIO_LED_1 14
353 #define RBCAP_GPIO_LED_2 12
354 #define RBCAP_GPIO_LED_3 11
355 #define RBCAP_GPIO_LED_4 4
356 #define RBCAP_GPIO_LED_ALL 13
358 static struct gpio_led rbcap_leds
[] __initdata
= {
360 .name
= "rb:green:rssi1",
361 .gpio
= RBCAP_GPIO_LED_1
,
364 .name
= "rb:green:rssi2",
365 .gpio
= RBCAP_GPIO_LED_2
,
368 .name
= "rb:green:rssi3",
369 .gpio
= RBCAP_GPIO_LED_3
,
372 .name
= "rb:green:rssi4",
373 .gpio
= RBCAP_GPIO_LED_4
,
378 /* RB mAP-2nD gpios */
379 #define RBMAP_SSR_BIT_LED_LAN1 0
380 #define RBMAP_SSR_BIT_LED_LAN2 1
381 #define RBMAP_SSR_BIT_LED_POEO 2
382 #define RBMAP_SSR_BIT_LED_USER 3
383 #define RBMAP_SSR_BIT_LED_WLAN 4
384 #define RBMAP_SSR_BIT_USB_POWER 5
385 #define RBMAP_SSR_BIT_LED_APCAP 6
386 #define RBMAP_GPIO_BTN_RESET 16
387 #define RBMAP_GPIO_SSR_CS 11
388 #define RBMAP_GPIO_LED_POWER 4
389 #define RBMAP_GPIO_POE_POWER 14
390 #define RBMAP_GPIO_POE_STATUS 12
391 #define RBMAP_GPIO_USB_POWER RBSPI_SSR_GPIO(RBMAP_SSR_BIT_USB_POWER)
392 #define RBMAP_GPIO_LED_LAN1 RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_LAN1)
393 #define RBMAP_GPIO_LED_LAN2 RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_LAN2)
394 #define RBMAP_GPIO_LED_POEO RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_POEO)
395 #define RBMAP_GPIO_LED_USER RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_USER)
396 #define RBMAP_GPIO_LED_WLAN RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_WLAN)
397 #define RBMAP_GPIO_LED_APCAP RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_APCAP)
399 static struct gpio_led rbmap_leds
[] __initdata
= {
401 .name
= "rb:green:power",
402 .gpio
= RBMAP_GPIO_LED_POWER
,
404 .default_state
= LEDS_GPIO_DEFSTATE_ON
,
406 .name
= "rb:green:eth1",
407 .gpio
= RBMAP_GPIO_LED_LAN1
,
410 .name
= "rb:green:eth2",
411 .gpio
= RBMAP_GPIO_LED_LAN2
,
414 .name
= "rb:red:poe_out",
415 .gpio
= RBMAP_GPIO_LED_POEO
,
418 .name
= "rb:green:user",
419 .gpio
= RBMAP_GPIO_LED_USER
,
422 .name
= "rb:green:wlan",
423 .gpio
= RBMAP_GPIO_LED_WLAN
,
426 .name
= "rb:green:ap_cap",
427 .gpio
= RBMAP_GPIO_LED_APCAP
,
432 /* RB LHG 5nD gpios */
433 #define RBLHG_GPIO_LED_0 13
434 #define RBLHG_GPIO_LED_1 12
435 #define RBLHG_GPIO_LED_2 4
436 #define RBLHG_GPIO_LED_3 21
437 #define RBLHG_GPIO_LED_4 18
438 #define RBLHG_GPIO_LED_ETH 14
439 #define RBLHG_GPIO_LED_POWER 11
440 #define RBLHG_GPIO_LED_USER 20
441 #define RBLHG_GPIO_BTN_RESET 15
443 static struct gpio_led rblhg_leds
[] __initdata
= {
445 .name
= "rb:green:rssi0",
446 .gpio
= RBLHG_GPIO_LED_0
,
449 .name
= "rb:green:rssi1",
450 .gpio
= RBLHG_GPIO_LED_1
,
453 .name
= "rb:green:rssi2",
454 .gpio
= RBLHG_GPIO_LED_2
,
457 .name
= "rb:green:rssi3",
458 .gpio
= RBLHG_GPIO_LED_3
,
461 .name
= "rb:green:rssi4",
462 .gpio
= RBLHG_GPIO_LED_4
,
465 .name
= "rb:green:eth",
466 .gpio
= RBLHG_GPIO_LED_ETH
,
469 .name
= "rb:green:user",
470 .gpio
= RBLHG_GPIO_LED_USER
,
473 .name
= "rb:blue:power",
474 .gpio
= RBLHG_GPIO_LED_POWER
,
476 .default_state
= LEDS_GPIO_DEFSTATE_ON
,
480 /* RB w APG-5HacT2HnD (wAP AC) gpios*/
481 #define RBWAPGSC_LED1 1
482 #define RBWAPGSC_LED2 8
483 #define RBWAPGSC_LED3 9
484 #define RBWAPGSC_POWERLED 16
485 #define RBWAPGSC_GPIO_BTN_RESET 1
486 #define RBWAPGSC_GPIO_MDIO_MDC 12
487 #define RBWAPGSC_GPIO_MDIO_DATA 11
488 #define RBWAPGSC_MDIO_PHYADDR 0
490 static struct gpio_led rbwapgsc_leds
[] __initdata
= {
492 .name
= "rb:green:led1",
493 .gpio
= RBWAPGSC_LED1
,
496 .name
= "rb:blue:power",
497 .gpio
= RBWAPGSC_POWERLED
,
502 static struct mdio_gpio_platform_data rbwapgsc_mdio_data
= {
503 .mdc
= RBWAPGSC_GPIO_MDIO_MDC
,
504 .mdio
= RBWAPGSC_GPIO_MDIO_DATA
,
505 .phy_mask
= ~BIT(RBWAPGSC_MDIO_PHYADDR
),
508 static struct platform_device rbwapgsc_phy_device
= {
512 .platform_data
= &rbwapgsc_mdio_data
517 #define RB911L_GPIO_BTN_RESET 15
518 #define RB911L_GPIO_LED_1 13
519 #define RB911L_GPIO_LED_2 12
520 #define RB911L_GPIO_LED_3 4
521 #define RB911L_GPIO_LED_4 21
522 #define RB911L_GPIO_LED_5 18
523 #define RB911L_GPIO_LED_ETH 20
524 #define RB911L_GPIO_LED_POWER 11
525 #define RB911L_GPIO_LED_USER 3
526 #define RB911L_GPIO_PIN_HOLE 14 /* for reference */
528 static struct gpio_led rb911l_leds
[] __initdata
= {
530 .name
= "rb:green:eth",
531 .gpio
= RB911L_GPIO_LED_ETH
,
534 .name
= "rb:green:led1",
535 .gpio
= RB911L_GPIO_LED_1
,
538 .name
= "rb:green:led2",
539 .gpio
= RB911L_GPIO_LED_2
,
542 .name
= "rb:green:led3",
543 .gpio
= RB911L_GPIO_LED_3
,
546 .name
= "rb:green:led4",
547 .gpio
= RB911L_GPIO_LED_4
,
550 .name
= "rb:green:led5",
551 .gpio
= RB911L_GPIO_LED_5
,
554 .name
= "rb:green:power",
555 .gpio
= RB911L_GPIO_LED_POWER
,
556 .default_state
= LEDS_GPIO_DEFSTATE_ON
,
559 .name
= "rb:green:user",
560 .gpio
= RB911L_GPIO_LED_USER
,
566 /* RB 931-2nD gpios */
567 #define RB931_GPIO_BTN_RESET 0
568 #define RB931_GPIO_BTN_MODE 9
569 #define RB931_GPIO_LED_USER 1
571 static struct gpio_keys_button rb931_gpio_keys
[] __initdata
= {
573 .desc
= "Reset button",
576 .debounce_interval
= RBSPI_KEYS_DEBOUNCE_INTERVAL
,
577 .gpio
= RB931_GPIO_BTN_RESET
,
580 .desc
= "Mode button",
583 .debounce_interval
= RBSPI_KEYS_DEBOUNCE_INTERVAL
,
584 .gpio
= RB931_GPIO_BTN_MODE
,
589 static struct gpio_led rb931_leds
[] __initdata
= {
591 .name
= "rb:green:user",
592 .gpio
= RB931_GPIO_LED_USER
,
597 static struct gen_74x164_chip_platform_data rbspi_ssr_data
= {
598 .base
= RBSPI_SSR_GPIO_BASE
,
602 /* the spi-ath79 driver can only natively handle CS0. Other CS are bit-banged */
603 static int rbspi_spi_cs_gpios
[] = {
604 -ENOENT
, /* CS0 is always -ENOENT: natively handled */
605 -ENOENT
, /* CS1 can be updated by the code as necessary */
608 static struct ath79_spi_platform_data rbspi_ath79_spi_data
= {
610 .cs_gpios
= rbspi_spi_cs_gpios
,
614 * Global spi_board_info: devices that don't have an SSR only have the SPI NOR
615 * flash on bus0 CS0, while devices that have an SSR add it on the same bus CS1
617 static struct spi_board_info rbspi_spi_info
[] = {
621 .max_speed_hz
= 25000000,
622 .modalias
= "m25p80",
623 .platform_data
= &rbspi_spi_flash_data
,
627 .max_speed_hz
= 25000000,
628 .modalias
= "74x164",
629 .platform_data
= &rbspi_ssr_data
,
633 void __init
rbspi_wlan_init(u16 id
, int wmac_offset
)
636 u8 wlan_mac
[ETH_ALEN
];
638 art_buf
= rb_get_ext_wlan_data(id
);
642 ath79_init_mac(wlan_mac
, ath79_mac_base
, wmac_offset
);
643 ath79_register_wmac(art_buf
+ 0x1000, wlan_mac
);
648 #define RBSPI_MACH_BUFLEN 64
650 * Common platform init routine for all SPI NOR devices.
652 static __init
const struct rb_info
*rbspi_platform_setup(void)
654 const struct rb_info
*info
;
655 char buf
[RBSPI_MACH_BUFLEN
] = "MikroTik ";
657 int len
= RBSPI_MACH_BUFLEN
- strlen(buf
) - 1;
659 info
= rb_init_info((void *)(KSEG1ADDR(AR71XX_SPI_BASE
)), 0x20000);
663 if (info
->board_name
) {
664 str
= "RouterBOARD ";
665 if (strncmp(info
->board_name
, str
, strlen(str
))) {
666 strncat(buf
, str
, len
);
669 strncat(buf
, info
->board_name
, len
);
672 strncat(buf
, "UNKNOWN", len
);
674 mips_set_machine_name(buf
);
676 /* fix partitions based on flash parsing */
677 rbspi_init_partitions(info
);
683 * Common peripherals init routine for all SPI NOR devices.
686 static void __init
rbspi_peripherals_setup(u32 flags
)
690 if (flags
& RBSPI_HAS_SSR
)
691 spi_n
= ARRAY_SIZE(rbspi_spi_info
);
693 spi_n
= 1; /* only one device on bus0 */
695 rbspi_ath79_spi_data
.num_chipselect
= spi_n
;
696 rbspi_ath79_spi_data
.cs_gpios
= rbspi_spi_cs_gpios
;
697 ath79_register_spi(&rbspi_ath79_spi_data
, rbspi_spi_info
, spi_n
);
699 if (flags
& RBSPI_HAS_USB
)
700 ath79_register_usb();
702 if (flags
& RBSPI_HAS_PCI
)
703 ath79_register_pci();
707 * Common network init routine for all SPI NOR devices.
710 static void __init
rbspi_network_setup(u32 flags
, int gmac1_offset
,
711 int wmac0_offset
, int wmac1_offset
)
713 /* for QCA953x that will init mdio1_device/data */
714 ath79_register_mdio(0, 0x0);
715 if (flags
& RBSPI_HAS_MDIO1
)
716 ath79_register_mdio(1, 0x0);
718 if (flags
& RBSPI_HAS_WAN4
) {
719 ath79_setup_ar934x_eth_cfg(0);
721 /* set switch to oper mode 1, PHY4 connected to CPU */
722 ath79_switch_data
.phy4_mii_en
= 1;
723 ath79_switch_data
.phy_poll_mask
|= BIT(4);
725 /* init GMAC0 connected to PHY4 at 100M */
726 ath79_eth0_data
.phy_if_mode
= PHY_INTERFACE_MODE_MII
;
727 ath79_eth0_data
.phy_mask
= BIT(4);
728 ath79_init_mac(ath79_eth0_data
.mac_addr
, ath79_mac_base
, 0);
729 ath79_register_eth(0);
731 /* set the SoC to SW_ONLY_MODE, which connects all PHYs
732 * to the internal switch.
733 * We hijack ath79_setup_ar934x_eth_cfg() to set the switch in
734 * the QCA953x, this works because this configuration bit is
735 * the same as the AR934x. There's no equivalent function for
736 * QCA953x for now. */
737 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE
);
741 ath79_init_mac(ath79_eth1_data
.mac_addr
, ath79_mac_base
, gmac1_offset
);
742 ath79_eth1_data
.phy_if_mode
= PHY_INTERFACE_MODE_GMII
;
743 ath79_register_eth(1);
745 if (flags
& RBSPI_HAS_WLAN0
)
746 rbspi_wlan_init(0, wmac0_offset
);
748 if (flags
& RBSPI_HAS_WLAN1
)
749 rbspi_wlan_init(1, wmac1_offset
);
752 static __init
void rbspi_register_reset_button(int gpio
)
754 rbspi_gpio_keys_reset
[0].gpio
= gpio
;
755 ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL
,
756 ARRAY_SIZE(rbspi_gpio_keys_reset
),
757 rbspi_gpio_keys_reset
);
761 * Init the mAP lite hardware (QCA953x).
762 * The mAP L-2nD (mAP lite) has a single ethernet port, connected to PHY0.
763 * Trying to use GMAC0 in direct mode was unsucessful, so we're
764 * using SW_ONLY_MODE, which connects PHY0 to MAC1 on the internal
765 * switch, which is connected to GMAC1 on the SoC. GMAC0 is unused.
767 static void __init
rbmapl_setup(void)
769 u32 flags
= RBSPI_HAS_WLAN0
;
771 if (!rbspi_platform_setup())
774 rbspi_peripherals_setup(flags
);
776 /* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 1 */
777 rbspi_network_setup(flags
, 0, 1, 0);
779 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbmapl_leds
), rbmapl_leds
);
781 /* mAP lite has a single reset button as gpio 16 */
782 rbspi_register_reset_button(RBMAPL_GPIO_BTN_RESET
);
784 /* clear internal multiplexing */
785 ath79_gpio_output_select(RBMAPL_GPIO_LED_ETH
, AR934X_GPIO_OUT_GPIO
);
786 ath79_gpio_output_select(RBMAPL_GPIO_LED_POWER
, AR934X_GPIO_OUT_GPIO
);
790 * Init the hAP lite hardware (QCA953x).
791 * The 941-2nD (hAP lite) has 4 ethernet ports, with port 2-4
792 * being assigned to LAN on the casing, and port 1 being assigned
793 * to "internet" (WAN) on the casing. Port 1 is connected to PHY3.
794 * Since WAN is neither PHY0 nor PHY4, we cannot use GMAC0 with this device.
796 static void __init
rbhapl_setup(void)
798 u32 flags
= RBSPI_HAS_WLAN0
;
800 if (!rbspi_platform_setup())
803 rbspi_peripherals_setup(flags
);
805 /* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 4 */
806 rbspi_network_setup(flags
, 0, 4, 0);
808 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbhapl_leds
), rbhapl_leds
);
810 /* hAP lite has a single reset button as gpio 16 */
811 rbspi_register_reset_button(RBHAPL_GPIO_BTN_RESET
);
815 * The hAP, hAP ac lite, hEX lite and hEX PoE lite share the same platform
817 static void __init
rbspi_952_750r2_setup(u32 flags
)
819 if (flags
& RBSPI_HAS_SSR
)
820 rbspi_spi_cs_gpios
[1] = RB952_GPIO_SSR_CS
;
822 rbspi_peripherals_setup(flags
);
825 * GMAC1 is HW MAC + 1, WLAN0 MAC IS HW MAC + 5 (hAP),
826 * WLAN1 MAC IS HW MAC + 6 (hAP ac lite)
828 rbspi_network_setup(flags
, 1, 5, 6);
830 if (flags
& RBSPI_HAS_USB
)
831 gpio_request_one(RB952_GPIO_USB_POWER
,
832 GPIOF_OUT_INIT_HIGH
| GPIOF_EXPORT_DIR_FIXED
,
835 if (flags
& RBSPI_HAS_POE
)
836 gpio_request_one(RB952_GPIO_POE_POWER
,
837 GPIOF_OUT_INIT_HIGH
| GPIOF_EXPORT_DIR_FIXED
,
840 ath79_register_leds_gpio(-1, ARRAY_SIZE(rb952_leds
), rb952_leds
);
842 /* These devices have a single reset button as gpio 16 */
843 rbspi_register_reset_button(RB952_GPIO_BTN_RESET
);
847 * Init the hAP (ac lite) hardware (QCA953x).
848 * The 951Ui-2nD (hAP) has 5 ethernet ports, with ports 2-5 being assigned
849 * to LAN on the casing, and port 1 being assigned to "internet" (WAN).
850 * Port 1 is connected to PHY4 (the ports are labelled in reverse physical
851 * number), so the SoC can be set to connect GMAC0 to PHY4 and GMAC1 to the
852 * internal switch for the LAN ports.
853 * The device also has USB, PoE output and an SSR used for LED multiplexing.
854 * The 952Ui-5ac2nD (hAP ac lite) is nearly identical to the hAP, it adds a
855 * QCA9887 5GHz radio via PCI and moves 2.4GHz from WLAN0 to WLAN1.
857 static void __init
rb952_setup(void)
859 u32 flags
= RBSPI_HAS_WAN4
| RBSPI_HAS_USB
|
860 RBSPI_HAS_SSR
| RBSPI_HAS_POE
;
862 if (!rbspi_platform_setup())
865 /* differentiate the hAP from the hAP ac lite */
866 if (strstr(mips_get_machine_name(), "952Ui-5ac2nD"))
867 flags
|= RBSPI_HAS_WLAN1
| RBSPI_HAS_PCI
;
869 flags
|= RBSPI_HAS_WLAN0
;
871 rbspi_952_750r2_setup(flags
);
875 * Init the hEX (PoE) lite hardware (QCA953x).
876 * The 750UP r2 (hEX PoE lite) is nearly identical to the hAP, only without
877 * WLAN. The 750 r2 (hEX lite) is nearly identical to the 750UP r2, only
878 * without USB and POE. The 750P Pbr2 (Powerbox) is nearly identical to hEX PoE
879 * lite, only without USB. It shares the same bootloader board identifier.
881 static void __init
rb750upr2_setup(void)
883 u32 flags
= RBSPI_HAS_WAN4
| RBSPI_HAS_SSR
;
885 if (!rbspi_platform_setup())
888 /* differentiate the hEX lite from the hEX PoE lite */
889 if (strstr(mips_get_machine_name(), "750UP r2"))
890 flags
|= RBSPI_HAS_USB
| RBSPI_HAS_POE
;
892 /* differentiate the Powerbox from the hEX lite */
893 else if (strstr(mips_get_machine_name(), "750P r2"))
894 flags
|= RBSPI_HAS_POE
;
896 rbspi_952_750r2_setup(flags
);
900 * Init the hAP ac / 962UiGS-5HacT2HnT hardware (QCA9558).
901 * The hAP ac has 5 ethernet ports provided by an AR8337 switch. Port 1 is
902 * assigned to WAN, ports 2-5 are assigned to LAN. Port 0 is connected to the
903 * SoC, ports 1-5 of the switch are connected to physical ports 1-5 in order.
904 * The SFP cage is not assigned by default on RouterOS. Extra work is required
905 * to support this interface as it is directly connected to the SoC (eth1).
906 * Wireless is provided by a 2.4GHz radio on the SoC (WLAN1) and a 5GHz radio
907 * attached via PCI (QCA9880). Red and green WLAN LEDs are populated however
908 * they are not attached to GPIOs, extra work is required to support these.
909 * PoE and USB output power control is supported.
911 static void __init
rb962_setup(void)
913 u32 flags
= RBSPI_HAS_USB
| RBSPI_HAS_POE
| RBSPI_HAS_PCI
;
915 if (!rbspi_platform_setup())
918 rbspi_peripherals_setup(flags
);
920 /* Do not call rbspi_network_setup as we have a discrete switch chip */
921 ath79_eth0_pll_data
.pll_1000
= 0xae000000;
922 ath79_eth0_pll_data
.pll_100
= 0xa0000101;
923 ath79_eth0_pll_data
.pll_10
= 0xa0001313;
925 ath79_register_mdio(0, 0x0);
926 mdiobus_register_board_info(rb962_mdio0_info
,
927 ARRAY_SIZE(rb962_mdio0_info
));
929 ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN
);
931 ath79_init_mac(ath79_eth0_data
.mac_addr
, ath79_mac_base
, 0);
932 ath79_eth0_data
.phy_if_mode
= PHY_INTERFACE_MODE_RGMII
;
933 ath79_eth0_data
.phy_mask
= BIT(0);
934 ath79_eth0_data
.mii_bus_dev
= &ath79_mdio0_device
.dev
;
935 ath79_register_eth(0);
937 /* WLAN1 MAC is HW MAC + 7 */
938 rbspi_wlan_init(1, 7);
940 if (flags
& RBSPI_HAS_USB
)
941 gpio_request_one(RB962_GPIO_USB_POWER
,
942 GPIOF_OUT_INIT_HIGH
| GPIOF_EXPORT_DIR_FIXED
,
945 /* PoE output GPIO is inverted, set GPIOF_ACTIVE_LOW for consistency */
946 if (flags
& RBSPI_HAS_POE
)
947 gpio_request_one(RB962_GPIO_POE_POWER
,
948 GPIOF_OUT_INIT_HIGH
| GPIOF_ACTIVE_LOW
|
949 GPIOF_EXPORT_DIR_FIXED
,
952 ath79_register_leds_gpio(-1, ARRAY_SIZE(rb962_leds_gpio
),
955 /* This device has a single reset button as gpio 20 */
956 rbspi_register_reset_button(RB962_GPIO_BTN_RESET
);
960 * Init the LHG hardware (AR9344).
961 * The LHG 5nD has a single ethernet port connected to PHY0.
962 * Wireless is provided via 5GHz WLAN1.
964 static void __init
rblhg_setup(void)
966 u32 flags
= RBSPI_HAS_WLAN1
| RBSPI_HAS_MDIO1
;
968 if (!rbspi_platform_setup())
971 rbspi_peripherals_setup(flags
);
973 /* GMAC1 is HW MAC, WLAN1 MAC is HW MAC + 1 */
974 rbspi_network_setup(flags
, 0, 0, 1);
976 ath79_register_leds_gpio(-1, ARRAY_SIZE(rblhg_leds
), rblhg_leds
);
978 rbspi_register_reset_button(RBLHG_GPIO_BTN_RESET
);
982 * Init the wAP hardware.
983 * The wAP 2nD has a single ethernet port.
985 static void __init
rbwap_setup(void)
987 u32 flags
= RBSPI_HAS_WLAN0
;
989 if (!rbspi_platform_setup())
992 rbspi_peripherals_setup(flags
);
994 /* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 1 */
995 rbspi_network_setup(flags
, 0, 1, 0);
997 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbwap_leds
), rbwap_leds
);
999 /* wAP has a single reset button as GPIO 16 */
1000 rbspi_register_reset_button(RBWAP_GPIO_BTN_RESET
);
1004 * Init the cAP hardware (EXPERIMENTAL).
1005 * The cAP 2nD has a single ethernet port, and a global LED switch.
1007 static void __init
rbcap_setup(void)
1009 u32 flags
= RBSPI_HAS_WLAN0
;
1011 if (!rbspi_platform_setup())
1014 rbspi_peripherals_setup(flags
);
1016 /* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 1 */
1017 rbspi_network_setup(flags
, 0, 1, 0);
1019 gpio_request_one(RBCAP_GPIO_LED_ALL
,
1020 GPIOF_OUT_INIT_HIGH
| GPIOF_EXPORT_DIR_FIXED
,
1023 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbcap_leds
), rbcap_leds
);
1027 * Init the mAP hardware.
1028 * The mAP 2nD has two ethernet ports, PoE output, SSR for LED
1029 * multiplexing and USB port.
1031 static void __init
rbmap_setup(void)
1033 u32 flags
= RBSPI_HAS_USB
| RBSPI_HAS_WLAN0
|
1034 RBSPI_HAS_SSR
| RBSPI_HAS_POE
;
1036 if (!rbspi_platform_setup())
1039 rbspi_spi_cs_gpios
[1] = RBMAP_GPIO_SSR_CS
;
1040 rbspi_peripherals_setup(flags
);
1042 /* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 2 */
1043 rbspi_network_setup(flags
, 0, 2, 0);
1045 if (flags
& RBSPI_HAS_POE
)
1046 gpio_request_one(RBMAP_GPIO_POE_POWER
,
1047 GPIOF_OUT_INIT_LOW
| GPIOF_EXPORT_DIR_FIXED
,
1050 /* USB power GPIO is inverted, set GPIOF_ACTIVE_LOW for consistency */
1051 if (flags
& RBSPI_HAS_USB
)
1052 gpio_request_one(RBMAP_GPIO_USB_POWER
,
1053 GPIOF_OUT_INIT_HIGH
| GPIOF_ACTIVE_LOW
|
1054 GPIOF_EXPORT_DIR_FIXED
,
1057 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbmap_leds
), rbmap_leds
);
1059 /* mAP 2nD has a single reset button as gpio 16 */
1060 rbspi_register_reset_button(RBMAP_GPIO_BTN_RESET
);
1064 * Init the wAPGSC (RB wAPG-5HacT2HnD // wAP AC) hardware.
1065 * The wAPGSC has one Ethernet port via AR8033 with PoE input, dual radio (SoC
1066 * 2.4 GHz and external QCA9880) and a ZT2046Q temperature and voltage sensor
1067 * (currently not supported).
1069 static void __init
rbwapgsc_setup(void)
1071 u32 flags
= RBSPI_HAS_PCI
;
1073 if (!rbspi_platform_setup())
1076 rbspi_peripherals_setup(flags
);
1078 platform_device_register(&rbwapgsc_phy_device
);
1080 ath79_init_mac(ath79_eth1_data
.mac_addr
, ath79_mac_base
, 0);
1081 ath79_eth1_data
.mii_bus_dev
= &rbwapgsc_phy_device
.dev
;
1082 ath79_eth1_data
.phy_if_mode
= PHY_INTERFACE_MODE_SGMII
;
1083 ath79_eth1_data
.phy_mask
= BIT(RBWAPGSC_MDIO_PHYADDR
);
1084 ath79_eth1_pll_data
.pll_1000
= 0x03000101;
1085 ath79_eth1_pll_data
.pll_100
= 0x80000101;
1086 ath79_eth1_pll_data
.pll_10
= 0x80001313;
1087 ath79_eth1_data
.speed
= SPEED_1000
;
1088 ath79_eth1_data
.duplex
= DUPLEX_FULL
;
1089 ath79_register_eth(1);
1091 rbspi_wlan_init(1, 2);
1093 rbspi_register_reset_button(RBWAPGSC_GPIO_BTN_RESET
);
1095 ath79_gpio_function_enable(QCA955X_GPIO_FUNC_JTAG_DISABLE
|
1096 QCA955X_GPIO_REG_OUT_FUNC4
|
1097 QCA955X_GPIO_REG_OUT_FUNC3
);
1099 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbwapgsc_leds
),
1104 * Setup the 911L hardware (AR9344).
1106 static void __init
rb911l_setup(void)
1108 const struct rb_info
*info
;
1110 info
= rbspi_platform_setup();
1114 if (!rb_has_hw_option(info
, RB_HW_OPT_NO_NAND
)) {
1116 * Old hardware revisions might be equipped with a NAND flash
1117 * chip instead of the 16MiB SPI NOR device. Those boards are
1118 * not supported at the moment, so throw a warning and skip
1119 * the peripheral setup to avoid messing up the data in the
1122 WARN(1, "The NAND flash on this board is not supported.\n");
1124 rbspi_peripherals_setup(0);
1127 ath79_register_mdio(1, 0x0);
1129 ath79_init_mac(ath79_eth1_data
.mac_addr
, ath79_mac_base
, 0);
1131 ath79_eth1_data
.phy_if_mode
= PHY_INTERFACE_MODE_GMII
;
1132 ath79_eth1_data
.speed
= SPEED_1000
;
1133 ath79_eth1_data
.duplex
= DUPLEX_FULL
;
1135 ath79_register_eth(1);
1137 rbspi_wlan_init(0, 1);
1139 rbspi_register_reset_button(RB911L_GPIO_BTN_RESET
);
1141 /* Make the eth LED controllable by software. */
1142 ath79_gpio_output_select(RB911L_GPIO_LED_ETH
, AR934X_GPIO_OUT_GPIO
);
1144 ath79_register_leds_gpio(-1, ARRAY_SIZE(rb911l_leds
), rb911l_leds
);
1148 * Init the hAP mini hardware (QCA953x).
1149 * The 931-2nD (hAP mini) has 3 ethernet ports, with port 2-3
1150 * being assigned to LAN on the casing, and port 1 being assigned
1151 * to "internet" (WAN) on the casing. Port 1 is connected to PHY2.
1152 * Since WAN is neither PHY0 nor PHY4, we cannot use GMAC0 with this device.
1154 static void __init
rb931_setup(void)
1156 u32 flags
= RBSPI_HAS_WLAN0
;
1158 if (!rbspi_platform_setup())
1161 rbspi_peripherals_setup(flags
);
1163 /* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 3 */
1164 rbspi_network_setup(flags
, 0, 3, 0);
1166 ath79_register_leds_gpio(-1, ARRAY_SIZE(rb931_leds
), rb931_leds
);
1168 /* hAP mini has two buttons */
1169 ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL
,
1170 ARRAY_SIZE(rb931_gpio_keys
),
1174 MIPS_MACHINE_NONAME(ATH79_MACH_RB_MAPL
, "map-hb", rbmapl_setup
);
1175 MIPS_MACHINE_NONAME(ATH79_MACH_RB_941
, "H951L", rbhapl_setup
);
1176 MIPS_MACHINE_NONAME(ATH79_MACH_RB_911L
, "911L", rb911l_setup
);
1177 MIPS_MACHINE_NONAME(ATH79_MACH_RB_952
, "952-hb", rb952_setup
);
1178 MIPS_MACHINE_NONAME(ATH79_MACH_RB_962
, "962", rb962_setup
);
1179 MIPS_MACHINE_NONAME(ATH79_MACH_RB_750UPR2
, "750-hb", rb750upr2_setup
);
1180 MIPS_MACHINE_NONAME(ATH79_MACH_RB_LHG5
, "lhg", rblhg_setup
);
1181 MIPS_MACHINE_NONAME(ATH79_MACH_RB_WAP
, "wap-hb", rbwap_setup
);
1182 MIPS_MACHINE_NONAME(ATH79_MACH_RB_WAPR
, "wap-lte", rbwap_setup
);
1183 MIPS_MACHINE_NONAME(ATH79_MACH_RB_CAP
, "cap-hb", rbcap_setup
);
1184 MIPS_MACHINE_NONAME(ATH79_MACH_RB_MAP
, "map2-hb", rbmap_setup
);
1185 MIPS_MACHINE_NONAME(ATH79_MACH_RB_WAPAC
, "wapg-sc", rbwapgsc_setup
);
1186 MIPS_MACHINE_NONAME(ATH79_MACH_RB_931
, "931", rb931_setup
);