2 * MikroTik SPI-NOR RouterBOARDs support
4 * - MikroTik RouterBOARD mAP L-2nD
5 * - MikroTik RouterBOARD 941L-2nD
6 * - MikroTik RouterBOARD 951Ui-2nD
7 * - MikroTik RouterBOARD 750UP r2
8 * - MikroTik RouterBOARD 750 r2
10 * Preliminary support for the following hardware
11 * - MikroTik RouterBOARD wAP2nD
12 * - MikroTik RouterBOARD cAP2nD
13 * - MikroTik RouterBOARD mAP2nD
14 * Furthermore, the cAP lite (cAPL2nD) appears to feature the exact same
15 * hardware as the mAP L-2nD. It is unknown if they share the same board
18 * Copyright (C) 2017 Thibaut VARENE <varenet@parisc-linux.org>
20 * This program is free software; you can redistribute it and/or modify it
21 * under the terms of the GNU General Public License version 2 as published
22 * by the Free Software Foundation.
25 #include <linux/platform_device.h>
26 #include <linux/phy.h>
27 #include <linux/routerboot.h>
28 #include <linux/gpio.h>
30 #include <linux/spi/spi.h>
31 #include <linux/spi/74x164.h>
33 #include <linux/mtd/mtd.h>
34 #include <linux/mtd/partitions.h>
37 #include <asm/mach-ath79/ar71xx_regs.h>
38 #include <asm/mach-ath79/ath79.h>
43 #include "dev-gpio-buttons.h"
44 #include "dev-leds-gpio.h"
45 #include "dev-m25p80.h"
48 #include "machtypes.h"
49 #include "routerboot.h"
51 #define RBSPI_KEYS_POLL_INTERVAL 20 /* msecs */
52 #define RBSPI_KEYS_DEBOUNCE_INTERVAL (3 * RBSPI_KEYS_POLL_INTERVAL)
54 #define RBSPI_HAS_USB BIT(0)
55 #define RBSPI_HAS_WLAN BIT(1)
56 #define RBSPI_HAS_WAN4 BIT(2) /* has WAN port on PHY4 */
57 #define RBSPI_HAS_SSR BIT(3) /* has an SSR on SPI bus 0 */
58 #define RBSPI_HAS_POE BIT(4)
60 #define RB_ROUTERBOOT_OFFSET 0x0000
61 #define RB_BIOS_SIZE 0x1000
62 #define RB_SOFT_CFG_SIZE 0x1000
64 /* Flash partitions indexes */
75 static struct mtd_partition rbspi_spi_partitions
[RBSPI_PARTS
];
78 * Setup the SPI flash partition table based on initial parsing.
79 * The kernel can be at any aligned position and have any size.
81 static void __init
rbspi_init_partitions(const struct rb_info
*info
)
83 struct mtd_partition
*parts
= rbspi_spi_partitions
;
84 memset(parts
, 0x0, sizeof(*parts
));
86 parts
[RBSPI_PART_RBOOT
].name
= "routerboot";
87 parts
[RBSPI_PART_RBOOT
].offset
= RB_ROUTERBOOT_OFFSET
;
88 parts
[RBSPI_PART_RBOOT
].size
= info
->hard_cfg_offs
;
89 parts
[RBSPI_PART_RBOOT
].mask_flags
= MTD_WRITEABLE
;
91 parts
[RBSPI_PART_HCONF
].name
= "hard_config";
92 parts
[RBSPI_PART_HCONF
].offset
= info
->hard_cfg_offs
;
93 parts
[RBSPI_PART_HCONF
].size
= info
->hard_cfg_size
;
94 parts
[RBSPI_PART_HCONF
].mask_flags
= MTD_WRITEABLE
;
96 parts
[RBSPI_PART_BIOS
].name
= "bios";
97 parts
[RBSPI_PART_BIOS
].offset
= info
->hard_cfg_offs
98 + info
->hard_cfg_size
;
99 parts
[RBSPI_PART_BIOS
].size
= RB_BIOS_SIZE
;
100 parts
[RBSPI_PART_BIOS
].mask_flags
= MTD_WRITEABLE
;
102 parts
[RBSPI_PART_RBOOT2
].name
= "routerboot2";
103 parts
[RBSPI_PART_RBOOT2
].offset
= parts
[RBSPI_PART_BIOS
].offset
105 parts
[RBSPI_PART_RBOOT2
].size
= info
->soft_cfg_offs
106 - parts
[RBSPI_PART_RBOOT2
].offset
;
107 parts
[RBSPI_PART_RBOOT2
].mask_flags
= MTD_WRITEABLE
;
109 parts
[RBSPI_PART_SCONF
].name
= "soft_config";
110 parts
[RBSPI_PART_SCONF
].offset
= info
->soft_cfg_offs
;
111 parts
[RBSPI_PART_SCONF
].size
= RB_SOFT_CFG_SIZE
;
113 parts
[RBSPI_PART_FIRMW
].name
= "firmware";
114 parts
[RBSPI_PART_FIRMW
].offset
= parts
[RBSPI_PART_SCONF
].offset
115 + parts
[RBSPI_PART_SCONF
].size
;
116 parts
[RBSPI_PART_FIRMW
].size
= MTDPART_SIZ_FULL
;
119 static struct flash_platform_data rbspi_spi_flash_data
= {
120 .parts
= rbspi_spi_partitions
,
121 .nr_parts
= ARRAY_SIZE(rbspi_spi_partitions
),
124 /* Several boards only have a single reset button wired to GPIO 16 */
125 #define RBSPI_GPIO_BTN_RESET16 16
127 static struct gpio_keys_button rbspi_gpio_keys_reset16
[] __initdata
= {
129 .desc
= "Reset button",
132 .debounce_interval
= RBSPI_KEYS_DEBOUNCE_INTERVAL
,
133 .gpio
= RBSPI_GPIO_BTN_RESET16
,
138 /* RB mAP L-2nD gpios */
139 #define RBMAPL_GPIO_LED_POWER 17
140 #define RBMAPL_GPIO_LED_USER 14
141 #define RBMAPL_GPIO_LED_ETH 4
142 #define RBMAPL_GPIO_LED_WLAN 11
144 static struct gpio_led rbmapl_leds
[] __initdata
= {
146 .name
= "rb:green:power",
147 .gpio
= RBMAPL_GPIO_LED_POWER
,
149 .default_state
= LEDS_GPIO_DEFSTATE_ON
,
151 .name
= "rb:green:user",
152 .gpio
= RBMAPL_GPIO_LED_USER
,
155 .name
= "rb:green:eth",
156 .gpio
= RBMAPL_GPIO_LED_ETH
,
159 .name
= "rb:green:wlan",
160 .gpio
= RBMAPL_GPIO_LED_WLAN
,
165 /* RB 941L-2nD gpios */
166 #define RBHAPL_GPIO_LED_USER 14
167 static struct gpio_led rbhapl_leds
[] __initdata
= {
169 .name
= "rb:green:user",
170 .gpio
= RBHAPL_GPIO_LED_USER
,
176 #define RBSPI_SSR_GPIO_BASE 40
177 #define RBSPI_SSR_GPIO(bit) (RBSPI_SSR_GPIO_BASE + (bit))
179 /* RB 951Ui-2nD gpios */
180 #define RB952_SSR_BIT_LED_LAN1 0
181 #define RB952_SSR_BIT_LED_LAN2 1
182 #define RB952_SSR_BIT_LED_LAN3 2
183 #define RB952_SSR_BIT_LED_LAN4 3
184 #define RB952_SSR_BIT_LED_LAN5 4
185 #define RB952_SSR_BIT_USB_POWER 5
186 #define RB952_SSR_BIT_LED_WLAN 6
187 #define RB952_GPIO_SSR_CS 11
188 #define RB952_GPIO_LED_USER 4
189 #define RB952_GPIO_POE_POWER 14
190 #define RB952_GPIO_POE_STATUS 12
191 #define RB952_GPIO_USB_POWER RBSPI_SSR_GPIO(RB952_SSR_BIT_USB_POWER)
192 #define RB952_GPIO_LED_LAN1 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN1)
193 #define RB952_GPIO_LED_LAN2 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN2)
194 #define RB952_GPIO_LED_LAN3 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN3)
195 #define RB952_GPIO_LED_LAN4 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN4)
196 #define RB952_GPIO_LED_LAN5 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN5)
197 #define RB952_GPIO_LED_WLAN RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_WLAN)
199 static struct gpio_led rb952_leds
[] __initdata
= {
201 .name
= "rb:green:user",
202 .gpio
= RB952_GPIO_LED_USER
,
205 .name
= "rb:blue:wlan",
206 .gpio
= RB952_GPIO_LED_WLAN
,
209 .name
= "rb:green:port1",
210 .gpio
= RB952_GPIO_LED_LAN1
,
213 .name
= "rb:green:port2",
214 .gpio
= RB952_GPIO_LED_LAN2
,
217 .name
= "rb:green:port3",
218 .gpio
= RB952_GPIO_LED_LAN3
,
221 .name
= "rb:green:port4",
222 .gpio
= RB952_GPIO_LED_LAN4
,
225 .name
= "rb:green:port5",
226 .gpio
= RB952_GPIO_LED_LAN5
,
231 /* RB wAP-2nD gpios */
232 #define RBWAP_GPIO_LED_USER 14
233 #define RBWAP_GPIO_LED_WLAN 11
235 static struct gpio_led rbwap_leds
[] __initdata
= {
237 .name
= "rb:green:user",
238 .gpio
= RBWAP_GPIO_LED_USER
,
241 .name
= "rb:green:wlan",
242 .gpio
= RBWAP_GPIO_LED_WLAN
,
247 /* RB cAP-2nD gpios */
248 #define RBCAP_GPIO_LED_1 14
249 #define RBCAP_GPIO_LED_2 12
250 #define RBCAP_GPIO_LED_3 11
251 #define RBCAP_GPIO_LED_4 4
252 #define RBCAP_GPIO_LED_ALL 13
254 static struct gpio_led rbcap_leds
[] __initdata
= {
256 .name
= "rb:green:rssi1",
257 .gpio
= RBCAP_GPIO_LED_1
,
260 .name
= "rb:green:rssi2",
261 .gpio
= RBCAP_GPIO_LED_2
,
264 .name
= "rb:green:rssi3",
265 .gpio
= RBCAP_GPIO_LED_3
,
268 .name
= "rb:green:rssi4",
269 .gpio
= RBCAP_GPIO_LED_4
,
274 /* RB mAP-2nD gpios */
275 #define RBMAP_SSR_BIT_LED_LAN1 0
276 #define RBMAP_SSR_BIT_LED_LAN2 1
277 #define RBMAP_SSR_BIT_LED_POEO 2
278 #define RBMAP_SSR_BIT_LED_USER 3
279 #define RBMAP_SSR_BIT_LED_WLAN 4
280 #define RBMAP_SSR_BIT_USB_POWER 5
281 #define RBMAP_SSR_BIT_LED_APCAP 6
282 #define RBMAP_GPIO_SSR_CS 11
283 #define RBMAP_GPIO_LED_POWER 4
284 #define RBMAP_GPIO_POE_POWER 14
285 #define RBMAP_GPIO_POE_STATUS 12
286 #define RBMAP_GPIO_USB_POWER RBSPI_SSR_GPIO(RBMAP_SSR_BIT_USB_POWER)
287 #define RBMAP_GPIO_LED_LAN1 RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_LAN1)
288 #define RBMAP_GPIO_LED_LAN2 RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_LAN2)
289 #define RBMAP_GPIO_LED_POEO RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_POEO)
290 #define RBMAP_GPIO_LED_USER RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_USER)
291 #define RBMAP_GPIO_LED_WLAN RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_WLAN)
292 #define RBMAP_GPIO_LED_APCAP RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_APCAP)
294 static struct gpio_led rbmap_leds
[] __initdata
= {
296 .name
= "rb:green:power",
297 .gpio
= RBMAP_GPIO_LED_POWER
,
299 .default_state
= LEDS_GPIO_DEFSTATE_ON
,
301 .name
= "rb:green:eth1",
302 .gpio
= RBMAP_GPIO_LED_LAN1
,
305 .name
= "rb:green:eth2",
306 .gpio
= RBMAP_GPIO_LED_WLAN
,
309 .name
= "rb:red:poe_out",
310 .gpio
= RBMAP_GPIO_LED_POEO
,
313 .name
= "rb:green:user",
314 .gpio
= RBMAP_GPIO_LED_USER
,
317 .name
= "rb:green:wlan",
318 .gpio
= RBMAP_GPIO_LED_WLAN
,
321 .name
= "rb:green:ap_cap",
322 .gpio
= RBMAP_GPIO_LED_APCAP
,
328 static struct gen_74x164_chip_platform_data rbspi_ssr_data
= {
329 .base
= RBSPI_SSR_GPIO_BASE
,
332 /* the spi-ath79 driver can only natively handle CS0. Other CS are bit-banged */
333 static int rbspi_spi_cs_gpios
[] = {
334 -ENOENT
, /* CS0 is always -ENOENT: natively handled */
335 -ENOENT
, /* CS1 can be updated by the code as necessary */
338 static struct ath79_spi_platform_data rbspi_ath79_spi_data
= {
340 .cs_gpios
= rbspi_spi_cs_gpios
,
344 * Global spi_board_info: devices that don't have an SSR only have the SPI NOR
345 * flash on bus0 CS0, while devices that have an SSR add it on the same bus CS1
347 static struct spi_board_info rbspi_spi_info
[] = {
351 .max_speed_hz
= 25000000,
352 .modalias
= "m25p80",
353 .platform_data
= &rbspi_spi_flash_data
,
357 .max_speed_hz
= 25000000,
358 .modalias
= "74x164",
359 .platform_data
= &rbspi_ssr_data
,
363 void __init
rbspi_wlan_init(int wmac_offset
)
366 u8 wlan_mac
[ETH_ALEN
];
368 art_buf
= rb_get_wlan_data();
372 ath79_init_mac(wlan_mac
, ath79_mac_base
, wmac_offset
);
373 ath79_register_wmac(art_buf
+ 0x1000, wlan_mac
);
379 * Common platform init routine for all SPI NOR devices.
381 static int __init
rbspi_platform_setup(void)
383 const struct rb_info
*info
;
386 info
= rb_init_info((void *)(KSEG1ADDR(AR71XX_SPI_BASE
)), 0x20000);
390 scnprintf(buf
, sizeof(buf
), "MikroTik %s",
391 (info
->board_name
) ? info
->board_name
: "");
392 mips_set_machine_name(buf
);
394 /* fix partitions based on flash parsing */
395 rbspi_init_partitions(info
);
401 * Common peripherals init routine for all SPI NOR devices.
404 static void __init
rbspi_peripherals_setup(u32 flags
)
408 if (flags
& RBSPI_HAS_SSR
)
409 spi_n
= ARRAY_SIZE(rbspi_spi_info
);
411 spi_n
= 1; /* only one device on bus0 */
413 rbspi_ath79_spi_data
.num_chipselect
= spi_n
;
414 rbspi_ath79_spi_data
.cs_gpios
= rbspi_spi_cs_gpios
;
415 ath79_register_spi(&rbspi_ath79_spi_data
, rbspi_spi_info
, spi_n
);
417 if (flags
& RBSPI_HAS_USB
)
418 ath79_register_usb();
422 * Common network init routine for all SPI NOR devices.
425 static void __init
rbspi_network_setup(u32 flags
, int gmac1_offset
,
428 /* for QCA953x that will init mdio1_device/data */
429 ath79_register_mdio(0, 0x0);
431 if (flags
& RBSPI_HAS_WAN4
) {
432 ath79_setup_ar934x_eth_cfg(0);
434 /* set switch to oper mode 1, PHY4 connected to CPU */
435 ath79_switch_data
.phy4_mii_en
= 1;
436 ath79_switch_data
.phy_poll_mask
|= BIT(4);
438 /* init GMAC0 connected to PHY4 at 100M */
439 ath79_eth0_data
.phy_if_mode
= PHY_INTERFACE_MODE_MII
;
440 ath79_eth0_data
.phy_mask
= BIT(4);
441 ath79_init_mac(ath79_eth0_data
.mac_addr
, ath79_mac_base
, 0);
442 ath79_register_eth(0);
444 /* set the SoC to SW_ONLY_MODE, which connects all PHYs
445 * to the internal switch.
446 * We hijack ath79_setup_ar934x_eth_cfg() to set the switch in
447 * the QCA953x, this works because this configuration bit is
448 * the same as the AR934x. There's no equivalent function for
449 * QCA953x for now. */
450 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE
);
454 ath79_init_mac(ath79_eth1_data
.mac_addr
, ath79_mac_base
, gmac1_offset
);
455 ath79_eth1_data
.phy_if_mode
= PHY_INTERFACE_MODE_GMII
;
456 ath79_register_eth(1);
458 if (flags
& RBSPI_HAS_WLAN
)
459 rbspi_wlan_init(wmac_offset
);
463 * Init the mAP lite hardware.
464 * The mAP L-2nD (mAP lite) has a single ethernet port, connected to PHY0.
465 * Trying to use GMAC0 in direct mode was unsucessful, so we're
466 * using SW_ONLY_MODE, which connects PHY0 to MAC1 on the internal
467 * switch, which is connected to GMAC1 on the SoC. GMAC0 is unused.
469 static void __init
rbmapl_setup(void)
471 u32 flags
= RBSPI_HAS_WLAN
;
473 if (rbspi_platform_setup())
476 rbspi_peripherals_setup(flags
);
478 /* GMAC1 is HW MAC, WLAN MAC is HW MAC + 1 */
479 rbspi_network_setup(flags
, 0, 1);
481 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbmapl_leds
), rbmapl_leds
);
483 /* mAP lite has a single reset button as gpio 16 */
484 ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL
,
485 ARRAY_SIZE(rbspi_gpio_keys_reset16
),
486 rbspi_gpio_keys_reset16
);
488 /* clear internal multiplexing */
489 ath79_gpio_output_select(RBMAPL_GPIO_LED_ETH
, AR934X_GPIO_OUT_GPIO
);
490 ath79_gpio_output_select(RBMAPL_GPIO_LED_POWER
, AR934X_GPIO_OUT_GPIO
);
494 * Init the hAP lite hardware.
495 * The 941-2nD (hAP lite) has 4 ethernet ports, with port 2-4
496 * being assigned to LAN on the casing, and port 1 being assigned
497 * to "internet" (WAN) on the casing. Port 1 is connected to PHY3.
498 * Since WAN is neither PHY0 nor PHY4, we cannot use GMAC0 with this device.
500 static void __init
rbhapl_setup(void)
502 u32 flags
= RBSPI_HAS_WLAN
;
504 if (rbspi_platform_setup())
507 rbspi_peripherals_setup(flags
);
509 /* GMAC1 is HW MAC, WLAN MAC is HW MAC + 4 */
510 rbspi_network_setup(flags
, 0, 4);
512 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbhapl_leds
), rbhapl_leds
);
514 /* hAP lite has a single reset button as gpio 16 */
515 ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL
,
516 ARRAY_SIZE(rbspi_gpio_keys_reset16
),
517 rbspi_gpio_keys_reset16
);
521 * The hAP, hEX lite and hEX PoE lite share the same platform
523 static void __init
rbspi_952_750r2_setup(u32 flags
)
525 if (flags
& RBSPI_HAS_SSR
)
526 rbspi_spi_cs_gpios
[1] = RB952_GPIO_SSR_CS
;
528 rbspi_peripherals_setup(flags
);
530 /* GMAC1 is HW MAC + 1, WLAN MAC IS HW MAC + 5 */
531 rbspi_network_setup(flags
, 1, 5);
533 if (flags
& RBSPI_HAS_USB
)
534 gpio_request_one(RB952_GPIO_USB_POWER
,
535 GPIOF_OUT_INIT_HIGH
| GPIOF_EXPORT_DIR_FIXED
,
538 if (flags
& RBSPI_HAS_POE
)
539 gpio_request_one(RB952_GPIO_POE_POWER
,
540 GPIOF_OUT_INIT_HIGH
| GPIOF_EXPORT_DIR_FIXED
,
543 ath79_register_leds_gpio(-1, ARRAY_SIZE(rb952_leds
), rb952_leds
);
545 /* These devices have a single reset button as gpio 16 */
546 ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL
,
547 ARRAY_SIZE(rbspi_gpio_keys_reset16
),
548 rbspi_gpio_keys_reset16
);
552 * Init the hAP hardware.
553 * The 951Ui-2nD (hAP) has 5 ethernet ports, with ports 2-5 being assigned
554 * to LAN on the casing, and port 1 being assigned to "internet" (WAN).
555 * Port 1 is connected to PHY4 (the ports are labelled in reverse physical
556 * number), so the SoC can be set to connect GMAC0 to PHY4 and GMAC1 to the
557 * internal switch for the LAN ports.
558 * The device also has USB, PoE output and an SSR used for LED multiplexing.
560 static void __init
rb952_setup(void)
562 u32 flags
= RBSPI_HAS_WLAN
| RBSPI_HAS_WAN4
| RBSPI_HAS_USB
|
563 RBSPI_HAS_SSR
| RBSPI_HAS_POE
;
565 if (rbspi_platform_setup())
568 rbspi_952_750r2_setup(flags
);
572 * Init the hEX (PoE) lite hardware.
573 * The 750UP r2 (hEX PoE lite) is nearly identical to the hAP, only without
574 * WLAN. The 750 r2 (hEX lite) is nearly identical to the 750UP r2, only
575 * without USB and POE. It shares the same bootloader board identifier.
577 static void __init
rb750upr2_setup(void)
579 u32 flags
= RBSPI_HAS_WAN4
| RBSPI_HAS_SSR
;
581 if (rbspi_platform_setup())
584 /* differentiate the hEX lite from the hEX PoE lite */
585 if (strstr(mips_get_machine_name(), "750UP r2"))
586 flags
|= RBSPI_HAS_USB
| RBSPI_HAS_POE
;
588 rbspi_952_750r2_setup(flags
);
592 * Init the wAP hardware (EXPERIMENTAL).
593 * The wAP 2nD has a single ethernet port.
595 static void __init
rbwap_setup(void)
597 u32 flags
= RBSPI_HAS_WLAN
;
599 if (rbspi_platform_setup())
602 rbspi_peripherals_setup(flags
);
604 /* GMAC1 is HW MAC, WLAN MAC is HW MAC + 1 */
605 rbspi_network_setup(flags
, 0, 1);
607 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbwap_leds
), rbwap_leds
);
611 * Init the cAP hardware (EXPERIMENTAL).
612 * The cAP 2nD has a single ethernet port, and a global LED switch.
614 static void __init
rbcap_setup(void)
616 u32 flags
= RBSPI_HAS_WLAN
;
618 if (rbspi_platform_setup())
621 rbspi_peripherals_setup(flags
);
623 /* GMAC1 is HW MAC, WLAN MAC is HW MAC + 1 */
624 rbspi_network_setup(flags
, 0, 1);
626 gpio_request_one(RBCAP_GPIO_LED_ALL
,
627 GPIOF_OUT_INIT_HIGH
| GPIOF_EXPORT_DIR_FIXED
,
630 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbcap_leds
), rbcap_leds
);
634 * Init the mAP hardware (EXPERIMENTAL).
635 * The mAP 2nD has two ethernet ports, PoE output and an SSR for LED
638 static void __init
rbmap_setup(void)
640 u32 flags
= RBSPI_HAS_WLAN
| RBSPI_HAS_SSR
| RBSPI_HAS_POE
;
642 if (rbspi_platform_setup())
645 rbspi_spi_cs_gpios
[1] = RBMAP_GPIO_SSR_CS
;
646 rbspi_peripherals_setup(flags
);
648 /* GMAC1 is HW MAC, WLAN MAC is HW MAC + 2 */
649 rbspi_network_setup(flags
, 0, 2);
651 if (flags
& RBSPI_HAS_POE
)
652 gpio_request_one(RBMAP_GPIO_POE_POWER
,
653 GPIOF_OUT_INIT_HIGH
| GPIOF_EXPORT_DIR_FIXED
,
656 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbmap_leds
), rbmap_leds
);
660 MIPS_MACHINE_NONAME(ATH79_MACH_RB_MAPL
, "map-hb", rbmapl_setup
);
661 MIPS_MACHINE_NONAME(ATH79_MACH_RB_941
, "H951L", rbhapl_setup
);
662 MIPS_MACHINE_NONAME(ATH79_MACH_RB_952
, "952-hb", rb952_setup
);
663 MIPS_MACHINE_NONAME(ATH79_MACH_RB_750UPR2
, "750-hb", rb750upr2_setup
);
664 MIPS_MACHINE_NONAME(ATH79_MACH_RB_WAP
, "wap-hb", rbwap_setup
);
665 MIPS_MACHINE_NONAME(ATH79_MACH_RB_CAP
, "cap-hb", rbcap_setup
);
666 MIPS_MACHINE_NONAME(ATH79_MACH_RB_MAP
, "map2-hb", rbmap_setup
);