2 * MikroTik SPI-NOR RouterBOARDs support
4 * - MikroTik RouterBOARD mAP L-2nD
5 * - MikroTik RouterBOARD 941L-2nD
6 * - MikroTik RouterBOARD 951Ui-2nD
7 * - MikroTik RouterBOARD 750UP r2
8 * - MikroTik RouterBOARD 750 r2
10 * Preliminary support for the following hardware
11 * - MikroTik RouterBOARD wAP2nD
12 * - MikroTik RouterBOARD cAP2nD
13 * - MikroTik RouterBOARD mAP2nD
14 * Furthermore, the cAP lite (cAPL2nD) appears to feature the exact same
15 * hardware as the mAP L-2nD. It is unknown if they share the same board
18 * Copyright (C) 2017 Thibaut VARENE <varenet@parisc-linux.org>
20 * This program is free software; you can redistribute it and/or modify it
21 * under the terms of the GNU General Public License version 2 as published
22 * by the Free Software Foundation.
25 #include <linux/platform_device.h>
26 #include <linux/phy.h>
27 #include <linux/routerboot.h>
28 #include <linux/gpio.h>
30 #include <linux/spi/spi.h>
31 #include <linux/spi/74x164.h>
33 #include <linux/mtd/mtd.h>
34 #include <linux/mtd/partitions.h>
37 #include <asm/mach-ath79/ar71xx_regs.h>
38 #include <asm/mach-ath79/ath79.h>
43 #include "dev-gpio-buttons.h"
44 #include "dev-leds-gpio.h"
45 #include "dev-m25p80.h"
48 #include "machtypes.h"
49 #include "routerboot.h"
51 #define RBSPI_KEYS_POLL_INTERVAL 20 /* msecs */
52 #define RBSPI_KEYS_DEBOUNCE_INTERVAL (3 * RBSPI_KEYS_POLL_INTERVAL)
54 #define RBSPI_HAS_USB BIT(0)
55 #define RBSPI_HAS_WLAN BIT(1)
56 #define RBSPI_HAS_WAN4 BIT(2) /* has WAN port on PHY4 */
57 #define RBSPI_HAS_SSR BIT(3) /* has an SSR on SPI bus 0 */
58 #define RBSPI_HAS_POE BIT(4)
60 #define RB_ROUTERBOOT_OFFSET 0x0000
61 #define RB_BIOS_SIZE 0x1000
62 #define RB_SOFT_CFG_SIZE 0x1000
63 #define RB_KERNEL_SIZE (2 * 1024 * 1024) /* 2MB kernel */
65 /* Flash partitions indexes */
77 static struct mtd_partition rbspi_spi_partitions
[RBSPI_PARTS
];
80 * Setup the SPI flash partition table based on initial parsing.
81 * The kernel can be at any aligned position and have any size.
82 * The size of the kernel partition is the desired RB_KERNEL_SIZE
83 * minus the size of the preceding partitions (128KB).
85 static void __init
rbspi_init_partitions(const struct rb_info
*info
)
87 struct mtd_partition
*parts
= rbspi_spi_partitions
;
88 memset(parts
, 0x0, sizeof(*parts
));
90 parts
[RBSPI_PART_RBOOT
].name
= "routerboot";
91 parts
[RBSPI_PART_RBOOT
].offset
= RB_ROUTERBOOT_OFFSET
;
92 parts
[RBSPI_PART_RBOOT
].size
= info
->hard_cfg_offs
;
93 parts
[RBSPI_PART_RBOOT
].mask_flags
= MTD_WRITEABLE
;
95 parts
[RBSPI_PART_HCONF
].name
= "hard_config";
96 parts
[RBSPI_PART_HCONF
].offset
= info
->hard_cfg_offs
;
97 parts
[RBSPI_PART_HCONF
].size
= info
->hard_cfg_size
;
98 parts
[RBSPI_PART_HCONF
].mask_flags
= MTD_WRITEABLE
;
100 parts
[RBSPI_PART_BIOS
].name
= "bios";
101 parts
[RBSPI_PART_BIOS
].offset
= info
->hard_cfg_offs
102 + info
->hard_cfg_size
;
103 parts
[RBSPI_PART_BIOS
].size
= RB_BIOS_SIZE
;
104 parts
[RBSPI_PART_BIOS
].mask_flags
= MTD_WRITEABLE
;
106 parts
[RBSPI_PART_RBOOT2
].name
= "routerboot2";
107 parts
[RBSPI_PART_RBOOT2
].offset
= parts
[RBSPI_PART_BIOS
].offset
109 parts
[RBSPI_PART_RBOOT2
].size
= info
->soft_cfg_offs
110 - parts
[RBSPI_PART_RBOOT2
].offset
;
111 parts
[RBSPI_PART_RBOOT2
].mask_flags
= MTD_WRITEABLE
;
113 parts
[RBSPI_PART_SCONF
].name
= "soft_config";
114 parts
[RBSPI_PART_SCONF
].offset
= info
->soft_cfg_offs
;
115 parts
[RBSPI_PART_SCONF
].size
= RB_SOFT_CFG_SIZE
;
117 parts
[RBSPI_PART_KERN
].name
= "kernel";
118 parts
[RBSPI_PART_KERN
].offset
= parts
[RBSPI_PART_SCONF
].offset
119 + parts
[RBSPI_PART_SCONF
].size
;
120 parts
[RBSPI_PART_KERN
].size
= RB_KERNEL_SIZE
121 - parts
[RBSPI_PART_KERN
].offset
;
123 parts
[RBSPI_PART_ROOT
].name
= "rootfs";
124 parts
[RBSPI_PART_ROOT
].offset
= parts
[RBSPI_PART_KERN
].offset
125 + parts
[RBSPI_PART_KERN
].size
;
126 parts
[RBSPI_PART_ROOT
].size
= MTDPART_SIZ_FULL
;
129 static struct flash_platform_data rbspi_spi_flash_data
= {
130 .parts
= rbspi_spi_partitions
,
131 .nr_parts
= ARRAY_SIZE(rbspi_spi_partitions
),
134 /* Several boards only have a single reset button wired to GPIO 16 */
135 #define RBSPI_GPIO_BTN_RESET16 16
137 static struct gpio_keys_button rbspi_gpio_keys_reset16
[] __initdata
= {
139 .desc
= "Reset button",
142 .debounce_interval
= RBSPI_KEYS_DEBOUNCE_INTERVAL
,
143 .gpio
= RBSPI_GPIO_BTN_RESET16
,
148 /* RB mAP L-2nD gpios */
149 #define RBMAPL_GPIO_LED_POWER 17
150 #define RBMAPL_GPIO_LED_USER 14
151 #define RBMAPL_GPIO_LED_ETH 4
152 #define RBMAPL_GPIO_LED_WLAN 11
154 static struct gpio_led rbmapl_leds
[] __initdata
= {
156 .name
= "rb:green:power",
157 .gpio
= RBMAPL_GPIO_LED_POWER
,
159 .default_state
= LEDS_GPIO_DEFSTATE_ON
,
161 .name
= "rb:green:user",
162 .gpio
= RBMAPL_GPIO_LED_USER
,
165 .name
= "rb:green:eth",
166 .gpio
= RBMAPL_GPIO_LED_ETH
,
169 .name
= "rb:green:wlan",
170 .gpio
= RBMAPL_GPIO_LED_WLAN
,
175 /* RB 941L-2nD gpios */
176 #define RBHAPL_GPIO_LED_USER 14
177 static struct gpio_led rbhapl_leds
[] __initdata
= {
179 .name
= "rb:green:user",
180 .gpio
= RBHAPL_GPIO_LED_USER
,
186 #define RBSPI_SSR_GPIO_BASE 40
187 #define RBSPI_SSR_GPIO(bit) (RBSPI_SSR_GPIO_BASE + (bit))
189 /* RB 951Ui-2nD gpios */
190 #define RB952_SSR_BIT_LED_LAN1 0
191 #define RB952_SSR_BIT_LED_LAN2 1
192 #define RB952_SSR_BIT_LED_LAN3 2
193 #define RB952_SSR_BIT_LED_LAN4 3
194 #define RB952_SSR_BIT_LED_LAN5 4
195 #define RB952_SSR_BIT_USB_POWER 5
196 #define RB952_SSR_BIT_LED_WLAN 6
197 #define RB952_GPIO_SSR_CS 11
198 #define RB952_GPIO_LED_USER 4
199 #define RB952_GPIO_POE_POWER 14
200 #define RB952_GPIO_POE_STATUS 12
201 #define RB952_GPIO_USB_POWER RBSPI_SSR_GPIO(RB952_SSR_BIT_USB_POWER)
202 #define RB952_GPIO_LED_LAN1 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN1)
203 #define RB952_GPIO_LED_LAN2 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN2)
204 #define RB952_GPIO_LED_LAN3 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN3)
205 #define RB952_GPIO_LED_LAN4 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN4)
206 #define RB952_GPIO_LED_LAN5 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN5)
207 #define RB952_GPIO_LED_WLAN RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_WLAN)
209 static struct gpio_led rb952_leds
[] __initdata
= {
211 .name
= "rb:green:user",
212 .gpio
= RB952_GPIO_LED_USER
,
215 .name
= "rb:blue:wlan",
216 .gpio
= RB952_GPIO_LED_WLAN
,
219 .name
= "rb:green:port1",
220 .gpio
= RB952_GPIO_LED_LAN1
,
223 .name
= "rb:green:port2",
224 .gpio
= RB952_GPIO_LED_LAN2
,
227 .name
= "rb:green:port3",
228 .gpio
= RB952_GPIO_LED_LAN3
,
231 .name
= "rb:green:port4",
232 .gpio
= RB952_GPIO_LED_LAN4
,
235 .name
= "rb:green:port5",
236 .gpio
= RB952_GPIO_LED_LAN5
,
241 /* RB wAP-2nD gpios */
242 #define RBWAP_GPIO_LED_USER 14
243 #define RBWAP_GPIO_LED_WLAN 11
245 static struct gpio_led rbwap_leds
[] __initdata
= {
247 .name
= "rb:green:user",
248 .gpio
= RBWAP_GPIO_LED_USER
,
251 .name
= "rb:green:wlan",
252 .gpio
= RBWAP_GPIO_LED_WLAN
,
257 /* RB cAP-2nD gpios */
258 #define RBCAP_GPIO_LED_1 14
259 #define RBCAP_GPIO_LED_2 12
260 #define RBCAP_GPIO_LED_3 11
261 #define RBCAP_GPIO_LED_4 4
262 #define RBCAP_GPIO_LED_ALL 13
264 static struct gpio_led rbcap_leds
[] __initdata
= {
266 .name
= "rb:green:rssi1",
267 .gpio
= RBCAP_GPIO_LED_1
,
270 .name
= "rb:green:rssi2",
271 .gpio
= RBCAP_GPIO_LED_2
,
274 .name
= "rb:green:rssi3",
275 .gpio
= RBCAP_GPIO_LED_3
,
278 .name
= "rb:green:rssi4",
279 .gpio
= RBCAP_GPIO_LED_4
,
284 /* RB mAP-2nD gpios */
285 #define RBMAP_SSR_BIT_LED_LAN1 0
286 #define RBMAP_SSR_BIT_LED_LAN2 1
287 #define RBMAP_SSR_BIT_LED_POEO 2
288 #define RBMAP_SSR_BIT_LED_USER 3
289 #define RBMAP_SSR_BIT_LED_WLAN 4
290 #define RBMAP_SSR_BIT_USB_POWER 5
291 #define RBMAP_SSR_BIT_LED_APCAP 6
292 #define RBMAP_GPIO_SSR_CS 11
293 #define RBMAP_GPIO_LED_POWER 4
294 #define RBMAP_GPIO_POE_POWER 14
295 #define RBMAP_GPIO_POE_STATUS 12
296 #define RBMAP_GPIO_USB_POWER RBSPI_SSR_GPIO(RBMAP_SSR_BIT_USB_POWER)
297 #define RBMAP_GPIO_LED_LAN1 RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_LAN1)
298 #define RBMAP_GPIO_LED_LAN2 RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_LAN2)
299 #define RBMAP_GPIO_LED_POEO RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_POEO)
300 #define RBMAP_GPIO_LED_USER RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_USER)
301 #define RBMAP_GPIO_LED_WLAN RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_WLAN)
302 #define RBMAP_GPIO_LED_APCAP RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_APCAP)
304 static struct gpio_led rbmap_leds
[] __initdata
= {
306 .name
= "rb:green:power",
307 .gpio
= RBMAP_GPIO_LED_POWER
,
309 .default_state
= LEDS_GPIO_DEFSTATE_ON
,
311 .name
= "rb:green:eth1",
312 .gpio
= RBMAP_GPIO_LED_LAN1
,
315 .name
= "rb:green:eth2",
316 .gpio
= RBMAP_GPIO_LED_WLAN
,
319 .name
= "rb:red:poe_out",
320 .gpio
= RBMAP_GPIO_LED_POEO
,
323 .name
= "rb:green:user",
324 .gpio
= RBMAP_GPIO_LED_USER
,
327 .name
= "rb:green:wlan",
328 .gpio
= RBMAP_GPIO_LED_WLAN
,
331 .name
= "rb:green:ap_cap",
332 .gpio
= RBMAP_GPIO_LED_APCAP
,
338 static struct gen_74x164_chip_platform_data rbspi_ssr_data
= {
339 .base
= RBSPI_SSR_GPIO_BASE
,
342 /* the spi-ath79 driver can only natively handle CS0. Other CS are bit-banged */
343 static int rbspi_spi_cs_gpios
[] = {
344 -ENOENT
, /* CS0 is always -ENOENT: natively handled */
345 -ENOENT
, /* CS1 can be updated by the code as necessary */
348 static struct ath79_spi_platform_data rbspi_ath79_spi_data
= {
350 .cs_gpios
= rbspi_spi_cs_gpios
,
354 * Global spi_board_info: devices that don't have an SSR only have the SPI NOR
355 * flash on bus0 CS0, while devices that have an SSR add it on the same bus CS1
357 static struct spi_board_info rbspi_spi_info
[] = {
361 .max_speed_hz
= 25000000,
362 .modalias
= "m25p80",
363 .platform_data
= &rbspi_spi_flash_data
,
367 .max_speed_hz
= 25000000,
368 .modalias
= "74x164",
369 .platform_data
= &rbspi_ssr_data
,
373 void __init
rbspi_wlan_init(int wmac_offset
)
376 u8 wlan_mac
[ETH_ALEN
];
378 art_buf
= rb_get_wlan_data();
382 ath79_init_mac(wlan_mac
, ath79_mac_base
, wmac_offset
);
383 ath79_register_wmac(art_buf
+ 0x1000, wlan_mac
);
389 * Common platform init routine for all SPI NOR devices.
391 static int __init
rbspi_platform_setup(void)
393 const struct rb_info
*info
;
396 info
= rb_init_info((void *)(KSEG1ADDR(AR71XX_SPI_BASE
)), 0x20000);
400 scnprintf(buf
, sizeof(buf
), "MikroTik %s",
401 (info
->board_name
) ? info
->board_name
: "");
402 mips_set_machine_name(buf
);
404 /* fix partitions based on flash parsing */
405 rbspi_init_partitions(info
);
411 * Common peripherals init routine for all SPI NOR devices.
414 static void __init
rbspi_peripherals_setup(u32 flags
)
418 if (flags
& RBSPI_HAS_SSR
)
419 spi_n
= ARRAY_SIZE(rbspi_spi_info
);
421 spi_n
= 1; /* only one device on bus0 */
423 rbspi_ath79_spi_data
.num_chipselect
= spi_n
;
424 rbspi_ath79_spi_data
.cs_gpios
= rbspi_spi_cs_gpios
;
425 ath79_register_spi(&rbspi_ath79_spi_data
, rbspi_spi_info
, spi_n
);
427 if (flags
& RBSPI_HAS_USB
)
428 ath79_register_usb();
432 * Common network init routine for all SPI NOR devices.
435 static void __init
rbspi_network_setup(u32 flags
, int gmac1_offset
,
438 /* for QCA953x that will init mdio1_device/data */
439 ath79_register_mdio(0, 0x0);
441 if (flags
& RBSPI_HAS_WAN4
) {
442 ath79_setup_ar934x_eth_cfg(0);
444 /* set switch to oper mode 1, PHY4 connected to CPU */
445 ath79_switch_data
.phy4_mii_en
= 1;
446 ath79_switch_data
.phy_poll_mask
|= BIT(4);
448 /* init GMAC0 connected to PHY4 at 100M */
449 ath79_eth0_data
.phy_if_mode
= PHY_INTERFACE_MODE_MII
;
450 ath79_eth0_data
.phy_mask
= BIT(4);
451 ath79_init_mac(ath79_eth0_data
.mac_addr
, ath79_mac_base
, 0);
452 ath79_register_eth(0);
454 /* set the SoC to SW_ONLY_MODE, which connects all PHYs
455 * to the internal switch.
456 * We hijack ath79_setup_ar934x_eth_cfg() to set the switch in
457 * the QCA953x, this works because this configuration bit is
458 * the same as the AR934x. There's no equivalent function for
459 * QCA953x for now. */
460 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE
);
464 ath79_init_mac(ath79_eth1_data
.mac_addr
, ath79_mac_base
, gmac1_offset
);
465 ath79_eth1_data
.phy_if_mode
= PHY_INTERFACE_MODE_GMII
;
466 ath79_register_eth(1);
468 if (flags
& RBSPI_HAS_WLAN
)
469 rbspi_wlan_init(wmac_offset
);
473 * Init the mAP lite hardware.
474 * The mAP L-2nD (mAP lite) has a single ethernet port, connected to PHY0.
475 * Trying to use GMAC0 in direct mode was unsucessful, so we're
476 * using SW_ONLY_MODE, which connects PHY0 to MAC1 on the internal
477 * switch, which is connected to GMAC1 on the SoC. GMAC0 is unused.
479 static void __init
rbmapl_setup(void)
481 u32 flags
= RBSPI_HAS_WLAN
;
483 if (rbspi_platform_setup())
486 rbspi_peripherals_setup(flags
);
488 /* GMAC1 is HW MAC, WLAN MAC is HW MAC + 1 */
489 rbspi_network_setup(flags
, 0, 1);
491 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbmapl_leds
), rbmapl_leds
);
493 /* mAP lite has a single reset button as gpio 16 */
494 ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL
,
495 ARRAY_SIZE(rbspi_gpio_keys_reset16
),
496 rbspi_gpio_keys_reset16
);
498 /* clear internal multiplexing */
499 ath79_gpio_output_select(RBMAPL_GPIO_LED_ETH
, AR934X_GPIO_OUT_GPIO
);
500 ath79_gpio_output_select(RBMAPL_GPIO_LED_POWER
, AR934X_GPIO_OUT_GPIO
);
504 * Init the hAP lite hardware.
505 * The 941-2nD (hAP lite) has 4 ethernet ports, with port 2-4
506 * being assigned to LAN on the casing, and port 1 being assigned
507 * to "internet" (WAN) on the casing. Port 1 is connected to PHY3.
508 * Since WAN is neither PHY0 nor PHY4, we cannot use GMAC0 with this device.
510 static void __init
rbhapl_setup(void)
512 u32 flags
= RBSPI_HAS_WLAN
;
514 if (rbspi_platform_setup())
517 rbspi_peripherals_setup(flags
);
519 /* GMAC1 is HW MAC, WLAN MAC is HW MAC + 4 */
520 rbspi_network_setup(flags
, 0, 4);
522 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbhapl_leds
), rbhapl_leds
);
524 /* hAP lite has a single reset button as gpio 16 */
525 ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL
,
526 ARRAY_SIZE(rbspi_gpio_keys_reset16
),
527 rbspi_gpio_keys_reset16
);
531 * The hAP, hEX lite and hEX PoE lite share the same platform
533 static void __init
rbspi_952_750r2_setup(u32 flags
)
535 if (flags
& RBSPI_HAS_SSR
)
536 rbspi_spi_cs_gpios
[1] = RB952_GPIO_SSR_CS
;
538 rbspi_peripherals_setup(flags
);
540 /* GMAC1 is HW MAC + 1, WLAN MAC IS HW MAC + 5 */
541 rbspi_network_setup(flags
, 1, 5);
543 if (flags
& RBSPI_HAS_USB
)
544 gpio_request_one(RB952_GPIO_USB_POWER
,
545 GPIOF_OUT_INIT_HIGH
| GPIOF_EXPORT_DIR_FIXED
,
548 if (flags
& RBSPI_HAS_POE
)
549 gpio_request_one(RB952_GPIO_POE_POWER
,
550 GPIOF_OUT_INIT_HIGH
| GPIOF_EXPORT_DIR_FIXED
,
553 ath79_register_leds_gpio(-1, ARRAY_SIZE(rb952_leds
), rb952_leds
);
555 /* These devices have a single reset button as gpio 16 */
556 ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL
,
557 ARRAY_SIZE(rbspi_gpio_keys_reset16
),
558 rbspi_gpio_keys_reset16
);
562 * Init the hAP hardware.
563 * The 951Ui-2nD (hAP) has 5 ethernet ports, with ports 2-5 being assigned
564 * to LAN on the casing, and port 1 being assigned to "internet" (WAN).
565 * Port 1 is connected to PHY4 (the ports are labelled in reverse physical
566 * number), so the SoC can be set to connect GMAC0 to PHY4 and GMAC1 to the
567 * internal switch for the LAN ports.
568 * The device also has USB, PoE output and an SSR used for LED multiplexing.
570 static void __init
rb952_setup(void)
572 u32 flags
= RBSPI_HAS_WLAN
| RBSPI_HAS_WAN4
| RBSPI_HAS_USB
|
573 RBSPI_HAS_SSR
| RBSPI_HAS_POE
;
575 if (rbspi_platform_setup())
578 rbspi_952_750r2_setup(flags
);
582 * Init the hEX (PoE) lite hardware.
583 * The 750UP r2 (hEX PoE lite) is nearly identical to the hAP, only without
584 * WLAN. The 750 r2 (hEX lite) is nearly identical to the 750UP r2, only
585 * without USB and POE. It shares the same bootloader board identifier.
587 static void __init
rb750upr2_setup(void)
589 u32 flags
= RBSPI_HAS_WAN4
| RBSPI_HAS_SSR
;
591 if (rbspi_platform_setup())
594 /* differentiate the hEX lite from the hEX PoE lite */
595 if (strstr(mips_get_machine_name(), "750UP r2"))
596 flags
|= RBSPI_HAS_USB
| RBSPI_HAS_POE
;
598 rbspi_952_750r2_setup(flags
);
602 * Init the wAP hardware (EXPERIMENTAL).
603 * The wAP 2nD has a single ethernet port.
605 static void __init
rbwap_setup(void)
607 u32 flags
= RBSPI_HAS_WLAN
;
609 if (rbspi_platform_setup())
612 rbspi_peripherals_setup(flags
);
614 /* GMAC1 is HW MAC, WLAN MAC is HW MAC + 1 */
615 rbspi_network_setup(flags
, 0, 1);
617 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbwap_leds
), rbwap_leds
);
621 * Init the cAP hardware (EXPERIMENTAL).
622 * The cAP 2nD has a single ethernet port, and a global LED switch.
624 static void __init
rbcap_setup(void)
626 u32 flags
= RBSPI_HAS_WLAN
;
628 if (rbspi_platform_setup())
631 rbspi_peripherals_setup(flags
);
633 /* GMAC1 is HW MAC, WLAN MAC is HW MAC + 1 */
634 rbspi_network_setup(flags
, 0, 1);
636 gpio_request_one(RBCAP_GPIO_LED_ALL
,
637 GPIOF_OUT_INIT_HIGH
| GPIOF_EXPORT_DIR_FIXED
,
640 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbcap_leds
), rbcap_leds
);
644 * Init the mAP hardware (EXPERIMENTAL).
645 * The mAP 2nD has two ethernet ports, PoE output and an SSR for LED
648 static void __init
rbmap_setup(void)
650 u32 flags
= RBSPI_HAS_WLAN
| RBSPI_HAS_SSR
| RBSPI_HAS_POE
;
652 if (rbspi_platform_setup())
655 rbspi_spi_cs_gpios
[1] = RBMAP_GPIO_SSR_CS
;
656 rbspi_peripherals_setup(flags
);
658 /* GMAC1 is HW MAC, WLAN MAC is HW MAC + 2 */
659 rbspi_network_setup(flags
, 0, 2);
661 if (flags
& RBSPI_HAS_POE
)
662 gpio_request_one(RBMAP_GPIO_POE_POWER
,
663 GPIOF_OUT_INIT_HIGH
| GPIOF_EXPORT_DIR_FIXED
,
666 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbmap_leds
), rbmap_leds
);
670 MIPS_MACHINE_NONAME(ATH79_MACH_RB_MAPL
, "map-hb", rbmapl_setup
);
671 MIPS_MACHINE_NONAME(ATH79_MACH_RB_941
, "H951L", rbhapl_setup
);
672 MIPS_MACHINE_NONAME(ATH79_MACH_RB_952
, "952-hb", rb952_setup
);
673 MIPS_MACHINE_NONAME(ATH79_MACH_RB_750UPR2
, "750-hb", rb750upr2_setup
);
674 MIPS_MACHINE_NONAME(ATH79_MACH_RB_WAP
, "wap-hb", rbwap_setup
);
675 MIPS_MACHINE_NONAME(ATH79_MACH_RB_CAP
, "cap-hb", rbcap_setup
);
676 MIPS_MACHINE_NONAME(ATH79_MACH_RB_MAP
, "map2-hb", rbmap_setup
);