2 * MikroTik SPI-NOR RouterBOARDs support
4 * - MikroTik RouterBOARD mAP 2nD
5 * - MikroTik RouterBOARD mAP L-2nD
6 * - MikroTik RouterBOARD 941L-2nD
7 * - MikroTik RouterBOARD 951Ui-2nD
8 * - MikroTik RouterBOARD 952Ui-5ac2nD
9 * - MikroTik RouterBOARD 962UiGS-5HacT2HnT
10 * - MikroTik RouterBOARD 750UP r2
11 * - MikroTik RouterBOARD 750P-PBr2
12 * - MikroTik RouterBOARD 750 r2
13 * - MikroTik RouterBOARD LHG 5nD
14 * - MikroTik RouterBOARD wAP2nD
15 * - MikroTik RouterBOARD wAP G-5HacT2HnDwAP (wAP AC)
17 * Preliminary support for the following hardware
18 * - MikroTik RouterBOARD cAP2nD
19 * Furthermore, the cAP lite (cAPL2nD) appears to feature the exact same
20 * hardware as the mAP L-2nD. It is unknown if they share the same board
23 * Copyright (C) 2017 Thibaut VARENE <varenet@parisc-linux.org>
24 * Copyright (C) 2016 David Hutchison <dhutchison@bluemesh.net>
25 * Copyright (C) 2017 Ryan Mounce <ryan@mounce.com.au>
27 * This program is free software; you can redistribute it and/or modify it
28 * under the terms of the GNU General Public License version 2 as published
29 * by the Free Software Foundation.
32 #include <linux/pci.h>
33 #include <linux/platform_device.h>
34 #include <linux/phy.h>
35 #include <linux/routerboot.h>
36 #include <linux/gpio.h>
38 #include <linux/spi/spi.h>
39 #include <linux/spi/74x164.h>
41 #include <linux/mtd/mtd.h>
42 #include <linux/mtd/partitions.h>
44 #include <linux/ar8216_platform.h>
45 #include <linux/platform_data/phy-at803x.h>
46 #include <linux/platform_data/mdio-gpio.h>
49 #include <asm/mach-ath79/ar71xx_regs.h>
50 #include <asm/mach-ath79/ath79.h>
55 #include "dev-gpio-buttons.h"
56 #include "dev-leds-gpio.h"
57 #include "dev-m25p80.h"
60 #include "machtypes.h"
62 #include "routerboot.h"
64 #define RBSPI_KEYS_POLL_INTERVAL 20 /* msecs */
65 #define RBSPI_KEYS_DEBOUNCE_INTERVAL (3 * RBSPI_KEYS_POLL_INTERVAL)
67 #define RBSPI_HAS_USB BIT(0)
68 #define RBSPI_HAS_WLAN0 BIT(1)
69 #define RBSPI_HAS_WLAN1 BIT(2)
70 #define RBSPI_HAS_WAN4 BIT(3) /* has WAN port on PHY4 */
71 #define RBSPI_HAS_SSR BIT(4) /* has an SSR on SPI bus 0 */
72 #define RBSPI_HAS_POE BIT(5)
73 #define RBSPI_HAS_MDIO1 BIT(6)
74 #define RBSPI_HAS_PCI BIT(7)
76 #define RB_ROUTERBOOT_OFFSET 0x0000
77 #define RB_BIOS_SIZE 0x1000
78 #define RB_SOFT_CFG_SIZE 0x1000
80 /* Flash partitions indexes */
91 static struct mtd_partition rbspi_spi_partitions
[RBSPI_PARTS
];
94 * Setup the SPI flash partition table based on initial parsing.
95 * The kernel can be at any aligned position and have any size.
97 static void __init
rbspi_init_partitions(const struct rb_info
*info
)
99 struct mtd_partition
*parts
= rbspi_spi_partitions
;
100 memset(parts
, 0x0, sizeof(*parts
));
102 parts
[RBSPI_PART_RBOOT
].name
= "routerboot";
103 parts
[RBSPI_PART_RBOOT
].offset
= RB_ROUTERBOOT_OFFSET
;
104 parts
[RBSPI_PART_RBOOT
].size
= info
->hard_cfg_offs
;
105 parts
[RBSPI_PART_RBOOT
].mask_flags
= MTD_WRITEABLE
;
107 parts
[RBSPI_PART_HCONF
].name
= "hard_config";
108 parts
[RBSPI_PART_HCONF
].offset
= info
->hard_cfg_offs
;
109 parts
[RBSPI_PART_HCONF
].size
= info
->hard_cfg_size
;
110 parts
[RBSPI_PART_HCONF
].mask_flags
= MTD_WRITEABLE
;
112 parts
[RBSPI_PART_BIOS
].name
= "bios";
113 parts
[RBSPI_PART_BIOS
].offset
= info
->hard_cfg_offs
114 + info
->hard_cfg_size
;
115 parts
[RBSPI_PART_BIOS
].size
= RB_BIOS_SIZE
;
116 parts
[RBSPI_PART_BIOS
].mask_flags
= MTD_WRITEABLE
;
118 parts
[RBSPI_PART_RBOOT2
].name
= "routerboot2";
119 parts
[RBSPI_PART_RBOOT2
].offset
= parts
[RBSPI_PART_BIOS
].offset
121 parts
[RBSPI_PART_RBOOT2
].size
= info
->soft_cfg_offs
122 - parts
[RBSPI_PART_RBOOT2
].offset
;
123 parts
[RBSPI_PART_RBOOT2
].mask_flags
= MTD_WRITEABLE
;
125 parts
[RBSPI_PART_SCONF
].name
= "soft_config";
126 parts
[RBSPI_PART_SCONF
].offset
= info
->soft_cfg_offs
;
127 parts
[RBSPI_PART_SCONF
].size
= RB_SOFT_CFG_SIZE
;
129 parts
[RBSPI_PART_FIRMW
].name
= "firmware";
130 parts
[RBSPI_PART_FIRMW
].offset
= parts
[RBSPI_PART_SCONF
].offset
131 + parts
[RBSPI_PART_SCONF
].size
;
132 parts
[RBSPI_PART_FIRMW
].size
= MTDPART_SIZ_FULL
;
135 static struct flash_platform_data rbspi_spi_flash_data
= {
136 .parts
= rbspi_spi_partitions
,
137 .nr_parts
= ARRAY_SIZE(rbspi_spi_partitions
),
140 /* Several boards only have a single reset button, wired to GPIO 1, 16 or 20 */
141 #define RBSPI_GPIO_BTN_RESET01 1
142 #define RBSPI_GPIO_BTN_RESET16 16
143 #define RBSPI_GPIO_BTN_RESET20 20
145 static struct gpio_keys_button rbspi_gpio_keys_reset01
[] __initdata
= {
147 .desc
= "Reset button",
150 .debounce_interval
= RBSPI_KEYS_DEBOUNCE_INTERVAL
,
151 .gpio
= RBSPI_GPIO_BTN_RESET01
,
156 static struct gpio_keys_button rbspi_gpio_keys_reset16
[] __initdata
= {
158 .desc
= "Reset button",
161 .debounce_interval
= RBSPI_KEYS_DEBOUNCE_INTERVAL
,
162 .gpio
= RBSPI_GPIO_BTN_RESET16
,
167 static struct gpio_keys_button rbspi_gpio_keys_reset20
[] __initdata
= {
169 .desc
= "Reset button",
172 .debounce_interval
= RBSPI_KEYS_DEBOUNCE_INTERVAL
,
173 .gpio
= RBSPI_GPIO_BTN_RESET20
,
178 /* RB mAP L-2nD gpios */
179 #define RBMAPL_GPIO_LED_POWER 17
180 #define RBMAPL_GPIO_LED_USER 14
181 #define RBMAPL_GPIO_LED_ETH 4
182 #define RBMAPL_GPIO_LED_WLAN 11
184 static struct gpio_led rbmapl_leds
[] __initdata
= {
186 .name
= "rb:green:power",
187 .gpio
= RBMAPL_GPIO_LED_POWER
,
189 .default_state
= LEDS_GPIO_DEFSTATE_ON
,
191 .name
= "rb:green:user",
192 .gpio
= RBMAPL_GPIO_LED_USER
,
195 .name
= "rb:green:eth",
196 .gpio
= RBMAPL_GPIO_LED_ETH
,
199 .name
= "rb:green:wlan",
200 .gpio
= RBMAPL_GPIO_LED_WLAN
,
205 /* RB 941L-2nD gpios */
206 #define RBHAPL_GPIO_LED_USER 14
207 static struct gpio_led rbhapl_leds
[] __initdata
= {
209 .name
= "rb:green:user",
210 .gpio
= RBHAPL_GPIO_LED_USER
,
216 #define RBSPI_SSR_GPIO_BASE 40
217 #define RBSPI_SSR_GPIO(bit) (RBSPI_SSR_GPIO_BASE + (bit))
219 /* RB 951Ui-2nD gpios */
220 #define RB952_SSR_BIT_LED_LAN1 0
221 #define RB952_SSR_BIT_LED_LAN2 1
222 #define RB952_SSR_BIT_LED_LAN3 2
223 #define RB952_SSR_BIT_LED_LAN4 3
224 #define RB952_SSR_BIT_LED_LAN5 4
225 #define RB952_SSR_BIT_USB_POWER 5
226 #define RB952_SSR_BIT_LED_WLAN 6
227 #define RB952_GPIO_SSR_CS 11
228 #define RB952_GPIO_LED_USER 4
229 #define RB952_GPIO_POE_POWER 14
230 #define RB952_GPIO_POE_STATUS 12
231 #define RB952_GPIO_USB_POWER RBSPI_SSR_GPIO(RB952_SSR_BIT_USB_POWER)
232 #define RB952_GPIO_LED_LAN1 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN1)
233 #define RB952_GPIO_LED_LAN2 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN2)
234 #define RB952_GPIO_LED_LAN3 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN3)
235 #define RB952_GPIO_LED_LAN4 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN4)
236 #define RB952_GPIO_LED_LAN5 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN5)
237 #define RB952_GPIO_LED_WLAN RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_WLAN)
239 static struct gpio_led rb952_leds
[] __initdata
= {
241 .name
= "rb:green:user",
242 .gpio
= RB952_GPIO_LED_USER
,
245 .name
= "rb:blue:wlan",
246 .gpio
= RB952_GPIO_LED_WLAN
,
249 .name
= "rb:green:port1",
250 .gpio
= RB952_GPIO_LED_LAN1
,
253 .name
= "rb:green:port2",
254 .gpio
= RB952_GPIO_LED_LAN2
,
257 .name
= "rb:green:port3",
258 .gpio
= RB952_GPIO_LED_LAN3
,
261 .name
= "rb:green:port4",
262 .gpio
= RB952_GPIO_LED_LAN4
,
265 .name
= "rb:green:port5",
266 .gpio
= RB952_GPIO_LED_LAN5
,
272 /* RB 962UiGS-5HacT2HnT gpios */
273 #define RB962_GPIO_POE_STATUS 2
274 #define RB962_GPIO_POE_POWER 3
275 #define RB962_GPIO_LED_USER 12
276 #define RB962_GPIO_USB_POWER 13
278 static struct gpio_led rb962_leds_gpio
[] __initdata
= {
280 .name
= "rb:green:user",
281 .gpio
= RB962_GPIO_LED_USER
,
286 static const struct ar8327_led_info rb962_leds_ar8327
[] = {
287 AR8327_LED_INFO(PHY0_0
, HW
, "rb:green:port1"),
288 AR8327_LED_INFO(PHY1_0
, HW
, "rb:green:port2"),
289 AR8327_LED_INFO(PHY2_0
, HW
, "rb:green:port3"),
290 AR8327_LED_INFO(PHY3_0
, HW
, "rb:green:port4"),
291 AR8327_LED_INFO(PHY4_0
, HW
, "rb:green:port5"),
294 static struct ar8327_pad_cfg rb962_ar8327_pad0_cfg
= {
295 .mode
= AR8327_PAD_MAC_RGMII
,
296 .txclk_delay_en
= true,
297 .rxclk_delay_en
= true,
298 .txclk_delay_sel
= AR8327_CLK_DELAY_SEL1
,
299 .rxclk_delay_sel
= AR8327_CLK_DELAY_SEL2
,
300 .mac06_exchange_dis
= true,
303 static struct ar8327_pad_cfg rb962_ar8327_pad6_cfg
= {
304 /* Use SGMII interface for GMAC6 of the AR8337 switch */
305 .mode
= AR8327_PAD_MAC_SGMII
,
306 .rxclk_delay_en
= true,
307 .rxclk_delay_sel
= AR8327_CLK_DELAY_SEL0
,
310 static struct ar8327_led_cfg rb962_ar8327_led_cfg
= {
311 .led_ctrl0
= 0xc737c737,
312 .led_ctrl1
= 0x00000000,
313 .led_ctrl2
= 0x00000000,
314 .led_ctrl3
= 0x0030c300,
318 static struct ar8327_platform_data rb962_ar8327_data
= {
319 .pad0_cfg
= &rb962_ar8327_pad0_cfg
,
320 .pad6_cfg
= &rb962_ar8327_pad6_cfg
,
323 .speed
= AR8327_PORT_SPEED_1000
,
330 .speed
= AR8327_PORT_SPEED_1000
,
335 .led_cfg
= &rb962_ar8327_led_cfg
,
336 .num_leds
= ARRAY_SIZE(rb962_leds_ar8327
),
337 .leds
= rb962_leds_ar8327
,
340 static struct mdio_board_info rb962_mdio0_info
[] = {
342 .bus_id
= "ag71xx-mdio.0",
344 .platform_data
= &rb962_ar8327_data
,
348 /* RB wAP-2nD gpios */
349 #define RBWAP_GPIO_LED_USER 14
350 #define RBWAP_GPIO_LED_WLAN 11
352 static struct gpio_led rbwap_leds
[] __initdata
= {
354 .name
= "rb:green:user",
355 .gpio
= RBWAP_GPIO_LED_USER
,
358 .name
= "rb:green:wlan",
359 .gpio
= RBWAP_GPIO_LED_WLAN
,
364 /* RB cAP-2nD gpios */
365 #define RBCAP_GPIO_LED_1 14
366 #define RBCAP_GPIO_LED_2 12
367 #define RBCAP_GPIO_LED_3 11
368 #define RBCAP_GPIO_LED_4 4
369 #define RBCAP_GPIO_LED_ALL 13
371 static struct gpio_led rbcap_leds
[] __initdata
= {
373 .name
= "rb:green:rssi1",
374 .gpio
= RBCAP_GPIO_LED_1
,
377 .name
= "rb:green:rssi2",
378 .gpio
= RBCAP_GPIO_LED_2
,
381 .name
= "rb:green:rssi3",
382 .gpio
= RBCAP_GPIO_LED_3
,
385 .name
= "rb:green:rssi4",
386 .gpio
= RBCAP_GPIO_LED_4
,
391 /* RB mAP-2nD gpios */
392 #define RBMAP_SSR_BIT_LED_LAN1 0
393 #define RBMAP_SSR_BIT_LED_LAN2 1
394 #define RBMAP_SSR_BIT_LED_POEO 2
395 #define RBMAP_SSR_BIT_LED_USER 3
396 #define RBMAP_SSR_BIT_LED_WLAN 4
397 #define RBMAP_SSR_BIT_USB_POWER 5
398 #define RBMAP_SSR_BIT_LED_APCAP 6
399 #define RBMAP_GPIO_SSR_CS 11
400 #define RBMAP_GPIO_LED_POWER 4
401 #define RBMAP_GPIO_POE_POWER 14
402 #define RBMAP_GPIO_POE_STATUS 12
403 #define RBMAP_GPIO_USB_POWER RBSPI_SSR_GPIO(RBMAP_SSR_BIT_USB_POWER)
404 #define RBMAP_GPIO_LED_LAN1 RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_LAN1)
405 #define RBMAP_GPIO_LED_LAN2 RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_LAN2)
406 #define RBMAP_GPIO_LED_POEO RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_POEO)
407 #define RBMAP_GPIO_LED_USER RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_USER)
408 #define RBMAP_GPIO_LED_WLAN RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_WLAN)
409 #define RBMAP_GPIO_LED_APCAP RBSPI_SSR_GPIO(RBMAP_SSR_BIT_LED_APCAP)
411 static struct gpio_led rbmap_leds
[] __initdata
= {
413 .name
= "rb:green:power",
414 .gpio
= RBMAP_GPIO_LED_POWER
,
416 .default_state
= LEDS_GPIO_DEFSTATE_ON
,
418 .name
= "rb:green:eth1",
419 .gpio
= RBMAP_GPIO_LED_LAN1
,
422 .name
= "rb:green:eth2",
423 .gpio
= RBMAP_GPIO_LED_LAN2
,
426 .name
= "rb:red:poe_out",
427 .gpio
= RBMAP_GPIO_LED_POEO
,
430 .name
= "rb:green:user",
431 .gpio
= RBMAP_GPIO_LED_USER
,
434 .name
= "rb:green:wlan",
435 .gpio
= RBMAP_GPIO_LED_WLAN
,
438 .name
= "rb:green:ap_cap",
439 .gpio
= RBMAP_GPIO_LED_APCAP
,
444 /* RB LHG 5nD gpios */
445 #define RBLHG_GPIO_LED_0 13
446 #define RBLHG_GPIO_LED_1 12
447 #define RBLHG_GPIO_LED_2 4
448 #define RBLHG_GPIO_LED_3 21
449 #define RBLHG_GPIO_LED_4 18
450 #define RBLHG_GPIO_LED_ETH 14
451 #define RBLHG_GPIO_LED_POWER 11
452 #define RBLHG_GPIO_LED_USER 20
453 #define RBLHG_GPIO_BTN_RESET 15
455 static struct gpio_led rblhg_leds
[] __initdata
= {
457 .name
= "rb:green:rssi0",
458 .gpio
= RBLHG_GPIO_LED_0
,
461 .name
= "rb:green:rssi1",
462 .gpio
= RBLHG_GPIO_LED_1
,
465 .name
= "rb:green:rssi2",
466 .gpio
= RBLHG_GPIO_LED_2
,
469 .name
= "rb:green:rssi3",
470 .gpio
= RBLHG_GPIO_LED_3
,
473 .name
= "rb:green:rssi4",
474 .gpio
= RBLHG_GPIO_LED_4
,
477 .name
= "rb:green:eth",
478 .gpio
= RBLHG_GPIO_LED_ETH
,
481 .name
= "rb:green:user",
482 .gpio
= RBLHG_GPIO_LED_USER
,
485 .name
= "rb:blue:power",
486 .gpio
= RBLHG_GPIO_LED_POWER
,
488 .default_state
= LEDS_GPIO_DEFSTATE_ON
,
492 static struct gpio_keys_button rblhg_gpio_keys
[] __initdata
= {
494 .desc
= "Reset button",
497 .debounce_interval
= RBSPI_KEYS_DEBOUNCE_INTERVAL
,
498 .gpio
= RBLHG_GPIO_BTN_RESET
,
503 /* RB w APG-5HacT2HnD (wAP AC) gpios*/
504 #define RBWAPGSC_LED1 1
505 #define RBWAPGSC_LED2 8
506 #define RBWAPGSC_LED3 9
507 #define RBWAPGSC_POWERLED 16
508 #define RBWAPGSC_GPIO_MDIO_MDC 12
509 #define RBWAPGSC_GPIO_MDIO_DATA 11
510 #define RBWAPGSC_MDIO_PHYADDR 0
512 static struct gpio_led rbwapgsc_leds
[] __initdata
= {
514 .name
= "rb:green:led1",
515 .gpio
= RBWAPGSC_LED1
,
518 .name
= "rb:blue:power",
519 .gpio
= RBWAPGSC_POWERLED
,
524 static struct mdio_gpio_platform_data rbwapgsc_mdio_data
= {
525 .mdc
= RBWAPGSC_GPIO_MDIO_MDC
,
526 .mdio
= RBWAPGSC_GPIO_MDIO_DATA
,
527 .phy_mask
= ~BIT(RBWAPGSC_MDIO_PHYADDR
),
530 static struct platform_device rbwapgsc_phy_device
= {
534 .platform_data
= &rbwapgsc_mdio_data
538 static struct gen_74x164_chip_platform_data rbspi_ssr_data
= {
539 .base
= RBSPI_SSR_GPIO_BASE
,
543 /* the spi-ath79 driver can only natively handle CS0. Other CS are bit-banged */
544 static int rbspi_spi_cs_gpios
[] = {
545 -ENOENT
, /* CS0 is always -ENOENT: natively handled */
546 -ENOENT
, /* CS1 can be updated by the code as necessary */
549 static struct ath79_spi_platform_data rbspi_ath79_spi_data
= {
551 .cs_gpios
= rbspi_spi_cs_gpios
,
555 * Global spi_board_info: devices that don't have an SSR only have the SPI NOR
556 * flash on bus0 CS0, while devices that have an SSR add it on the same bus CS1
558 static struct spi_board_info rbspi_spi_info
[] = {
562 .max_speed_hz
= 25000000,
563 .modalias
= "m25p80",
564 .platform_data
= &rbspi_spi_flash_data
,
568 .max_speed_hz
= 25000000,
569 .modalias
= "74x164",
570 .platform_data
= &rbspi_ssr_data
,
574 void __init
rbspi_wlan_init(u16 id
, int wmac_offset
)
577 u8 wlan_mac
[ETH_ALEN
];
579 art_buf
= rb_get_ext_wlan_data(id
);
583 ath79_init_mac(wlan_mac
, ath79_mac_base
, wmac_offset
);
584 ath79_register_wmac(art_buf
+ 0x1000, wlan_mac
);
589 #define RBSPI_MACH_BUFLEN 64
591 * Common platform init routine for all SPI NOR devices.
593 static int __init
rbspi_platform_setup(void)
595 const struct rb_info
*info
;
596 char buf
[RBSPI_MACH_BUFLEN
] = "MikroTik ";
598 int len
= RBSPI_MACH_BUFLEN
- strlen(buf
) - 1;
600 info
= rb_init_info((void *)(KSEG1ADDR(AR71XX_SPI_BASE
)), 0x20000);
604 if (info
->board_name
) {
605 str
= "RouterBOARD ";
606 if (strncmp(info
->board_name
, str
, strlen(str
))) {
607 strncat(buf
, str
, len
);
610 strncat(buf
, info
->board_name
, len
);
613 strncat(buf
, "UNKNOWN", len
);
615 mips_set_machine_name(buf
);
617 /* fix partitions based on flash parsing */
618 rbspi_init_partitions(info
);
624 * Common peripherals init routine for all SPI NOR devices.
627 static void __init
rbspi_peripherals_setup(u32 flags
)
631 if (flags
& RBSPI_HAS_SSR
)
632 spi_n
= ARRAY_SIZE(rbspi_spi_info
);
634 spi_n
= 1; /* only one device on bus0 */
636 rbspi_ath79_spi_data
.num_chipselect
= spi_n
;
637 rbspi_ath79_spi_data
.cs_gpios
= rbspi_spi_cs_gpios
;
638 ath79_register_spi(&rbspi_ath79_spi_data
, rbspi_spi_info
, spi_n
);
640 if (flags
& RBSPI_HAS_USB
)
641 ath79_register_usb();
643 if (flags
& RBSPI_HAS_PCI
)
644 ath79_register_pci();
648 * Common network init routine for all SPI NOR devices.
651 static void __init
rbspi_network_setup(u32 flags
, int gmac1_offset
,
652 int wmac0_offset
, int wmac1_offset
)
654 /* for QCA953x that will init mdio1_device/data */
655 ath79_register_mdio(0, 0x0);
656 if (flags
& RBSPI_HAS_MDIO1
)
657 ath79_register_mdio(1, 0x0);
659 if (flags
& RBSPI_HAS_WAN4
) {
660 ath79_setup_ar934x_eth_cfg(0);
662 /* set switch to oper mode 1, PHY4 connected to CPU */
663 ath79_switch_data
.phy4_mii_en
= 1;
664 ath79_switch_data
.phy_poll_mask
|= BIT(4);
666 /* init GMAC0 connected to PHY4 at 100M */
667 ath79_eth0_data
.phy_if_mode
= PHY_INTERFACE_MODE_MII
;
668 ath79_eth0_data
.phy_mask
= BIT(4);
669 ath79_init_mac(ath79_eth0_data
.mac_addr
, ath79_mac_base
, 0);
670 ath79_register_eth(0);
672 /* set the SoC to SW_ONLY_MODE, which connects all PHYs
673 * to the internal switch.
674 * We hijack ath79_setup_ar934x_eth_cfg() to set the switch in
675 * the QCA953x, this works because this configuration bit is
676 * the same as the AR934x. There's no equivalent function for
677 * QCA953x for now. */
678 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE
);
682 ath79_init_mac(ath79_eth1_data
.mac_addr
, ath79_mac_base
, gmac1_offset
);
683 ath79_eth1_data
.phy_if_mode
= PHY_INTERFACE_MODE_GMII
;
684 ath79_register_eth(1);
686 if (flags
& RBSPI_HAS_WLAN0
)
687 rbspi_wlan_init(0, wmac0_offset
);
689 if (flags
& RBSPI_HAS_WLAN1
)
690 rbspi_wlan_init(1, wmac1_offset
);
694 * Init the mAP lite hardware (QCA953x).
695 * The mAP L-2nD (mAP lite) has a single ethernet port, connected to PHY0.
696 * Trying to use GMAC0 in direct mode was unsucessful, so we're
697 * using SW_ONLY_MODE, which connects PHY0 to MAC1 on the internal
698 * switch, which is connected to GMAC1 on the SoC. GMAC0 is unused.
700 static void __init
rbmapl_setup(void)
702 u32 flags
= RBSPI_HAS_WLAN0
;
704 if (rbspi_platform_setup())
707 rbspi_peripherals_setup(flags
);
709 /* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 1 */
710 rbspi_network_setup(flags
, 0, 1, 0);
712 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbmapl_leds
), rbmapl_leds
);
714 /* mAP lite has a single reset button as gpio 16 */
715 ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL
,
716 ARRAY_SIZE(rbspi_gpio_keys_reset16
),
717 rbspi_gpio_keys_reset16
);
719 /* clear internal multiplexing */
720 ath79_gpio_output_select(RBMAPL_GPIO_LED_ETH
, AR934X_GPIO_OUT_GPIO
);
721 ath79_gpio_output_select(RBMAPL_GPIO_LED_POWER
, AR934X_GPIO_OUT_GPIO
);
725 * Init the hAP lite hardware (QCA953x).
726 * The 941-2nD (hAP lite) has 4 ethernet ports, with port 2-4
727 * being assigned to LAN on the casing, and port 1 being assigned
728 * to "internet" (WAN) on the casing. Port 1 is connected to PHY3.
729 * Since WAN is neither PHY0 nor PHY4, we cannot use GMAC0 with this device.
731 static void __init
rbhapl_setup(void)
733 u32 flags
= RBSPI_HAS_WLAN0
;
735 if (rbspi_platform_setup())
738 rbspi_peripherals_setup(flags
);
740 /* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 4 */
741 rbspi_network_setup(flags
, 0, 4, 0);
743 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbhapl_leds
), rbhapl_leds
);
745 /* hAP lite has a single reset button as gpio 16 */
746 ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL
,
747 ARRAY_SIZE(rbspi_gpio_keys_reset16
),
748 rbspi_gpio_keys_reset16
);
752 * The hAP, hAP ac lite, hEX lite and hEX PoE lite share the same platform
754 static void __init
rbspi_952_750r2_setup(u32 flags
)
756 if (flags
& RBSPI_HAS_SSR
)
757 rbspi_spi_cs_gpios
[1] = RB952_GPIO_SSR_CS
;
759 rbspi_peripherals_setup(flags
);
762 * GMAC1 is HW MAC + 1, WLAN0 MAC IS HW MAC + 5 (hAP),
763 * WLAN1 MAC IS HW MAC + 6 (hAP ac lite)
765 rbspi_network_setup(flags
, 1, 5, 6);
767 if (flags
& RBSPI_HAS_USB
)
768 gpio_request_one(RB952_GPIO_USB_POWER
,
769 GPIOF_OUT_INIT_HIGH
| GPIOF_EXPORT_DIR_FIXED
,
772 if (flags
& RBSPI_HAS_POE
)
773 gpio_request_one(RB952_GPIO_POE_POWER
,
774 GPIOF_OUT_INIT_HIGH
| GPIOF_EXPORT_DIR_FIXED
,
777 ath79_register_leds_gpio(-1, ARRAY_SIZE(rb952_leds
), rb952_leds
);
779 /* These devices have a single reset button as gpio 16 */
780 ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL
,
781 ARRAY_SIZE(rbspi_gpio_keys_reset16
),
782 rbspi_gpio_keys_reset16
);
786 * Init the hAP (ac lite) hardware (QCA953x).
787 * The 951Ui-2nD (hAP) has 5 ethernet ports, with ports 2-5 being assigned
788 * to LAN on the casing, and port 1 being assigned to "internet" (WAN).
789 * Port 1 is connected to PHY4 (the ports are labelled in reverse physical
790 * number), so the SoC can be set to connect GMAC0 to PHY4 and GMAC1 to the
791 * internal switch for the LAN ports.
792 * The device also has USB, PoE output and an SSR used for LED multiplexing.
793 * The 952Ui-5ac2nD (hAP ac lite) is nearly identical to the hAP, it adds a
794 * QCA9887 5GHz radio via PCI and moves 2.4GHz from WLAN0 to WLAN1.
796 static void __init
rb952_setup(void)
798 u32 flags
= RBSPI_HAS_WAN4
| RBSPI_HAS_USB
|
799 RBSPI_HAS_SSR
| RBSPI_HAS_POE
;
801 if (rbspi_platform_setup())
804 /* differentiate the hAP from the hAP ac lite */
805 if (strstr(mips_get_machine_name(), "952Ui-5ac2nD"))
806 flags
|= RBSPI_HAS_WLAN1
| RBSPI_HAS_PCI
;
808 flags
|= RBSPI_HAS_WLAN0
;
810 rbspi_952_750r2_setup(flags
);
814 * Init the hEX (PoE) lite hardware (QCA953x).
815 * The 750UP r2 (hEX PoE lite) is nearly identical to the hAP, only without
816 * WLAN. The 750 r2 (hEX lite) is nearly identical to the 750UP r2, only
817 * without USB and POE. The 750P Pbr2 (Powerbox) is nearly identical to hEX PoE
818 * lite, only without USB. It shares the same bootloader board identifier.
820 static void __init
rb750upr2_setup(void)
822 u32 flags
= RBSPI_HAS_WAN4
| RBSPI_HAS_SSR
;
824 if (rbspi_platform_setup())
827 /* differentiate the hEX lite from the hEX PoE lite */
828 if (strstr(mips_get_machine_name(), "750UP r2"))
829 flags
|= RBSPI_HAS_USB
| RBSPI_HAS_POE
;
831 /* differentiate the Powerbox from the hEX lite */
832 else if (strstr(mips_get_machine_name(), "750P r2"))
833 flags
|= RBSPI_HAS_POE
;
835 rbspi_952_750r2_setup(flags
);
839 * Init the hAP ac / 962UiGS-5HacT2HnT hardware (QCA9558).
840 * The hAP ac has 5 ethernet ports provided by an AR8337 switch. Port 1 is
841 * assigned to WAN, ports 2-5 are assigned to LAN. Port 0 is connected to the
842 * SoC, ports 1-5 of the switch are connected to physical ports 1-5 in order.
843 * The SFP cage is not assigned by default on RouterOS. Extra work is required
844 * to support this interface as it is directly connected to the SoC (eth1).
845 * Wireless is provided by a 2.4GHz radio on the SoC (WLAN1) and a 5GHz radio
846 * attached via PCI (QCA9880). Red and green WLAN LEDs are populated however
847 * they are not attached to GPIOs, extra work is required to support these.
848 * PoE and USB output power control is supported.
850 static void __init
rb962_setup(void)
852 u32 flags
= RBSPI_HAS_USB
| RBSPI_HAS_POE
| RBSPI_HAS_PCI
;
854 if (rbspi_platform_setup())
857 rbspi_peripherals_setup(flags
);
859 /* Do not call rbspi_network_setup as we have a discrete switch chip */
860 ath79_eth0_pll_data
.pll_1000
= 0xae000000;
861 ath79_eth0_pll_data
.pll_100
= 0xa0000101;
862 ath79_eth0_pll_data
.pll_10
= 0xa0001313;
864 ath79_register_mdio(0, 0x0);
865 mdiobus_register_board_info(rb962_mdio0_info
,
866 ARRAY_SIZE(rb962_mdio0_info
));
868 ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN
);
870 ath79_init_mac(ath79_eth0_data
.mac_addr
, ath79_mac_base
, 0);
871 ath79_eth0_data
.phy_if_mode
= PHY_INTERFACE_MODE_RGMII
;
872 ath79_eth0_data
.phy_mask
= BIT(0);
873 ath79_eth0_data
.mii_bus_dev
= &ath79_mdio0_device
.dev
;
874 ath79_register_eth(0);
876 /* WLAN1 MAC is HW MAC + 7 */
877 rbspi_wlan_init(1, 7);
879 if (flags
& RBSPI_HAS_USB
)
880 gpio_request_one(RB962_GPIO_USB_POWER
,
881 GPIOF_OUT_INIT_HIGH
| GPIOF_EXPORT_DIR_FIXED
,
884 /* PoE output GPIO is inverted, set GPIOF_ACTIVE_LOW for consistency */
885 if (flags
& RBSPI_HAS_POE
)
886 gpio_request_one(RB962_GPIO_POE_POWER
,
887 GPIOF_OUT_INIT_HIGH
| GPIOF_ACTIVE_LOW
|
888 GPIOF_EXPORT_DIR_FIXED
,
891 ath79_register_leds_gpio(-1, ARRAY_SIZE(rb962_leds_gpio
),
894 /* This device has a single reset button as gpio 20 */
895 ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL
,
896 ARRAY_SIZE(rbspi_gpio_keys_reset20
),
897 rbspi_gpio_keys_reset20
);
901 * Init the LHG hardware (AR9344).
902 * The LHG 5nD has a single ethernet port connected to PHY0.
903 * Wireless is provided via 5GHz WLAN1.
905 static void __init
rblhg_setup(void)
907 u32 flags
= RBSPI_HAS_WLAN1
| RBSPI_HAS_MDIO1
;
909 if (rbspi_platform_setup())
912 rbspi_peripherals_setup(flags
);
914 /* GMAC1 is HW MAC, WLAN1 MAC is HW MAC + 1 */
915 rbspi_network_setup(flags
, 0, 0, 1);
917 ath79_register_leds_gpio(-1, ARRAY_SIZE(rblhg_leds
), rblhg_leds
);
919 ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL
,
920 ARRAY_SIZE(rblhg_gpio_keys
),
925 * Init the wAP hardware.
926 * The wAP 2nD has a single ethernet port.
928 static void __init
rbwap_setup(void)
930 u32 flags
= RBSPI_HAS_WLAN0
;
932 if (rbspi_platform_setup())
935 rbspi_peripherals_setup(flags
);
937 /* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 1 */
938 rbspi_network_setup(flags
, 0, 1, 0);
940 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbwap_leds
), rbwap_leds
);
942 /* wAP has a single reset button as GPIO 16 */
943 ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL
,
944 ARRAY_SIZE(rbspi_gpio_keys_reset16
),
945 rbspi_gpio_keys_reset16
);
949 * Init the cAP hardware (EXPERIMENTAL).
950 * The cAP 2nD has a single ethernet port, and a global LED switch.
952 static void __init
rbcap_setup(void)
954 u32 flags
= RBSPI_HAS_WLAN0
;
956 if (rbspi_platform_setup())
959 rbspi_peripherals_setup(flags
);
961 /* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 1 */
962 rbspi_network_setup(flags
, 0, 1, 0);
964 gpio_request_one(RBCAP_GPIO_LED_ALL
,
965 GPIOF_OUT_INIT_HIGH
| GPIOF_EXPORT_DIR_FIXED
,
968 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbcap_leds
), rbcap_leds
);
972 * Init the mAP hardware.
973 * The mAP 2nD has two ethernet ports, PoE output, SSR for LED
974 * multiplexing and USB port.
976 static void __init
rbmap_setup(void)
978 u32 flags
= RBSPI_HAS_USB
| RBSPI_HAS_WLAN0
|
979 RBSPI_HAS_SSR
| RBSPI_HAS_POE
;
981 if (rbspi_platform_setup())
984 rbspi_spi_cs_gpios
[1] = RBMAP_GPIO_SSR_CS
;
985 rbspi_peripherals_setup(flags
);
987 /* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 2 */
988 rbspi_network_setup(flags
, 0, 2, 0);
990 if (flags
& RBSPI_HAS_POE
)
991 gpio_request_one(RBMAP_GPIO_POE_POWER
,
992 GPIOF_OUT_INIT_LOW
| GPIOF_EXPORT_DIR_FIXED
,
995 /* USB power GPIO is inverted, set GPIOF_ACTIVE_LOW for consistency */
996 if (flags
& RBSPI_HAS_USB
)
997 gpio_request_one(RBMAP_GPIO_USB_POWER
,
998 GPIOF_OUT_INIT_HIGH
| GPIOF_ACTIVE_LOW
|
999 GPIOF_EXPORT_DIR_FIXED
,
1002 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbmap_leds
), rbmap_leds
);
1004 /* mAP 2nD has a single reset button as gpio 16 */
1005 ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL
,
1006 ARRAY_SIZE(rbspi_gpio_keys_reset16
),
1007 rbspi_gpio_keys_reset16
);
1011 * Init the wAPGSC (RB wAPG-5HacT2HnD // wAP AC) hardware.
1012 * The wAPGSC has one Ethernet port via AR8033 with PoE input, dual radio (SoC
1013 * 2.4 GHz and external QCA9880) and a ZT2046Q temperature and voltage sensor
1014 * (currently not supported).
1016 static void __init
rbwapgsc_setup(void)
1018 u32 flags
= RBSPI_HAS_PCI
;
1020 if (rbspi_platform_setup())
1023 rbspi_peripherals_setup(flags
);
1025 platform_device_register(&rbwapgsc_phy_device
);
1027 ath79_init_mac(ath79_eth1_data
.mac_addr
, ath79_mac_base
, 0);
1028 ath79_eth1_data
.mii_bus_dev
= &rbwapgsc_phy_device
.dev
;
1029 ath79_eth1_data
.phy_if_mode
= PHY_INTERFACE_MODE_SGMII
;
1030 ath79_eth1_data
.phy_mask
= BIT(RBWAPGSC_MDIO_PHYADDR
);
1031 ath79_eth1_pll_data
.pll_1000
= 0x03000101;
1032 ath79_eth1_pll_data
.pll_100
= 0x80000101;
1033 ath79_eth1_pll_data
.pll_10
= 0x80001313;
1034 ath79_eth1_data
.speed
= SPEED_1000
;
1035 ath79_eth1_data
.duplex
= DUPLEX_FULL
;
1036 ath79_register_eth(1);
1038 rbspi_wlan_init(1, 2);
1040 ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL
,
1041 ARRAY_SIZE(rbspi_gpio_keys_reset01
),
1042 rbspi_gpio_keys_reset01
);
1044 ath79_gpio_function_enable(QCA955X_GPIO_FUNC_JTAG_DISABLE
|
1045 QCA955X_GPIO_REG_OUT_FUNC4
|
1046 QCA955X_GPIO_REG_OUT_FUNC3
);
1048 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbwapgsc_leds
),
1052 MIPS_MACHINE_NONAME(ATH79_MACH_RB_MAPL
, "map-hb", rbmapl_setup
);
1053 MIPS_MACHINE_NONAME(ATH79_MACH_RB_941
, "H951L", rbhapl_setup
);
1054 MIPS_MACHINE_NONAME(ATH79_MACH_RB_952
, "952-hb", rb952_setup
);
1055 MIPS_MACHINE_NONAME(ATH79_MACH_RB_962
, "962", rb962_setup
);
1056 MIPS_MACHINE_NONAME(ATH79_MACH_RB_750UPR2
, "750-hb", rb750upr2_setup
);
1057 MIPS_MACHINE_NONAME(ATH79_MACH_RB_LHG5
, "lhg", rblhg_setup
);
1058 MIPS_MACHINE_NONAME(ATH79_MACH_RB_WAP
, "wap-hb", rbwap_setup
);
1059 MIPS_MACHINE_NONAME(ATH79_MACH_RB_CAP
, "cap-hb", rbcap_setup
);
1060 MIPS_MACHINE_NONAME(ATH79_MACH_RB_MAP
, "map2-hb", rbmap_setup
);
1061 MIPS_MACHINE_NONAME(ATH79_MACH_RB_WAPAC
, "wapg-sc", rbwapgsc_setup
);