2 * MikroTik RouterBOARD SXT Lite support
4 * Copyright (C) 2012 Stijn Tintel <stijn@linux-ipv6.be>
5 * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
6 * Copyright (C) 2013 Vyacheslav Adamanov <adamanov@gmail.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
13 #define pr_fmt(fmt) "sxtlite: " fmt
15 #include <linux/phy.h>
16 #include <linux/delay.h>
17 #include <linux/platform_device.h>
18 #include <linux/ath9k_platform.h>
19 #include <linux/mtd/mtd.h>
20 #include <linux/mtd/nand.h>
21 #include <linux/mtd/partitions.h>
22 #include <linux/spi/spi.h>
23 #include <linux/spi/flash.h>
24 #include <linux/rle.h>
25 #include <linux/routerboot.h>
26 #include <linux/gpio.h>
28 #include <asm/mach-ath79/ath79.h>
29 #include <asm/mach-ath79/ar71xx_regs.h>
31 #include "dev-ap9x-pci.h"
32 #include "dev-gpio-buttons.h"
33 #include "dev-leds-gpio.h"
35 #include "dev-m25p80.h"
39 #include "machtypes.h"
40 #include "routerboot.h"
41 #include <linux/ar8216_platform.h>
43 #define SXTLITE_GPIO_NAND_NCE 14
44 #define SXTLITE_GPIO_LED_USER 3
45 #define SXTLITE_GPIO_LED_1 13
46 #define SXTLITE_GPIO_LED_2 12
47 #define SXTLITE_GPIO_LED_3 4
48 #define SXTLITE_GPIO_LED_4 21
49 #define SXTLITE_GPIO_LED_5 18
50 #define SXTLITE_GPIO_LED_POWER 11
52 #define SXTLITE_GPIO_BUZZER 19
54 #define SXTLITE_GPIO_BTN_RESET 15
56 #define SXTLITE_KEYS_POLL_INTERVAL 20
57 #define SXTLITE_KEYS_DEBOUNCE_INTERVAL (3 * SXTLITE_KEYS_POLL_INTERVAL)
59 static struct mtd_partition rbsxtlite_nand_partitions
[] = {
64 .mask_flags
= MTD_WRITEABLE
,
68 .offset
= (256 * 1024),
69 .size
= (4 * 1024 * 1024) - (256 * 1024),
73 .offset
= MTDPART_OFS_NXTBLK
,
74 .size
= MTDPART_SIZ_FULL
,
78 static struct gpio_led rbsxtlite_leds_gpio
[] __initdata
= {
80 .name
= "rb:green:user",
81 .gpio
= SXTLITE_GPIO_LED_USER
,
85 .name
= "rb:green:led1",
86 .gpio
= SXTLITE_GPIO_LED_1
,
90 .name
= "rb:green:led2",
91 .gpio
= SXTLITE_GPIO_LED_2
,
95 .name
= "rb:green:led3",
96 .gpio
= SXTLITE_GPIO_LED_3
,
100 .name
= "rb:green:led4",
101 .gpio
= SXTLITE_GPIO_LED_4
,
105 .name
= "rb:green:led5",
106 .gpio
= SXTLITE_GPIO_LED_5
,
110 .name
= "rb:green:power",
111 .gpio
= SXTLITE_GPIO_LED_POWER
,
112 .default_state
= LEDS_GPIO_DEFSTATE_KEEP
,
116 static struct gpio_keys_button rbsxtlite_gpio_keys
[] __initdata
= {
118 .desc
= "Reset button",
121 .debounce_interval
= SXTLITE_KEYS_DEBOUNCE_INTERVAL
,
122 .gpio
= SXTLITE_GPIO_BTN_RESET
,
127 static int __init
rbsxtlite_rbinfo_init(void)
129 const struct rb_info
*info
;
131 info
= rb_init_info((void *)(KSEG1ADDR(AR71XX_SPI_BASE
)), 0x10000);
138 void __init
rbsxtlite_wlan_init(void)
141 u8 wlan_mac
[ETH_ALEN
];
143 art_buf
= rb_get_wlan_data();
147 ath79_init_mac(wlan_mac
, ath79_mac_base
, 1);
148 ath79_register_wmac(art_buf
+ 0x1000, wlan_mac
);
153 static void rbsxtlite_nand_select_chip(int chip_no
)
157 gpio_set_value(SXTLITE_GPIO_NAND_NCE
, 0);
160 gpio_set_value(SXTLITE_GPIO_NAND_NCE
, 1);
166 static struct nand_ecclayout rbsxtlite_nand_ecclayout
= {
168 .eccpos
= { 8, 9, 10, 13, 14, 15 },
170 .oobfree
= { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
173 static int rbsxtlite_nand_scan_fixup(struct mtd_info
*mtd
)
175 struct nand_chip
*chip
= mtd
->priv
;
177 if (mtd
->writesize
== 512) {
179 * Use the OLD Yaffs-1 OOB layout, otherwise RouterBoot
180 * will not be able to find the kernel that we load.
182 chip
->ecc
.layout
= &rbsxtlite_nand_ecclayout
;
188 void __init
rbsxtlite_gpio_init(void)
190 gpio_request_one(SXTLITE_GPIO_NAND_NCE
, GPIOF_OUT_INIT_HIGH
, "NAND nCE");
193 void __init
rbsxtlite_nand_init(void)
195 ath79_nfc_set_scan_fixup(rbsxtlite_nand_scan_fixup
);
196 ath79_nfc_set_parts(rbsxtlite_nand_partitions
,
197 ARRAY_SIZE(rbsxtlite_nand_partitions
));
198 ath79_nfc_set_select_chip(rbsxtlite_nand_select_chip
);
199 ath79_nfc_set_swap_dma(true);
200 ath79_register_nfc();
204 static void __init
rbsxtlite_setup(void)
206 if(rbsxtlite_rbinfo_init())
208 rbsxtlite_nand_init();
209 rbsxtlite_wlan_init();
211 ath79_register_leds_gpio(-1, ARRAY_SIZE(rbsxtlite_leds_gpio
),
212 rbsxtlite_leds_gpio
);
213 ath79_register_gpio_keys_polled(-1, SXTLITE_KEYS_POLL_INTERVAL
,
214 ARRAY_SIZE(rbsxtlite_gpio_keys
),
215 rbsxtlite_gpio_keys
);
217 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE
);
219 ath79_register_mdio(1, 0x0);
221 /* GMAC0 is left unused */
223 /* GMAC1 is connected to MAC0 on the internal switch */
224 /* The ethernet port connects to PHY P0, which connects to MAC1
225 on the internal switch */
226 ath79_init_mac(ath79_eth1_data
.mac_addr
, ath79_mac_base
, 0);
227 ath79_eth1_data
.phy_if_mode
= PHY_INTERFACE_MODE_GMII
;
228 ath79_register_eth(1);
234 MIPS_MACHINE(ATH79_MACH_RB_SXTLITE2ND
, "sxt2n", "MikroTik RouterBOARD SXT Lite2",
237 MIPS_MACHINE(ATH79_MACH_RB_SXTLITE5ND
, "sxt5n", "MikroTik RouterBOARD SXT Lite5",