2 * Atheros AR724x PCI host controller driver
4 * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
6 * Parts of this file are based on Atheros' 2.6.15 BSP
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
13 #include <linux/resource.h>
14 #include <linux/types.h>
15 #include <linux/delay.h>
16 #include <linux/bitops.h>
17 #include <linux/pci.h>
18 #include <linux/pci_regs.h>
19 #include <linux/interrupt.h>
21 #include <asm/mach-ar71xx/ar71xx.h>
22 #include <asm/mach-ar71xx/pci.h>
26 #define DBG(fmt, args...) printk(KERN_INFO fmt, ## args)
28 #define DBG(fmt, args...)
31 static void __iomem
*ar724x_pci_localcfg_base
;
32 static void __iomem
*ar724x_pci_devcfg_base
;
33 static int ar724x_pci_fixup_enable
;
35 static DEFINE_SPINLOCK(ar724x_pci_lock
);
37 static inline void ar724x_pci_wr(unsigned reg
, u32 val
)
41 base
= ioremap_nocache(AR724X_PCI_CTRL_BASE
, AR724X_PCI_CTRL_SIZE
);
42 __raw_writel(val
, base
+ reg
);
43 (void) __raw_readl(base
+ reg
);
47 static inline void ar724x_pci_wr_nf(unsigned reg
, u32 val
)
51 base
= ioremap_nocache(AR724X_PCI_CTRL_BASE
, AR724X_PCI_CTRL_SIZE
);
52 __raw_writel(val
, base
+ reg
);
56 static inline u32
ar724x_pci_rr(unsigned reg
)
61 base
= ioremap_nocache(AR724X_PCI_CTRL_BASE
, AR724X_PCI_CTRL_SIZE
);
62 ret
= __raw_readl(base
+ reg
);
67 static void ar724x_pci_read(void __iomem
*base
, int where
, int size
, u32
*value
)
72 spin_lock_irqsave(&ar724x_pci_lock
, flags
);
73 data
= __raw_readl(base
+ (where
& ~3));
91 spin_unlock_irqrestore(&ar724x_pci_lock
, flags
);
94 static void ar724x_pci_write(void __iomem
*base
, int where
, int size
, u32 value
)
100 spin_lock_irqsave(&ar724x_pci_lock
, flags
);
101 data
= __raw_readl(base
+ (where
& ~3));
105 s
= ((where
& 3) << 3);
106 data
&= ~(0xFF << s
);
107 data
|= ((value
& 0xFF) << s
);
110 s
= ((where
& 2) << 3);
111 data
&= ~(0xFFFF << s
);
112 data
|= ((value
& 0xFFFF) << s
);
119 __raw_writel(data
, base
+ (where
& ~3));
121 (void)__raw_readl(base
+ (where
& ~3));
122 spin_unlock_irqrestore(&ar724x_pci_lock
, flags
);
125 static int ar724x_pci_read_config(struct pci_bus
*bus
, unsigned int devfn
,
126 int where
, int size
, u32
*value
)
129 if (bus
->number
!= 0 || devfn
!= 0)
130 return PCIBIOS_DEVICE_NOT_FOUND
;
132 ar724x_pci_read(ar724x_pci_devcfg_base
, where
, size
, value
);
134 DBG("PCI: read config: %02x:%02x.%01x/%02x:%01d, value=%08x\n",
135 bus
->number
, PCI_SLOT(devfn
), PCI_FUNC(devfn
),
136 where
, size
, *value
);
139 * WAR for BAR issue - We are unable to access the PCI device space
140 * if we set the BAR with proper base address
142 if ((where
== 0x10) && (size
== 4))
143 ar724x_pci_write(ar724x_pci_devcfg_base
, where
, size
, 0xffff);
145 return PCIBIOS_SUCCESSFUL
;
148 static int ar724x_pci_write_config(struct pci_bus
*bus
, unsigned int devfn
,
149 int where
, int size
, u32 value
)
151 if (bus
->number
!= 0 || devfn
!= 0)
152 return PCIBIOS_DEVICE_NOT_FOUND
;
154 DBG("PCI: write config: %02x:%02x.%01x/%02x:%01d, value=%08x\n",
155 bus
->number
, PCI_SLOT(devfn
), PCI_FUNC(devfn
),
158 ar724x_pci_write(ar724x_pci_devcfg_base
, where
, size
, value
);
160 return PCIBIOS_SUCCESSFUL
;
163 static void ar724x_pci_fixup(struct pci_dev
*dev
)
167 if (!ar724x_pci_fixup_enable
)
170 if (dev
->bus
->number
!= 0 || dev
->devfn
!= 0)
173 /* setup COMMAND register */
174 pci_read_config_word(dev
, PCI_COMMAND
, &cmd
);
175 cmd
|= PCI_COMMAND_MEMORY
| PCI_COMMAND_MASTER
|
176 PCI_COMMAND_INVALIDATE
| PCI_COMMAND_PARITY
| PCI_COMMAND_SERR
|
177 PCI_COMMAND_FAST_BACK
;
179 pci_write_config_word(dev
, PCI_COMMAND
, cmd
);
181 DECLARE_PCI_FIXUP_EARLY(PCI_ANY_ID
, PCI_ANY_ID
, ar724x_pci_fixup
);
183 int __init
ar724x_pcibios_map_irq(const struct pci_dev
*dev
, uint8_t slot
,
189 for (i
= 0; i
< ar71xx_pci_nr_irqs
; i
++) {
190 struct ar71xx_pci_irq
*entry
;
191 entry
= &ar71xx_pci_irq_map
[i
];
193 if (entry
->slot
== slot
&& entry
->pin
== pin
) {
200 printk(KERN_ALERT
"PCI: no irq found for pin%u@%s\n",
201 pin
, pci_name((struct pci_dev
*)dev
));
203 printk(KERN_INFO
"PCI: mapping irq %d to pin%u@%s\n",
204 irq
, pin
, pci_name((struct pci_dev
*)dev
));
209 static struct pci_ops ar724x_pci_ops
= {
210 .read
= ar724x_pci_read_config
,
211 .write
= ar724x_pci_write_config
,
214 static struct resource ar724x_pci_io_resource
= {
215 .name
= "PCI IO space",
218 .flags
= IORESOURCE_IO
,
221 static struct resource ar724x_pci_mem_resource
= {
222 .name
= "PCI memory space",
223 .start
= AR71XX_PCI_MEM_BASE
,
224 .end
= AR71XX_PCI_MEM_BASE
+ AR71XX_PCI_MEM_SIZE
- 1,
225 .flags
= IORESOURCE_MEM
228 static struct pci_controller ar724x_pci_controller
= {
229 .pci_ops
= &ar724x_pci_ops
,
230 .mem_resource
= &ar724x_pci_mem_resource
,
231 .io_resource
= &ar724x_pci_io_resource
,
234 static void __init
ar724x_pci_reset(void)
236 ar71xx_device_stop(AR724X_RESET_PCIE
);
237 ar71xx_device_stop(AR724X_RESET_PCIE_PHY
);
238 ar71xx_device_stop(AR724X_RESET_PCIE_PHY_SERIAL
);
241 ar71xx_device_start(AR724X_RESET_PCIE_PHY_SERIAL
);
243 ar71xx_device_start(AR724X_RESET_PCIE_PHY
);
244 ar71xx_device_start(AR724X_RESET_PCIE
);
247 static int __init
ar724x_pci_setup(void)
251 /* setup COMMAND register */
252 t
= PCI_COMMAND_MEMORY
| PCI_COMMAND_MASTER
| PCI_COMMAND_INVALIDATE
|
253 PCI_COMMAND_PARITY
|PCI_COMMAND_SERR
|PCI_COMMAND_FAST_BACK
;
255 ar724x_pci_write(ar724x_pci_localcfg_base
, PCI_COMMAND
, 4, t
);
256 ar724x_pci_write(ar724x_pci_localcfg_base
, 0x20, 4, 0x1ff01000);
257 ar724x_pci_write(ar724x_pci_localcfg_base
, 0x24, 4, 0x1ff01000);
259 t
= ar724x_pci_rr(AR724X_PCI_REG_RESET
);
262 ar724x_pci_wr_nf(AR724X_PCI_REG_RESET
, 0);
264 ar724x_pci_wr_nf(AR724X_PCI_REG_RESET
, 4);
268 ar724x_pci_wr(AR724X_PCI_REG_APP
, AR724X_PCI_APP_LTSSM_ENABLE
);
271 t
= ar724x_pci_rr(AR724X_PCI_REG_APP
);
272 if ((t
& AR724X_PCI_APP_LTSSM_ENABLE
) == 0x0) {
273 printk(KERN_WARNING
"PCI: no PCIe module found\n");
280 static void ar724x_pci_irq_handler(unsigned int irq
, struct irq_desc
*desc
)
284 pending
= ar724x_pci_rr(AR724X_PCI_REG_INT_STATUS
) &
285 ar724x_pci_rr(AR724X_PCI_REG_INT_MASK
);
287 if (pending
& AR724X_PCI_INT_DEV0
)
288 generic_handle_irq(AR71XX_PCI_IRQ_DEV0
);
291 spurious_interrupt();
294 static void ar724x_pci_irq_unmask(unsigned int irq
)
297 case AR71XX_PCI_IRQ_DEV0
:
298 irq
-= AR71XX_PCI_IRQ_BASE
;
299 ar724x_pci_wr(AR724X_PCI_REG_INT_MASK
,
300 ar724x_pci_rr(AR724X_PCI_REG_INT_MASK
) |
301 AR724X_PCI_INT_DEV0
);
303 ar724x_pci_rr(AR724X_PCI_REG_INT_MASK
);
307 static void ar724x_pci_irq_mask(unsigned int irq
)
310 case AR71XX_PCI_IRQ_DEV0
:
311 irq
-= AR71XX_PCI_IRQ_BASE
;
312 ar724x_pci_wr(AR724X_PCI_REG_INT_MASK
,
313 ar724x_pci_rr(AR724X_PCI_REG_INT_MASK
) &
314 ~AR724X_PCI_INT_DEV0
);
316 ar724x_pci_rr(AR724X_PCI_REG_INT_MASK
);
318 ar724x_pci_wr(AR724X_PCI_REG_INT_STATUS
,
319 ar724x_pci_rr(AR724X_PCI_REG_INT_STATUS
) |
320 AR724X_PCI_INT_DEV0
);
322 ar724x_pci_rr(AR724X_PCI_REG_INT_STATUS
);
326 static struct irq_chip ar724x_pci_irq_chip
= {
327 .name
= "AR724X PCI ",
328 .mask
= ar724x_pci_irq_mask
,
329 .unmask
= ar724x_pci_irq_unmask
,
330 .mask_ack
= ar724x_pci_irq_mask
,
333 static void __init
ar724x_pci_irq_init(void)
338 t
= ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE
);
339 if (t
& (AR724X_RESET_PCIE
| AR724X_RESET_PCIE_PHY
|
340 AR724X_RESET_PCIE_PHY_SERIAL
)) {
344 ar724x_pci_wr(AR724X_PCI_REG_INT_MASK
, 0);
345 ar724x_pci_wr(AR724X_PCI_REG_INT_STATUS
, 0);
347 for (i
= AR71XX_PCI_IRQ_BASE
;
348 i
< AR71XX_PCI_IRQ_BASE
+ AR71XX_PCI_IRQ_COUNT
; i
++) {
349 irq_desc
[i
].status
= IRQ_DISABLED
;
350 set_irq_chip_and_handler(i
, &ar724x_pci_irq_chip
,
354 set_irq_chained_handler(AR71XX_CPU_IRQ_IP2
, ar724x_pci_irq_handler
);
357 int __init
ar724x_pcibios_init(void)
361 ar724x_pci_localcfg_base
= ioremap_nocache(AR724X_PCI_CRP_BASE
,
362 AR724X_PCI_CRP_SIZE
);
363 if (ar724x_pci_localcfg_base
== NULL
)
366 ar724x_pci_devcfg_base
= ioremap_nocache(AR724X_PCI_CFG_BASE
,
367 AR724X_PCI_CFG_SIZE
);
368 if (ar724x_pci_devcfg_base
== NULL
)
369 goto err_unmap_localcfg
;
372 ret
= ar724x_pci_setup();
374 goto err_unmap_devcfg
;
376 ar724x_pci_fixup_enable
= 1;
377 ar724x_pci_irq_init();
378 register_pci_controller(&ar724x_pci_controller
);
383 iounmap(ar724x_pci_devcfg_base
);
385 iounmap(ar724x_pci_localcfg_base
);