2 * NAND flash driver for the MikroTik RouterBOARD 91x series
4 * Copyright (C) 2013-2014 Gabor Juhos <juhosg@openwrt.org>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
11 #include <linux/kernel.h>
12 #include <linux/spinlock.h>
13 #include <linux/module.h>
14 #include <linux/mtd/nand.h>
15 #include <linux/mtd/mtd.h>
16 #include <linux/mtd/partitions.h>
17 #include <linux/platform_device.h>
19 #include <linux/slab.h>
20 #include <linux/gpio.h>
21 #include <linux/platform_data/rb91x_nand.h>
23 #include <asm/mach-ath79/ar71xx_regs.h>
24 #include <asm/mach-ath79/ath79.h>
26 #define DRV_DESC "NAND flash driver for the RouterBOARD 91x series"
28 #define RB91X_NAND_NRWE BIT(12)
30 #define RB91X_NAND_DATA_BITS (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) |\
31 BIT(13) | BIT(14) | BIT(15))
33 #define RB91X_NAND_INPUT_BITS (RB91X_NAND_DATA_BITS | RB91X_NAND_RDY)
34 #define RB91X_NAND_OUTPUT_BITS (RB91X_NAND_DATA_BITS | RB91X_NAND_NRWE)
36 #define RB91X_NAND_LOW_DATA_MASK 0x1f
37 #define RB91X_NAND_HIGH_DATA_MASK 0xe0
38 #define RB91X_NAND_HIGH_DATA_SHIFT 8
40 struct rb91x_nand_info
{
41 struct nand_chip chip
;
54 static inline struct rb91x_nand_info
*mtd_to_rbinfo(struct mtd_info
*mtd
)
56 return container_of(mtd
, struct rb91x_nand_info
, mtd
);
60 * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader
61 * will not be able to find the kernel that we load.
63 static struct nand_ecclayout rb91x_nand_ecclayout
= {
65 .eccpos
= { 8, 9, 10, 13, 14, 15 },
67 .oobfree
= { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
70 static struct mtd_partition rb91x_nand_partitions
[] = {
75 .mask_flags
= MTD_WRITEABLE
,
78 .offset
= (256 * 1024),
79 .size
= (4 * 1024 * 1024) - (256 * 1024),
82 .offset
= MTDPART_OFS_NXTBLK
,
83 .size
= MTDPART_SIZ_FULL
,
87 static void rb91x_nand_write(struct rb91x_nand_info
*rbni
,
91 void __iomem
*base
= ath79_gpio_base
;
97 /* enable the latch */
98 gpio_set_value_cansleep(rbni
->gpio_nle
, 0);
100 oe_reg
= __raw_readl(base
+ AR71XX_GPIO_REG_OE
);
101 out_reg
= __raw_readl(base
+ AR71XX_GPIO_REG_OUT
);
103 /* set data lines to output mode */
104 __raw_writel(oe_reg
& ~(RB91X_NAND_DATA_BITS
| RB91X_NAND_NRWE
),
105 base
+ AR71XX_GPIO_REG_OE
);
107 out
= out_reg
& ~(RB91X_NAND_DATA_BITS
| RB91X_NAND_NRWE
);
108 for (i
= 0; i
!= len
; i
++) {
111 data
= (buf
[i
] & RB91X_NAND_HIGH_DATA_MASK
) <<
112 RB91X_NAND_HIGH_DATA_SHIFT
;
113 data
|= buf
[i
] & RB91X_NAND_LOW_DATA_MASK
;
115 __raw_writel(data
, base
+ AR71XX_GPIO_REG_OUT
);
117 /* deactivate WE line */
118 data
|= RB91X_NAND_NRWE
;
119 __raw_writel(data
, base
+ AR71XX_GPIO_REG_OUT
);
121 __raw_readl(base
+ AR71XX_GPIO_REG_OUT
);
124 /* restore registers */
125 __raw_writel(out_reg
, base
+ AR71XX_GPIO_REG_OUT
);
126 __raw_writel(oe_reg
, base
+ AR71XX_GPIO_REG_OE
);
128 __raw_readl(base
+ AR71XX_GPIO_REG_OUT
);
130 /* disable the latch */
131 gpio_set_value_cansleep(rbni
->gpio_nle
, 1);
134 static void rb91x_nand_read(struct rb91x_nand_info
*rbni
,
138 void __iomem
*base
= ath79_gpio_base
;
143 /* enable read mode */
144 gpio_set_value_cansleep(rbni
->gpio_read
, 1);
147 gpio_set_value_cansleep(rbni
->gpio_nle
, 0);
150 oe_reg
= __raw_readl(base
+ AR71XX_GPIO_REG_OE
);
151 out_reg
= __raw_readl(base
+ AR71XX_GPIO_REG_OUT
);
153 /* set data lines to input mode */
154 __raw_writel(oe_reg
| RB91X_NAND_DATA_BITS
,
155 base
+ AR71XX_GPIO_REG_OE
);
157 for (i
= 0; i
< len
; i
++) {
161 /* activate RE line */
162 __raw_writel(RB91X_NAND_NRWE
, base
+ AR71XX_GPIO_REG_CLEAR
);
164 __raw_readl(base
+ AR71XX_GPIO_REG_CLEAR
);
166 /* read input lines */
167 in
= __raw_readl(base
+ AR71XX_GPIO_REG_IN
);
169 /* deactivate RE line */
170 __raw_writel(RB91X_NAND_NRWE
, base
+ AR71XX_GPIO_REG_SET
);
172 data
= (in
& RB91X_NAND_LOW_DATA_MASK
);
173 data
|= (in
>> RB91X_NAND_HIGH_DATA_SHIFT
) &
174 RB91X_NAND_HIGH_DATA_MASK
;
179 /* restore registers */
180 __raw_writel(out_reg
, base
+ AR71XX_GPIO_REG_OUT
);
181 __raw_writel(oe_reg
, base
+ AR71XX_GPIO_REG_OE
);
183 __raw_readl(base
+ AR71XX_GPIO_REG_OUT
);
186 gpio_set_value_cansleep(rbni
->gpio_nle
, 1);
188 /* disable read mode */
189 gpio_set_value_cansleep(rbni
->gpio_read
, 0);
192 static int rb91x_nand_dev_ready(struct mtd_info
*mtd
)
194 struct rb91x_nand_info
*rbni
= mtd_to_rbinfo(mtd
);
196 return gpio_get_value_cansleep(rbni
->gpio_rdy
);
199 static void rb91x_nand_cmd_ctrl(struct mtd_info
*mtd
, int cmd
,
202 struct rb91x_nand_info
*rbni
= mtd_to_rbinfo(mtd
);
204 if (ctrl
& NAND_CTRL_CHANGE
) {
205 gpio_set_value_cansleep(rbni
->gpio_cle
,
206 (ctrl
& NAND_CLE
) ? 1 : 0);
207 gpio_set_value_cansleep(rbni
->gpio_ale
,
208 (ctrl
& NAND_ALE
) ? 1 : 0);
209 gpio_set_value_cansleep(rbni
->gpio_nce
,
210 (ctrl
& NAND_NCE
) ? 0 : 1);
213 if (cmd
!= NAND_CMD_NONE
) {
216 rb91x_nand_write(rbni
, &t
, 1);
220 static u8
rb91x_nand_read_byte(struct mtd_info
*mtd
)
222 struct rb91x_nand_info
*rbni
= mtd_to_rbinfo(mtd
);
225 rb91x_nand_read(rbni
, &data
, 1);
230 static void rb91x_nand_read_buf(struct mtd_info
*mtd
, u8
*buf
, int len
)
232 struct rb91x_nand_info
*rbni
= mtd_to_rbinfo(mtd
);
234 rb91x_nand_read(rbni
, buf
, len
);
237 static void rb91x_nand_write_buf(struct mtd_info
*mtd
, const u8
*buf
, int len
)
239 struct rb91x_nand_info
*rbni
= mtd_to_rbinfo(mtd
);
241 rb91x_nand_write(rbni
, buf
, len
);
244 static int rb91x_nand_gpio_init(struct rb91x_nand_info
*info
)
249 * Ensure that the LATCH is disabled before initializing
252 ret
= devm_gpio_request_one(info
->dev
, info
->gpio_nle
,
253 GPIOF_OUT_INIT_HIGH
, "LATCH enable");
257 ret
= devm_gpio_request_one(info
->dev
, info
->gpio_nce
,
258 GPIOF_OUT_INIT_HIGH
, "NAND nCE");
262 ret
= devm_gpio_request_one(info
->dev
, info
->gpio_nrw
,
263 GPIOF_OUT_INIT_HIGH
, "NAND nRW");
267 ret
= devm_gpio_request_one(info
->dev
, info
->gpio_cle
,
268 GPIOF_OUT_INIT_LOW
, "NAND CLE");
272 ret
= devm_gpio_request_one(info
->dev
, info
->gpio_ale
,
273 GPIOF_OUT_INIT_LOW
, "NAND ALE");
277 ret
= devm_gpio_request_one(info
->dev
, info
->gpio_read
,
278 GPIOF_OUT_INIT_LOW
, "NAND READ");
282 ret
= devm_gpio_request_one(info
->dev
, info
->gpio_rdy
,
283 GPIOF_IN
, "NAND RDY");
287 static int rb91x_nand_probe(struct platform_device
*pdev
)
289 struct rb91x_nand_info
*rbni
;
290 struct rb91x_nand_platform_data
*pdata
;
293 pr_info(DRV_DESC
"\n");
295 pdata
= dev_get_platdata(&pdev
->dev
);
299 rbni
= devm_kzalloc(&pdev
->dev
, sizeof(*rbni
), GFP_KERNEL
);
303 rbni
->dev
= &pdev
->dev
;
304 rbni
->gpio_nce
= pdata
->gpio_nce
;
305 rbni
->gpio_ale
= pdata
->gpio_ale
;
306 rbni
->gpio_cle
= pdata
->gpio_cle
;
307 rbni
->gpio_read
= pdata
->gpio_read
;
308 rbni
->gpio_nrw
= pdata
->gpio_nrw
;
309 rbni
->gpio_rdy
= pdata
->gpio_rdy
;
310 rbni
->gpio_nle
= pdata
->gpio_nle
;
312 rbni
->chip
.priv
= &rbni
;
313 rbni
->mtd
.priv
= &rbni
->chip
;
314 rbni
->mtd
.owner
= THIS_MODULE
;
316 rbni
->chip
.cmd_ctrl
= rb91x_nand_cmd_ctrl
;
317 rbni
->chip
.dev_ready
= rb91x_nand_dev_ready
;
318 rbni
->chip
.read_byte
= rb91x_nand_read_byte
;
319 rbni
->chip
.write_buf
= rb91x_nand_write_buf
;
320 rbni
->chip
.read_buf
= rb91x_nand_read_buf
;
322 rbni
->chip
.chip_delay
= 25;
323 rbni
->chip
.ecc
.mode
= NAND_ECC_SOFT
;
325 platform_set_drvdata(pdev
, rbni
);
327 ret
= rb91x_nand_gpio_init(rbni
);
331 ret
= nand_scan_ident(&rbni
->mtd
, 1, NULL
);
335 if (rbni
->mtd
.writesize
== 512)
336 rbni
->chip
.ecc
.layout
= &rb91x_nand_ecclayout
;
338 ret
= nand_scan_tail(&rbni
->mtd
);
342 ret
= mtd_device_register(&rbni
->mtd
, rb91x_nand_partitions
,
343 ARRAY_SIZE(rb91x_nand_partitions
));
345 goto err_release_nand
;
350 nand_release(&rbni
->mtd
);
354 static int rb91x_nand_remove(struct platform_device
*pdev
)
356 struct rb91x_nand_info
*info
= platform_get_drvdata(pdev
);
358 nand_release(&info
->mtd
);
363 static struct platform_driver rb91x_nand_driver
= {
364 .probe
= rb91x_nand_probe
,
365 .remove
= rb91x_nand_remove
,
367 .name
= RB91X_NAND_DRIVER_NAME
,
368 .owner
= THIS_MODULE
,
372 module_platform_driver(rb91x_nand_driver
);
374 MODULE_DESCRIPTION(DRV_DESC
);
375 MODULE_VERSION(DRV_VERSION
);
376 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
377 MODULE_LICENSE("GPL v2");