2 * Atheros AR71xx built-in ethernet mac driver
4 * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
7 * Based on Atheros' AG7100 driver
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
16 #define AG71XX_MDIO_RETRY 1000
17 #define AG71XX_MDIO_DELAY 5
19 static inline void ag71xx_mdio_wr(struct ag71xx_mdio
*am
, unsigned reg
,
24 r
= am
->mdio_base
+ reg
;
25 __raw_writel(value
, r
);
28 (void) __raw_readl(r
);
31 static inline u32
ag71xx_mdio_rr(struct ag71xx_mdio
*am
, unsigned reg
)
33 return __raw_readl(am
->mdio_base
+ reg
);
36 static void ag71xx_mdio_dump_regs(struct ag71xx_mdio
*am
)
38 DBG("%s: mii_cfg=%08x, mii_cmd=%08x, mii_addr=%08x\n",
40 ag71xx_mdio_rr(am
, AG71XX_REG_MII_CFG
),
41 ag71xx_mdio_rr(am
, AG71XX_REG_MII_CMD
),
42 ag71xx_mdio_rr(am
, AG71XX_REG_MII_ADDR
));
43 DBG("%s: mii_ctrl=%08x, mii_status=%08x, mii_ind=%08x\n",
45 ag71xx_mdio_rr(am
, AG71XX_REG_MII_CTRL
),
46 ag71xx_mdio_rr(am
, AG71XX_REG_MII_STATUS
),
47 ag71xx_mdio_rr(am
, AG71XX_REG_MII_IND
));
50 int ag71xx_mdio_mii_read(struct ag71xx_mdio
*am
, int addr
, int reg
)
55 ag71xx_mdio_wr(am
, AG71XX_REG_MII_CMD
, MII_CMD_WRITE
);
56 ag71xx_mdio_wr(am
, AG71XX_REG_MII_ADDR
,
57 ((addr
& 0xff) << MII_ADDR_SHIFT
) | (reg
& 0xff));
58 ag71xx_mdio_wr(am
, AG71XX_REG_MII_CMD
, MII_CMD_READ
);
60 i
= AG71XX_MDIO_RETRY
;
61 while (ag71xx_mdio_rr(am
, AG71XX_REG_MII_IND
) & MII_IND_BUSY
) {
63 pr_err("%s: mii_read timed out\n", am
->mii_bus
->name
);
67 udelay(AG71XX_MDIO_DELAY
);
70 ret
= ag71xx_mdio_rr(am
, AG71XX_REG_MII_STATUS
) & 0xffff;
71 ag71xx_mdio_wr(am
, AG71XX_REG_MII_CMD
, MII_CMD_WRITE
);
73 DBG("mii_read: addr=%04x, reg=%04x, value=%04x\n", addr
, reg
, ret
);
79 void ag71xx_mdio_mii_write(struct ag71xx_mdio
*am
, int addr
, int reg
, u16 val
)
83 DBG("mii_write: addr=%04x, reg=%04x, value=%04x\n", addr
, reg
, val
);
85 ag71xx_mdio_wr(am
, AG71XX_REG_MII_ADDR
,
86 ((addr
& 0xff) << MII_ADDR_SHIFT
) | (reg
& 0xff));
87 ag71xx_mdio_wr(am
, AG71XX_REG_MII_CTRL
, val
);
89 i
= AG71XX_MDIO_RETRY
;
90 while (ag71xx_mdio_rr(am
, AG71XX_REG_MII_IND
) & MII_IND_BUSY
) {
92 pr_err("%s: mii_write timed out\n", am
->mii_bus
->name
);
95 udelay(AG71XX_MDIO_DELAY
);
99 static int ag71xx_mdio_reset(struct mii_bus
*bus
)
101 struct ag71xx_mdio
*am
= bus
->priv
;
104 if (am
->pdata
->is_ar7240
)
105 t
= MII_CFG_CLK_DIV_6
;
106 else if (am
->pdata
->is_ar9330
)
107 t
= MII_CFG_CLK_DIV_98
;
108 else if (am
->pdata
->builtin_switch
&& !am
->pdata
->is_ar934x
)
109 t
= MII_CFG_CLK_DIV_10
;
110 else if (!am
->pdata
->builtin_switch
&& am
->pdata
->is_ar934x
)
111 t
= MII_CFG_CLK_DIV_58
;
113 t
= MII_CFG_CLK_DIV_28
;
115 ag71xx_mdio_wr(am
, AG71XX_REG_MII_CFG
, t
| MII_CFG_RESET
);
118 ag71xx_mdio_wr(am
, AG71XX_REG_MII_CFG
, t
);
124 static int ag71xx_mdio_read(struct mii_bus
*bus
, int addr
, int reg
)
126 struct ag71xx_mdio
*am
= bus
->priv
;
128 if (am
->pdata
->builtin_switch
)
129 return ar7240sw_phy_read(bus
, addr
, reg
);
131 return ag71xx_mdio_mii_read(am
, addr
, reg
);
134 static int ag71xx_mdio_write(struct mii_bus
*bus
, int addr
, int reg
, u16 val
)
136 struct ag71xx_mdio
*am
= bus
->priv
;
138 if (am
->pdata
->builtin_switch
)
139 ar7240sw_phy_write(bus
, addr
, reg
, val
);
141 ag71xx_mdio_mii_write(am
, addr
, reg
, val
);
145 static int __devinit
ag71xx_mdio_probe(struct platform_device
*pdev
)
147 struct ag71xx_mdio_platform_data
*pdata
;
148 struct ag71xx_mdio
*am
;
149 struct resource
*res
;
153 pdata
= pdev
->dev
.platform_data
;
155 dev_err(&pdev
->dev
, "no platform data specified\n");
159 am
= kzalloc(sizeof(*am
), GFP_KERNEL
);
167 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
169 dev_err(&pdev
->dev
, "no iomem resource found\n");
174 am
->mdio_base
= ioremap_nocache(res
->start
, res
->end
- res
->start
+ 1);
175 if (!am
->mdio_base
) {
176 dev_err(&pdev
->dev
, "unable to ioremap registers\n");
181 am
->mii_bus
= mdiobus_alloc();
182 if (am
->mii_bus
== NULL
) {
187 am
->mii_bus
->name
= "ag71xx_mdio";
188 am
->mii_bus
->read
= ag71xx_mdio_read
;
189 am
->mii_bus
->write
= ag71xx_mdio_write
;
190 am
->mii_bus
->reset
= ag71xx_mdio_reset
;
191 am
->mii_bus
->irq
= am
->mii_irq
;
192 am
->mii_bus
->priv
= am
;
193 am
->mii_bus
->parent
= &pdev
->dev
;
194 snprintf(am
->mii_bus
->id
, MII_BUS_ID_SIZE
, "%s", dev_name(&pdev
->dev
));
195 am
->mii_bus
->phy_mask
= pdata
->phy_mask
;
197 for (i
= 0; i
< PHY_MAX_ADDR
; i
++)
198 am
->mii_irq
[i
] = PHY_POLL
;
200 ag71xx_mdio_wr(am
, AG71XX_REG_MAC_CFG1
, 0);
202 err
= mdiobus_register(am
->mii_bus
);
206 ag71xx_mdio_dump_regs(am
);
208 platform_set_drvdata(pdev
, am
);
212 mdiobus_free(am
->mii_bus
);
214 iounmap(am
->mdio_base
);
221 static int __devexit
ag71xx_mdio_remove(struct platform_device
*pdev
)
223 struct ag71xx_mdio
*am
= platform_get_drvdata(pdev
);
226 mdiobus_unregister(am
->mii_bus
);
227 mdiobus_free(am
->mii_bus
);
228 iounmap(am
->mdio_base
);
230 platform_set_drvdata(pdev
, NULL
);
236 static struct platform_driver ag71xx_mdio_driver
= {
237 .probe
= ag71xx_mdio_probe
,
238 .remove
= __exit_p(ag71xx_mdio_remove
),
240 .name
= "ag71xx-mdio",
244 int __init
ag71xx_mdio_driver_init(void)
246 return platform_driver_register(&ag71xx_mdio_driver
);
249 void ag71xx_mdio_driver_exit(void)
251 platform_driver_unregister(&ag71xx_mdio_driver
);