2 * Atheros AR71xx built-in ethernet mac driver
4 * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
7 * Based on Atheros' AG7100 driver
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
16 #define AG71XX_MDIO_RETRY 1000
17 #define AG71XX_MDIO_DELAY 5
19 static inline void ag71xx_mdio_wr(struct ag71xx_mdio
*am
, unsigned reg
,
24 r
= am
->mdio_base
+ reg
;
25 __raw_writel(value
, r
);
28 (void) __raw_readl(r
);
31 static inline u32
ag71xx_mdio_rr(struct ag71xx_mdio
*am
, unsigned reg
)
33 return __raw_readl(am
->mdio_base
+ reg
);
36 static void ag71xx_mdio_dump_regs(struct ag71xx_mdio
*am
)
38 DBG("%s: mii_cfg=%08x, mii_cmd=%08x, mii_addr=%08x\n",
40 ag71xx_mdio_rr(am
, AG71XX_REG_MII_CFG
),
41 ag71xx_mdio_rr(am
, AG71XX_REG_MII_CMD
),
42 ag71xx_mdio_rr(am
, AG71XX_REG_MII_ADDR
));
43 DBG("%s: mii_ctrl=%08x, mii_status=%08x, mii_ind=%08x\n",
45 ag71xx_mdio_rr(am
, AG71XX_REG_MII_CTRL
),
46 ag71xx_mdio_rr(am
, AG71XX_REG_MII_STATUS
),
47 ag71xx_mdio_rr(am
, AG71XX_REG_MII_IND
));
50 static int ag71xx_mdio_wait_busy(struct ag71xx_mdio
*am
)
54 for (i
= 0; i
< AG71XX_MDIO_RETRY
; i
++) {
57 udelay(AG71XX_MDIO_DELAY
);
59 busy
= ag71xx_mdio_rr(am
, AG71XX_REG_MII_IND
);
63 udelay(AG71XX_MDIO_DELAY
);
66 pr_err("%s: MDIO operation timed out\n", am
->mii_bus
->name
);
71 int ag71xx_mdio_mii_read(struct ag71xx_mdio
*am
, int addr
, int reg
)
76 err
= ag71xx_mdio_wait_busy(am
);
80 ag71xx_mdio_wr(am
, AG71XX_REG_MII_CMD
, MII_CMD_WRITE
);
81 ag71xx_mdio_wr(am
, AG71XX_REG_MII_ADDR
,
82 ((addr
& 0xff) << MII_ADDR_SHIFT
) | (reg
& 0xff));
83 ag71xx_mdio_wr(am
, AG71XX_REG_MII_CMD
, MII_CMD_READ
);
85 err
= ag71xx_mdio_wait_busy(am
);
89 ret
= ag71xx_mdio_rr(am
, AG71XX_REG_MII_STATUS
) & 0xffff;
90 ag71xx_mdio_wr(am
, AG71XX_REG_MII_CMD
, MII_CMD_WRITE
);
92 DBG("mii_read: addr=%04x, reg=%04x, value=%04x\n", addr
, reg
, ret
);
97 void ag71xx_mdio_mii_write(struct ag71xx_mdio
*am
, int addr
, int reg
, u16 val
)
99 DBG("mii_write: addr=%04x, reg=%04x, value=%04x\n", addr
, reg
, val
);
101 ag71xx_mdio_wr(am
, AG71XX_REG_MII_ADDR
,
102 ((addr
& 0xff) << MII_ADDR_SHIFT
) | (reg
& 0xff));
103 ag71xx_mdio_wr(am
, AG71XX_REG_MII_CTRL
, val
);
105 ag71xx_mdio_wait_busy(am
);
108 static int ag71xx_mdio_reset(struct mii_bus
*bus
)
110 struct ag71xx_mdio
*am
= bus
->priv
;
113 if (am
->pdata
->is_ar7240
)
114 t
= MII_CFG_CLK_DIV_6
;
115 else if (am
->pdata
->builtin_switch
&& !am
->pdata
->is_ar934x
)
116 t
= MII_CFG_CLK_DIV_10
;
117 else if (!am
->pdata
->builtin_switch
&& am
->pdata
->is_ar934x
)
118 t
= MII_CFG_CLK_DIV_58
;
120 t
= MII_CFG_CLK_DIV_28
;
122 ag71xx_mdio_wr(am
, AG71XX_REG_MII_CFG
, t
| MII_CFG_RESET
);
125 ag71xx_mdio_wr(am
, AG71XX_REG_MII_CFG
, t
);
131 static int ag71xx_mdio_read(struct mii_bus
*bus
, int addr
, int reg
)
133 struct ag71xx_mdio
*am
= bus
->priv
;
135 if (am
->pdata
->builtin_switch
)
136 return ar7240sw_phy_read(bus
, addr
, reg
);
138 return ag71xx_mdio_mii_read(am
, addr
, reg
);
141 static int ag71xx_mdio_write(struct mii_bus
*bus
, int addr
, int reg
, u16 val
)
143 struct ag71xx_mdio
*am
= bus
->priv
;
145 if (am
->pdata
->builtin_switch
)
146 ar7240sw_phy_write(bus
, addr
, reg
, val
);
148 ag71xx_mdio_mii_write(am
, addr
, reg
, val
);
152 static int __devinit
ag71xx_mdio_probe(struct platform_device
*pdev
)
154 struct ag71xx_mdio_platform_data
*pdata
;
155 struct ag71xx_mdio
*am
;
156 struct resource
*res
;
160 pdata
= pdev
->dev
.platform_data
;
162 dev_err(&pdev
->dev
, "no platform data specified\n");
166 am
= kzalloc(sizeof(*am
), GFP_KERNEL
);
174 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
176 dev_err(&pdev
->dev
, "no iomem resource found\n");
181 am
->mdio_base
= ioremap_nocache(res
->start
, res
->end
- res
->start
+ 1);
182 if (!am
->mdio_base
) {
183 dev_err(&pdev
->dev
, "unable to ioremap registers\n");
188 am
->mii_bus
= mdiobus_alloc();
189 if (am
->mii_bus
== NULL
) {
194 am
->mii_bus
->name
= "ag71xx_mdio";
195 am
->mii_bus
->read
= ag71xx_mdio_read
;
196 am
->mii_bus
->write
= ag71xx_mdio_write
;
197 am
->mii_bus
->reset
= ag71xx_mdio_reset
;
198 am
->mii_bus
->irq
= am
->mii_irq
;
199 am
->mii_bus
->priv
= am
;
200 am
->mii_bus
->parent
= &pdev
->dev
;
201 snprintf(am
->mii_bus
->id
, MII_BUS_ID_SIZE
, "%s", dev_name(&pdev
->dev
));
202 am
->mii_bus
->phy_mask
= pdata
->phy_mask
;
204 for (i
= 0; i
< PHY_MAX_ADDR
; i
++)
205 am
->mii_irq
[i
] = PHY_POLL
;
207 ag71xx_mdio_wr(am
, AG71XX_REG_MAC_CFG1
, 0);
209 err
= mdiobus_register(am
->mii_bus
);
213 ag71xx_mdio_dump_regs(am
);
215 platform_set_drvdata(pdev
, am
);
219 mdiobus_free(am
->mii_bus
);
221 iounmap(am
->mdio_base
);
228 static int __devexit
ag71xx_mdio_remove(struct platform_device
*pdev
)
230 struct ag71xx_mdio
*am
= platform_get_drvdata(pdev
);
233 mdiobus_unregister(am
->mii_bus
);
234 mdiobus_free(am
->mii_bus
);
235 iounmap(am
->mdio_base
);
237 platform_set_drvdata(pdev
, NULL
);
243 static struct platform_driver ag71xx_mdio_driver
= {
244 .probe
= ag71xx_mdio_probe
,
245 .remove
= __exit_p(ag71xx_mdio_remove
),
247 .name
= "ag71xx-mdio",
251 int __init
ag71xx_mdio_driver_init(void)
253 return platform_driver_register(&ag71xx_mdio_driver
);
256 void ag71xx_mdio_driver_exit(void)
258 platform_driver_unregister(&ag71xx_mdio_driver
);