2 * Platform driver for the Realtek RTL8366 ethernet switch
4 * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2010 Antti Seppälä <a.seppala@gmail.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
16 #include <linux/delay.h>
17 #include <linux/gpio.h>
18 #include <linux/spinlock.h>
19 #include <linux/skbuff.h>
20 #include <linux/switch.h>
21 #include <linux/phy.h>
22 #include <linux/rtl8366_smi.h>
27 #include <linux/debugfs.h>
30 #define RTL8366_SMI_DRIVER_NAME "rtl8366-smi"
31 #define RTL8366_SMI_DRIVER_DESC "Realtek RTL8366 switch driver"
32 #define RTL8366_SMI_DRIVER_VER "0.1.1"
34 #define RTL8366S_PHY_NO_MAX 4
35 #define RTL8366S_PHY_PAGE_MAX 7
36 #define RTL8366S_PHY_ADDR_MAX 31
38 #define RTL8366_CHIP_GLOBAL_CTRL_REG 0x0000
39 #define RTL8366_CHIP_CTRL_VLAN (1 << 13)
41 #define RTL8366_RESET_CTRL_REG 0x0100
42 #define RTL8366_CHIP_CTRL_RESET_HW 1
43 #define RTL8366_CHIP_CTRL_RESET_SW (1 << 1)
45 #define RTL8366S_CHIP_VERSION_CTRL_REG 0x0104
46 #define RTL8366S_CHIP_VERSION_MASK 0xf
47 #define RTL8366S_CHIP_ID_REG 0x0105
48 #define RTL8366S_CHIP_ID_8366 0x8366
50 /* PHY registers control */
51 #define RTL8366S_PHY_ACCESS_CTRL_REG 0x8028
52 #define RTL8366S_PHY_ACCESS_DATA_REG 0x8029
54 #define RTL8366S_PHY_CTRL_READ 1
55 #define RTL8366S_PHY_CTRL_WRITE 0
57 #define RTL8366S_PHY_REG_MASK 0x1f
58 #define RTL8366S_PHY_PAGE_OFFSET 5
59 #define RTL8366S_PHY_PAGE_MASK (0x7 << 5)
60 #define RTL8366S_PHY_NO_OFFSET 9
61 #define RTL8366S_PHY_NO_MASK (0x1f << 9)
63 #define RTL8366_SMI_ACK_RETRY_COUNT 5
64 #define RTL8366_SMI_CLK_DELAY 10 /* nsec */
66 /* LED control registers */
67 #define RTL8366_LED_BLINKRATE_REG 0x0420
68 #define RTL8366_LED_BLINKRATE_BIT 0
69 #define RTL8366_LED_BLINKRATE_MASK 0x0007
71 #define RTL8366_LED_CTRL_REG 0x0421
72 #define RTL8366_LED_0_1_CTRL_REG 0x0422
73 #define RTL8366_LED_2_3_CTRL_REG 0x0423
75 #define RTL8366S_MIB_COUNT 33
76 #define RTL8366S_GLOBAL_MIB_COUNT 1
77 #define RTL8366S_MIB_COUNTER_PORT_OFFSET 0x0040
78 #define RTL8366S_MIB_COUNTER_BASE 0x1000
79 #define RTL8366S_MIB_CTRL_REG 0x11F0
80 #define RTL8366S_MIB_CTRL_USER_MASK 0x01FF
81 #define RTL8366S_MIB_CTRL_BUSY_MASK 0x0001
82 #define RTL8366S_MIB_CTRL_RESET_MASK 0x0002
84 #define RTL8366S_MIB_CTRL_GLOBAL_RESET_MASK 0x0004
85 #define RTL8366S_MIB_CTRL_PORT_RESET_BIT 0x0003
86 #define RTL8366S_MIB_CTRL_PORT_RESET_MASK 0x01FC
89 #define RTL8366S_PORT_VLAN_CTRL_BASE 0x0058
90 #define RTL8366S_VLAN_TABLE_READ_BASE 0x018B
91 #define RTL8366S_VLAN_TABLE_WRITE_BASE 0x0185
93 #define RTL8366S_VLAN_TB_CTRL_REG 0x010F
95 #define RTL8366S_TABLE_ACCESS_CTRL_REG 0x0180
96 #define RTL8366S_TABLE_VLAN_READ_CTRL 0x0E01
97 #define RTL8366S_TABLE_VLAN_WRITE_CTRL 0x0F01
99 #define RTL8366S_VLAN_MEMCONF_BASE 0x0016
102 #define RTL8366S_PORT_LINK_STATUS_BASE 0x0060
103 #define RTL8366S_PORT_STATUS_SPEED_MASK 0x0003
104 #define RTL8366S_PORT_STATUS_DUPLEX_MASK 0x0004
105 #define RTL8366S_PORT_STATUS_LINK_MASK 0x0010
106 #define RTL8366S_PORT_STATUS_TXPAUSE_MASK 0x0020
107 #define RTL8366S_PORT_STATUS_RXPAUSE_MASK 0x0040
108 #define RTL8366S_PORT_STATUS_AN_MASK 0x0080
111 #define RTL8366_PORT_NUM_CPU 5
112 #define RTL8366_NUM_PORTS 6
113 #define RTL8366_NUM_VLANS 16
114 #define RTL8366_NUM_LEDGROUPS 4
115 #define RTL8366_NUM_VIDS 4096
116 #define RTL8366S_PRIORITYMAX 7
117 #define RTL8366S_FIDMAX 7
120 #define RTL8366_PORT_1 (1 << 0) /* In userspace port 0 */
121 #define RTL8366_PORT_2 (1 << 1) /* In userspace port 1 */
122 #define RTL8366_PORT_3 (1 << 2) /* In userspace port 2 */
123 #define RTL8366_PORT_4 (1 << 3) /* In userspace port 3 */
125 #define RTL8366_PORT_UNKNOWN (1 << 4) /* No known connection */
126 #define RTL8366_PORT_CPU (1 << 5) /* CPU port */
128 #define RTL8366_PORT_ALL (RTL8366_PORT_1 | \
132 RTL8366_PORT_UNKNOWN | \
135 #define RTL8366_PORT_ALL_BUT_CPU (RTL8366_PORT_1 | \
139 RTL8366_PORT_UNKNOWN)
141 #define RTL8366_PORT_ALL_EXTERNAL (RTL8366_PORT_1 | \
146 #define RTL8366_PORT_ALL_INTERNAL (RTL8366_PORT_UNKNOWN | \
149 struct rtl8366s_vlanconfig
{
160 struct rtl8366s_vlan4kentry
{
170 static const char *MIBCOUNTERS
[] = { "IfInOctets ",
172 "EtherStatsUnderSizePkts ",
174 "EtherStatsPkts64Octets ",
175 "EtherStatsPkts65to127Octets ",
176 "EtherStatsPkts128to255Octets ",
177 "EtherStatsPkts256to511Octets ",
178 "EtherStatsPkts512to1023Octets ",
179 "EtherStatsPkts1024to1518Octets ",
180 "EtherOversizeStats ",
181 "EtherStatsJabbers ",
183 "EtherStatsMulticastPkts ",
184 "EtherStatsBroadcastPkts ",
185 "EtherStatsDropEvents ",
186 "Dot3StatsFCSErrors ",
187 "Dot3StatsSymbolErrors ",
188 "Dot3InPauseFrames ",
189 "Dot3ControlInUnknownOpcodes ",
191 "Dot3StatsSingleCollisionFrames ",
192 "Dot3StatMultipleCollisionFrames ",
193 "Dot3sDeferredTransmissions ",
194 "Dot3StatsLateCollisions ",
195 "EtherStatsCollisions ",
196 "Dot3StatsExcessiveCollisions ",
197 "Dot3OutPauseFrames ",
198 "Dot1dBasePortDelayExceededDiscards",
199 "Dot1dTpPortInDiscards ",
201 "IfOutMulticastPkts ",
202 "IfOutBroadcastPkts ",
206 struct platform_device
*pdev
;
207 struct rtl8366_smi_platform_data
*pdata
;
209 struct mii_bus
*mii_bus
;
210 struct switch_dev dev
;
211 int mii_irq
[PHY_MAX_ADDR
];
214 struct dentry
*debugfs_root
;
222 #define to_rtl8366(_dev) container_of(_dev, struct rtl8366_smi, dev)
224 static inline void rtl8366_smi_clk_delay(struct rtl8366_smi
*smi
)
226 ndelay(RTL8366_SMI_CLK_DELAY
);
229 static void rtl8366_smi_start(struct rtl8366_smi
*smi
)
231 unsigned int sda
= smi
->pdata
->gpio_sda
;
232 unsigned int sck
= smi
->pdata
->gpio_sck
;
235 * Set GPIO pins to output mode, with initial state:
238 gpio_direction_output(sck
, 0);
239 gpio_direction_output(sda
, 1);
240 rtl8366_smi_clk_delay(smi
);
242 /* CLK 1: 0 -> 1, 1 -> 0 */
243 gpio_set_value(sck
, 1);
244 rtl8366_smi_clk_delay(smi
);
245 gpio_set_value(sck
, 0);
246 rtl8366_smi_clk_delay(smi
);
249 gpio_set_value(sck
, 1);
250 rtl8366_smi_clk_delay(smi
);
251 gpio_set_value(sda
, 0);
252 rtl8366_smi_clk_delay(smi
);
253 gpio_set_value(sck
, 0);
254 rtl8366_smi_clk_delay(smi
);
255 gpio_set_value(sda
, 1);
258 static void rtl8366_smi_stop(struct rtl8366_smi
*smi
)
260 unsigned int sda
= smi
->pdata
->gpio_sda
;
261 unsigned int sck
= smi
->pdata
->gpio_sck
;
263 rtl8366_smi_clk_delay(smi
);
264 gpio_set_value(sda
, 0);
265 gpio_set_value(sck
, 1);
266 rtl8366_smi_clk_delay(smi
);
267 gpio_set_value(sda
, 1);
268 rtl8366_smi_clk_delay(smi
);
269 gpio_set_value(sck
, 1);
270 rtl8366_smi_clk_delay(smi
);
271 gpio_set_value(sck
, 0);
272 rtl8366_smi_clk_delay(smi
);
273 gpio_set_value(sck
, 1);
276 rtl8366_smi_clk_delay(smi
);
277 gpio_set_value(sck
, 0);
278 rtl8366_smi_clk_delay(smi
);
279 gpio_set_value(sck
, 1);
281 /* set GPIO pins to input mode */
282 gpio_direction_input(sda
);
283 gpio_direction_input(sck
);
286 static void rtl8366_smi_write_bits(struct rtl8366_smi
*smi
, u32 data
, u32 len
)
288 unsigned int sda
= smi
->pdata
->gpio_sda
;
289 unsigned int sck
= smi
->pdata
->gpio_sck
;
291 for (; len
> 0; len
--) {
292 rtl8366_smi_clk_delay(smi
);
295 if ( data
& ( 1 << (len
- 1)) )
296 gpio_set_value(sda
, 1);
298 gpio_set_value(sda
, 0);
299 rtl8366_smi_clk_delay(smi
);
302 gpio_set_value(sck
, 1);
303 rtl8366_smi_clk_delay(smi
);
304 gpio_set_value(sck
, 0);
308 static void rtl8366_smi_read_bits(struct rtl8366_smi
*smi
, u32 len
, u32
*data
)
310 unsigned int sda
= smi
->pdata
->gpio_sda
;
311 unsigned int sck
= smi
->pdata
->gpio_sck
;
313 gpio_direction_input(sda
);
315 for (*data
= 0; len
> 0; len
--) {
318 rtl8366_smi_clk_delay(smi
);
321 gpio_set_value(sck
, 1);
322 rtl8366_smi_clk_delay(smi
);
323 u
= gpio_get_value(sda
);
324 gpio_set_value(sck
, 0);
326 *data
|= (u
<< (len
- 1));
329 gpio_direction_output(sda
, 0);
332 static int rtl8366_smi_wait_for_ack(struct rtl8366_smi
*smi
)
340 rtl8366_smi_read_bits(smi
, 1, &ack
);
344 if (++retry_cnt
> RTL8366_SMI_ACK_RETRY_COUNT
)
351 static int rtl8366_smi_write_byte(struct rtl8366_smi
*smi
, u8 data
)
353 rtl8366_smi_write_bits(smi
, data
, 8);
354 return rtl8366_smi_wait_for_ack(smi
);
357 static int rtl8366_smi_read_byte0(struct rtl8366_smi
*smi
, u8
*data
)
362 rtl8366_smi_read_bits(smi
, 8, &t
);
366 rtl8366_smi_write_bits(smi
, 0x00, 1);
371 static int rtl8366_smi_read_byte1(struct rtl8366_smi
*smi
, u8
*data
)
376 rtl8366_smi_read_bits(smi
, 8, &t
);
380 rtl8366_smi_write_bits(smi
, 0x01, 1);
385 static int rtl8366_smi_read_reg(struct rtl8366_smi
*smi
, u32 addr
, u32
*data
)
392 spin_lock_irqsave(&smi
->lock
, flags
);
394 rtl8366_smi_start(smi
);
396 /* send READ command */
397 ret
= rtl8366_smi_write_byte(smi
, 0x0a << 4 | 0x04 << 1 | 0x01);
402 ret
= rtl8366_smi_write_byte(smi
, addr
& 0xff);
407 ret
= rtl8366_smi_write_byte(smi
, addr
>> 8);
412 rtl8366_smi_read_byte0(smi
, &lo
);
413 /* read DATA[15:8] */
414 rtl8366_smi_read_byte1(smi
, &hi
);
416 *data
= ((u32
) lo
) | (((u32
) hi
) << 8);
421 rtl8366_smi_stop(smi
);
422 spin_unlock_irqrestore(&smi
->lock
, flags
);
427 static int rtl8366_smi_write_reg(struct rtl8366_smi
*smi
, u32 addr
, u32 data
)
432 spin_lock_irqsave(&smi
->lock
, flags
);
434 rtl8366_smi_start(smi
);
436 /* send WRITE command */
437 ret
= rtl8366_smi_write_byte(smi
, 0x0a << 4 | 0x04 << 1 | 0x00);
442 ret
= rtl8366_smi_write_byte(smi
, addr
& 0xff);
447 ret
= rtl8366_smi_write_byte(smi
, addr
>> 8);
451 /* write DATA[7:0] */
452 ret
= rtl8366_smi_write_byte(smi
, data
& 0xff);
456 /* write DATA[15:8] */
457 ret
= rtl8366_smi_write_byte(smi
, data
>> 8);
464 rtl8366_smi_stop(smi
);
465 spin_unlock_irqrestore(&smi
->lock
, flags
);
470 static int rtl8366_smi_read_phy_reg(struct rtl8366_smi
*smi
,
471 u32 phy_no
, u32 page
, u32 addr
, u32
*data
)
476 if (phy_no
> RTL8366S_PHY_NO_MAX
)
479 if (page
> RTL8366S_PHY_PAGE_MAX
)
482 if (addr
> RTL8366S_PHY_ADDR_MAX
)
485 ret
= rtl8366_smi_write_reg(smi
, RTL8366S_PHY_ACCESS_CTRL_REG
,
486 RTL8366S_PHY_CTRL_READ
);
490 reg
= 0x8000 | (1 << (phy_no
+ RTL8366S_PHY_NO_OFFSET
)) |
491 ((page
<< RTL8366S_PHY_PAGE_OFFSET
) & RTL8366S_PHY_PAGE_MASK
) |
492 (addr
& RTL8366S_PHY_REG_MASK
);
494 ret
= rtl8366_smi_write_reg(smi
, reg
, 0);
498 ret
= rtl8366_smi_read_reg(smi
, RTL8366S_PHY_ACCESS_DATA_REG
, data
);
505 static int rtl8366_smi_write_phy_reg(struct rtl8366_smi
*smi
,
506 u32 phy_no
, u32 page
, u32 addr
, u32 data
)
511 if (phy_no
> RTL8366S_PHY_NO_MAX
)
514 if (page
> RTL8366S_PHY_PAGE_MAX
)
517 if (addr
> RTL8366S_PHY_ADDR_MAX
)
520 ret
= rtl8366_smi_write_reg(smi
, RTL8366S_PHY_ACCESS_CTRL_REG
,
521 RTL8366S_PHY_CTRL_WRITE
);
525 reg
= 0x8000 | (1 << (phy_no
+ RTL8366S_PHY_NO_OFFSET
)) |
526 ((page
<< RTL8366S_PHY_PAGE_OFFSET
) & RTL8366S_PHY_PAGE_MASK
) |
527 (addr
& RTL8366S_PHY_REG_MASK
);
529 ret
= rtl8366_smi_write_reg(smi
, reg
, data
);
536 static int rtl8366_get_mib_counter(struct rtl8366_smi
*smi
, int counter
,
537 int port
, unsigned long long *val
)
541 u32 addr
, data
, regoffset
;
544 /* address offset to MIBs counter */
545 const u16 mibLength
[RTL8366S_MIB_COUNT
] = {4, 4, 2, 2, 2, 2, 2, 2, 2,
546 2, 2, 2, 2, 2, 2, 2, 2, 2,
547 2, 2, 4, 2, 2, 2, 2, 2, 2,
550 if (port
> RTL8366_NUM_PORTS
|| counter
>= RTL8366S_MIB_COUNT
)
554 regoffset
= RTL8366S_MIB_COUNTER_PORT_OFFSET
* (port
);
556 while (i
< counter
) {
557 regoffset
+= mibLength
[i
];
561 addr
= RTL8366S_MIB_COUNTER_BASE
+ regoffset
;
564 /* writing access counter address first */
565 /* then ASIC will prepare 64bits counter wait for being retrived */
566 data
= 0;/* writing data will be discard by ASIC */
567 err
= rtl8366_smi_write_reg(smi
, addr
, data
);
571 /* read MIB control register */
572 err
= rtl8366_smi_read_reg(smi
, RTL8366S_MIB_CTRL_REG
, &data
);
576 if (data
& RTL8366S_MIB_CTRL_BUSY_MASK
)
579 if (data
& RTL8366S_MIB_CTRL_RESET_MASK
)
583 addr
= addr
+ mibLength
[counter
] - 1;
584 i
= mibLength
[counter
];
587 err
= rtl8366_smi_read_reg(smi
, addr
, &data
);
591 mibvalue
= (mibvalue
<< 16) | (data
& 0xFFFF);
601 static int rtl8366s_get_vlan_4k_entry(struct rtl8366_smi
*smi
, u32 vid
,
602 struct rtl8366s_vlan4kentry
*vlan4k
)
608 memset(vlan4k
, '\0', sizeof(struct rtl8366s_vlan4kentry
));
611 if (vid
>= RTL8366_NUM_VIDS
)
614 tableaddr
= (u16
*)vlan4k
;
618 err
= rtl8366_smi_write_reg(smi
, RTL8366S_VLAN_TABLE_WRITE_BASE
, data
);
622 /* write table access control word */
623 err
= rtl8366_smi_write_reg(smi
, RTL8366S_TABLE_ACCESS_CTRL_REG
,
624 RTL8366S_TABLE_VLAN_READ_CTRL
);
628 err
= rtl8366_smi_read_reg(smi
, RTL8366S_VLAN_TABLE_READ_BASE
, &data
);
635 err
= rtl8366_smi_read_reg(smi
, RTL8366S_VLAN_TABLE_READ_BASE
+ 1,
646 static int rtl8366s_set_vlan_4k_entry(struct rtl8366_smi
*smi
,
647 const struct rtl8366s_vlan4kentry
*vlan4k
)
653 if (vlan4k
->vid
>= RTL8366_NUM_VIDS
||
654 vlan4k
->member
> RTL8366_PORT_ALL
||
655 vlan4k
->untag
> RTL8366_PORT_ALL
||
656 vlan4k
->fid
> RTL8366S_FIDMAX
)
659 tableaddr
= (u16
*)vlan4k
;
663 err
= rtl8366_smi_write_reg(smi
, RTL8366S_VLAN_TABLE_WRITE_BASE
, data
);
671 rtl8366_smi_write_reg(smi
, RTL8366S_VLAN_TABLE_WRITE_BASE
+ 1, data
);
674 /* write table access control word */
675 err
= rtl8366_smi_write_reg(smi
, RTL8366S_TABLE_ACCESS_CTRL_REG
,
676 RTL8366S_TABLE_VLAN_WRITE_CTRL
);
683 static int rtl8366s_get_vlan_member_config(struct rtl8366_smi
*smi
, u32 index
,
684 struct rtl8366s_vlanconfig
*vlanmc
)
691 memset(vlanmc
, '\0', sizeof(struct rtl8366s_vlanconfig
));
693 if (index
>= RTL8366_NUM_VLANS
)
696 tableaddr
= (u16
*)vlanmc
;
698 addr
= RTL8366S_VLAN_MEMCONF_BASE
+ (index
<< 1);
700 err
= rtl8366_smi_read_reg(smi
, addr
, &data
);
707 addr
= RTL8366S_VLAN_MEMCONF_BASE
+ 1 + (index
<< 1);
709 err
= rtl8366_smi_read_reg(smi
, addr
, &data
);
718 static int rtl8366s_set_vlan_member_config(struct rtl8366_smi
*smi
, u32 index
,
719 const struct rtl8366s_vlanconfig
727 if (index
>= RTL8366_NUM_VLANS
||
728 vlanmc
->vid
>= RTL8366_NUM_VIDS
||
729 vlanmc
->priority
> RTL8366S_PRIORITYMAX
||
730 vlanmc
->member
> RTL8366_PORT_ALL
||
731 vlanmc
->untag
> RTL8366_PORT_ALL
||
732 vlanmc
->fid
> RTL8366S_FIDMAX
)
735 addr
= RTL8366S_VLAN_MEMCONF_BASE
+ (index
<< 1);
738 tableaddr
= (u16
*)vlanmc
;
741 err
= rtl8366_smi_write_reg(smi
, addr
, data
);
745 addr
= RTL8366S_VLAN_MEMCONF_BASE
+ 1 + (index
<< 1);
750 err
= rtl8366_smi_write_reg(smi
, addr
, data
);
757 static int rtl8366_get_port_vlan_index(struct rtl8366_smi
*smi
, int port
,
764 /* bits mapping to port vlan control register of port n */
765 const u16 bits
[RTL8366_NUM_PORTS
] = { 0x000F, 0x00F0, 0x0F00,
766 0xF000, 0x000F, 0x00F0 };
767 /* bits offset to port vlan control register of port n */
768 const u16 bitoffset
[RTL8366_NUM_PORTS
] = { 0, 4, 8, 12, 0, 4 };
769 /* address offset to port vlan control register of port n */
770 const u16 addroffset
[RTL8366_NUM_PORTS
] = { 0, 0, 0, 0, 1, 1 };
772 if (port
>= RTL8366_NUM_PORTS
)
775 addr
= RTL8366S_PORT_VLAN_CTRL_BASE
+ addroffset
[port
];
777 err
= rtl8366_smi_read_reg(smi
, addr
, &data
);
781 *val
= (data
& bits
[port
]) >> bitoffset
[port
];
787 static int rtl8366_get_vlan_port_pvid(struct rtl8366_smi
*smi
, int port
,
792 struct rtl8366s_vlanconfig vlanmc
;
794 err
= rtl8366_get_port_vlan_index(smi
, port
, &index
);
798 err
= rtl8366s_get_vlan_member_config(smi
, index
, &vlanmc
);
806 static int rtl8366_set_port_vlan_index(struct rtl8366_smi
*smi
, int port
,
815 /* bits mapping to port vlan control register of port n */
816 const u16 bitmasks
[6] = { 0x000F, 0x00F0, 0x0F00,
817 0xF000, 0x000F, 0x00F0 };
818 /* bits offset to port vlan control register of port n */
819 const u16 bitOff
[6] = { 0, 4, 8, 12, 0, 4 };
820 /* address offset to port vlan control register of port n */
821 const u16 addrOff
[6] = { 0, 0, 0, 0, 1, 1 };
823 if (port
>= RTL8366_NUM_PORTS
|| index
>= RTL8366_NUM_VLANS
)
826 addr
= RTL8366S_PORT_VLAN_CTRL_BASE
+ addrOff
[port
];
828 bits
= bitmasks
[port
];
830 data
= (index
<< bitOff
[port
]) & bits
;
832 err
= rtl8366_smi_read_reg(smi
, addr
, &vlan_data
);
836 vlan_data
&= ~(vlan_data
& bits
);
839 err
= rtl8366_smi_write_reg(smi
, addr
, vlan_data
);
846 static int rtl8366_set_vlan_port_pvid(struct rtl8366_smi
*smi
, int port
,
850 struct rtl8366s_vlanconfig vlanmc
;
851 struct rtl8366s_vlan4kentry vlan4k
;
853 if (port
>= RTL8366_NUM_PORTS
|| val
>= RTL8366_NUM_VIDS
)
858 /* Updating the 4K entry; lookup it and change the port member set */
859 rtl8366s_get_vlan_4k_entry(smi
, val
, &vlan4k
);
860 vlan4k
.member
|= ((1 << port
) | RTL8366_PORT_CPU
);
861 vlan4k
.untag
= RTL8366_PORT_ALL_BUT_CPU
;
862 rtl8366s_set_vlan_4k_entry(smi
, &vlan4k
);
864 /* For the 16 entries more work needs to be done. First see if such
865 VID is already there and change it */
866 for (i
= 0; i
< RTL8366_NUM_VLANS
; ++i
) {
867 rtl8366s_get_vlan_member_config(smi
, i
, &vlanmc
);
869 /* Try to find an existing vid and update port member set */
870 if (val
== vlanmc
.vid
) {
871 vlanmc
.member
|= ((1 << port
) | RTL8366_PORT_CPU
);
872 rtl8366s_set_vlan_member_config(smi
, i
, &vlanmc
);
874 /* Now update PVID register settings */
875 rtl8366_set_port_vlan_index(smi
, port
, i
);
881 /* PVID could not be found from vlan table. Replace unused (one that
882 has no member ports) with new one */
883 for (i
= 0; i
< RTL8366_NUM_VLANS
; ++i
) {
884 rtl8366s_get_vlan_member_config(smi
, i
, &vlanmc
);
886 /* See if this vlan member configuration is unused. It is
887 unused if member set contains no ports or CPU port only */
888 if (!vlanmc
.member
|| vlanmc
.member
== RTL8366_PORT_CPU
) {
891 vlanmc
.untag
= RTL8366_PORT_ALL_BUT_CPU
;
892 vlanmc
.member
= ((1 << port
) | RTL8366_PORT_CPU
);
895 rtl8366s_set_vlan_member_config(smi
, i
, &vlanmc
);
897 /* Now update PVID register settings */
898 rtl8366_set_port_vlan_index(smi
, port
, i
);
904 dev_err(&smi
->pdev
->dev
, "All 16 vlan member configurations are in "
910 static int rtl8366_vlan_set_vlan(struct rtl8366_smi
*smi
, int enable
)
913 rtl8366_smi_read_reg(smi
, RTL8366_CHIP_GLOBAL_CTRL_REG
, &data
);
915 data
&= ~(data
& RTL8366_CHIP_CTRL_VLAN
);
917 data
|= RTL8366_CHIP_CTRL_VLAN
;
919 return rtl8366_smi_write_reg(smi
, RTL8366_CHIP_GLOBAL_CTRL_REG
, data
);
922 static int rtl8366_vlan_set_4ktable(struct rtl8366_smi
*smi
, int enable
)
925 rtl8366_smi_read_reg(smi
, RTL8366S_VLAN_TB_CTRL_REG
, &data
);
931 return rtl8366_smi_write_reg(smi
, RTL8366S_VLAN_TB_CTRL_REG
, data
);
934 static int rtl8366s_reset_vlan(struct rtl8366_smi
*smi
)
937 struct rtl8366s_vlan4kentry vlan4k
;
938 struct rtl8366s_vlanconfig vlanmc
;
940 /* clear 16 VLAN member configuration */
941 for (i
= 0; i
< RTL8366_NUM_VLANS
; i
++) {
947 if (rtl8366s_set_vlan_member_config(smi
, i
, &vlanmc
) != 0)
951 /* Set a default VLAN with vid 1 to 4K table for all ports */
953 vlan4k
.member
= RTL8366_PORT_ALL
;
954 vlan4k
.untag
= RTL8366_PORT_ALL
;
956 if (rtl8366s_set_vlan_4k_entry(smi
, &vlan4k
) != 0)
959 /* Set all ports PVID to default VLAN */
960 for (i
= 0; i
< RTL8366_NUM_PORTS
; i
++) {
961 if (rtl8366_set_vlan_port_pvid(smi
, i
, 0) != 0)
969 static int rtl8366_debugfs_open(struct inode
*inode
, struct file
*file
)
971 file
->private_data
= inode
->i_private
;
975 static ssize_t
rtl8366_read_debugfs_mibs(struct file
*file
,
976 char __user
*user_buf
,
977 size_t count
, loff_t
*ppos
)
980 struct rtl8366_smi
*smi
= (struct rtl8366_smi
*)file
->private_data
;
981 char *buf
= smi
->buf
;
983 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "MIB Counters:\n");
984 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "Counter"
986 "Port 0 \t\t Port 1 \t\t Port 2 \t\t Port 3 \t\t "
989 for (i
= 0; i
< 33; ++i
) {
991 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "%d:%s ",
993 for (j
= 0; j
< RTL8366_NUM_PORTS
; ++j
) {
994 unsigned long long counter
= 0;
996 if (!rtl8366_get_mib_counter(smi
, i
, j
, &counter
))
997 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1000 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1003 if (j
!= RTL8366_NUM_PORTS
- 1) {
1004 if (counter
< 100000)
1005 len
+= snprintf(buf
+ len
,
1006 sizeof(smi
->buf
) - len
,
1009 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1013 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "\n");
1016 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "\n");
1018 return simple_read_from_buffer(user_buf
, count
, ppos
, buf
, len
);
1021 static ssize_t
rtl8366_read_debugfs_vlan(struct file
*file
,
1022 char __user
*user_buf
,
1023 size_t count
, loff_t
*ppos
)
1026 struct rtl8366_smi
*smi
= (struct rtl8366_smi
*)file
->private_data
;
1027 char *buf
= smi
->buf
;
1029 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "VLAN Member Config:\n");
1030 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1031 "\t id \t vid \t prio \t member \t untag \t fid "
1034 for (i
= 0; i
< RTL8366_NUM_VLANS
; ++i
) {
1035 struct rtl8366s_vlanconfig vlanmc
;
1037 rtl8366s_get_vlan_member_config(smi
, i
, &vlanmc
);
1039 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1040 "\t[%d] \t %d \t %d \t 0x%04x \t 0x%04x \t %d "
1041 "\t", i
, vlanmc
.vid
, vlanmc
.priority
,
1042 vlanmc
.member
, vlanmc
.untag
, vlanmc
.fid
);
1044 for (j
= 0; j
< RTL8366_NUM_PORTS
; ++j
) {
1046 if (!rtl8366_get_port_vlan_index(smi
, j
, &index
)) {
1048 len
+= snprintf(buf
+ len
,
1049 sizeof(smi
->buf
) - len
,
1053 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "\n");
1056 return simple_read_from_buffer(user_buf
, count
, ppos
, buf
, len
);
1059 static ssize_t
rtl8366_read_debugfs_reg(struct file
*file
,
1060 char __user
*user_buf
,
1061 size_t count
, loff_t
*ppos
)
1063 u32 t
, reg
= g_dbg_reg
;
1065 struct rtl8366_smi
*smi
= (struct rtl8366_smi
*)file
->private_data
;
1066 char *buf
= smi
->buf
;
1068 memset(buf
, '\0', sizeof(smi
->buf
));
1070 err
= rtl8366_smi_read_reg(smi
, reg
, &t
);
1072 len
+= snprintf(buf
, sizeof(smi
->buf
),
1073 "Read failed (reg: 0x%04x)\n", reg
);
1074 return simple_read_from_buffer(user_buf
, count
, ppos
, buf
, len
);
1077 len
+= snprintf(buf
, sizeof(smi
->buf
), "reg = 0x%04x, val = 0x%04x\n",
1080 return simple_read_from_buffer(user_buf
, count
, ppos
, buf
, len
);
1083 static ssize_t
rtl8366_write_debugfs_reg(struct file
*file
,
1084 const char __user
*user_buf
,
1085 size_t count
, loff_t
*ppos
)
1088 u32 reg
= g_dbg_reg
;
1091 struct rtl8366_smi
*smi
= (struct rtl8366_smi
*)file
->private_data
;
1092 char *buf
= smi
->buf
;
1094 len
= min(count
, sizeof(smi
->buf
) - 1);
1095 if (copy_from_user(buf
, user_buf
, len
)) {
1096 dev_err(&smi
->pdev
->dev
, "copy from user failed\n");
1101 if (len
> 0 && buf
[len
- 1] == '\n')
1102 buf
[len
- 1] = '\0';
1105 if (strict_strtoul(buf
, 16, &data
)) {
1106 dev_err(&smi
->pdev
->dev
, "Invalid reg value %s\n", buf
);
1108 err
= rtl8366_smi_write_reg(smi
, reg
, data
);
1110 dev_err(&smi
->pdev
->dev
,
1111 "writing reg 0x%04x val 0x%04lx failed\n",
1119 static const struct file_operations fops_rtl8366_regs
= {
1120 .read
= rtl8366_read_debugfs_reg
,
1121 .write
= rtl8366_write_debugfs_reg
,
1122 .open
= rtl8366_debugfs_open
,
1123 .owner
= THIS_MODULE
1126 static const struct file_operations fops_rtl8366_vlan
= {
1127 .read
= rtl8366_read_debugfs_vlan
,
1128 .open
= rtl8366_debugfs_open
,
1129 .owner
= THIS_MODULE
1132 static const struct file_operations fops_rtl8366_mibs
= {
1133 .read
= rtl8366_read_debugfs_mibs
,
1134 .open
= rtl8366_debugfs_open
,
1135 .owner
= THIS_MODULE
1138 static void rtl8366_debugfs_init(struct rtl8366_smi
*smi
)
1140 struct dentry
*node
;
1141 struct dentry
*root
;
1143 if (!smi
->debugfs_root
)
1144 smi
->debugfs_root
= debugfs_create_dir("rtl8366s", NULL
);
1146 if (!smi
->debugfs_root
) {
1147 dev_err(&smi
->pdev
->dev
, "Unable to create debugfs dir\n");
1150 root
= smi
->debugfs_root
;
1152 node
= debugfs_create_x16("reg", S_IRUGO
| S_IWUSR
, root
, &g_dbg_reg
);
1154 dev_err(&smi
->pdev
->dev
, "Creating debugfs file reg failed\n");
1158 node
= debugfs_create_file("val", S_IRUGO
| S_IWUSR
, root
, smi
,
1159 &fops_rtl8366_regs
);
1161 dev_err(&smi
->pdev
->dev
, "Creating debugfs file val failed\n");
1165 node
= debugfs_create_file("vlan", S_IRUSR
, root
, smi
,
1166 &fops_rtl8366_vlan
);
1168 dev_err(&smi
->pdev
->dev
, "Creating debugfs file vlan "
1173 node
= debugfs_create_file("mibs", S_IRUSR
, root
, smi
,
1174 &fops_rtl8366_mibs
);
1176 dev_err(&smi
->pdev
->dev
, "Creating debugfs file mibs "
1182 static void rtl8366_debugfs_remove(struct rtl8366_smi
*smi
)
1184 if (smi
->debugfs_root
) {
1185 debugfs_remove_recursive(smi
->debugfs_root
);
1186 smi
->debugfs_root
= NULL
;
1191 static inline void rtl8366_debugfs_init(struct rtl8366_smi
*smi
) {}
1192 static inline void rtl8366_debugfs_remove(struct rtl8366_smi
*smi
) {}
1195 static int rtl8366_global_reset_mibs(struct switch_dev
*dev
,
1196 const struct switch_attr
*attr
,
1197 struct switch_val
*val
)
1200 struct rtl8366_smi
*smi
= to_rtl8366(dev
);
1202 if (val
->value
.i
== 1) {
1203 rtl8366_smi_read_reg(smi
, RTL8366S_MIB_CTRL_REG
, &data
);
1205 rtl8366_smi_write_reg(smi
, RTL8366S_MIB_CTRL_REG
, data
);
1211 static int rtl8366_get_vlan(struct switch_dev
*dev
,
1212 const struct switch_attr
*attr
,
1213 struct switch_val
*val
)
1216 struct rtl8366_smi
*smi
= to_rtl8366(dev
);
1218 if (attr
->ofs
== 1) {
1219 rtl8366_smi_read_reg(smi
, RTL8366_CHIP_GLOBAL_CTRL_REG
, &data
);
1221 if (data
& RTL8366_CHIP_CTRL_VLAN
)
1225 } else if (attr
->ofs
== 2) {
1226 rtl8366_smi_read_reg(smi
, RTL8366S_VLAN_TB_CTRL_REG
, &data
);
1237 static int rtl8366_global_get_blinkrate(struct switch_dev
*dev
,
1238 const struct switch_attr
*attr
,
1239 struct switch_val
*val
)
1242 struct rtl8366_smi
*smi
= to_rtl8366(dev
);
1243 rtl8366_smi_read_reg(smi
, RTL8366_LED_BLINKRATE_REG
, &data
);
1245 val
->value
.i
= (data
& (RTL8366_LED_BLINKRATE_MASK
));
1250 static int rtl8366_global_set_blinkrate(struct switch_dev
*dev
,
1251 const struct switch_attr
*attr
,
1252 struct switch_val
*val
)
1255 struct rtl8366_smi
*smi
= to_rtl8366(dev
);
1257 if (val
->value
.i
>= 6)
1260 rtl8366_smi_read_reg(smi
, RTL8366_LED_BLINKRATE_REG
, &data
);
1262 data
&= ~(data
& RTL8366_LED_BLINKRATE_MASK
);
1263 data
|= val
->value
.i
;
1265 rtl8366_smi_write_reg(smi
, RTL8366_LED_BLINKRATE_REG
, data
);
1270 static int rtl8366_set_vlan(struct switch_dev
*dev
,
1271 const struct switch_attr
*attr
,
1272 struct switch_val
*val
)
1274 struct rtl8366_smi
*smi
= to_rtl8366(dev
);
1277 return rtl8366_vlan_set_vlan(smi
, val
->value
.i
);
1279 return rtl8366_vlan_set_4ktable(smi
, val
->value
.i
);
1282 static int rtl8366_attr_get_port_link(struct switch_dev
*dev
,
1283 const struct switch_attr
*attr
,
1284 struct switch_val
*val
)
1286 u32 len
= 0, data
= 0;
1287 int speed
, duplex
, link
, txpause
, rxpause
, nway
;
1288 struct rtl8366_smi
*smi
= to_rtl8366(dev
);
1289 char *buf
= smi
->buf
;
1291 if (val
->port_vlan
>= RTL8366_NUM_PORTS
)
1294 memset(buf
, '\0', sizeof(smi
->buf
));
1295 rtl8366_smi_read_reg(smi
, RTL8366S_PORT_LINK_STATUS_BASE
+
1296 (val
->port_vlan
>> 1),
1299 if (val
->port_vlan
& 0x1)
1302 speed
= (data
& RTL8366S_PORT_STATUS_SPEED_MASK
);
1303 duplex
= (data
& RTL8366S_PORT_STATUS_DUPLEX_MASK
) >> 2;
1304 link
= (data
& RTL8366S_PORT_STATUS_LINK_MASK
) >> 4;
1305 txpause
= (data
& RTL8366S_PORT_STATUS_TXPAUSE_MASK
) >> 5;
1306 rxpause
= (data
& RTL8366S_PORT_STATUS_RXPAUSE_MASK
) >> 6;
1307 nway
= (data
& RTL8366S_PORT_STATUS_AN_MASK
) >> 7;
1309 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "Port %d: ",
1313 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1314 "Link UP, Speed: ");
1316 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1317 "Link DOWN, Speed: ");
1320 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "10Base-TX ");
1321 else if (speed
== 1)
1322 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "100Base-TX ");
1323 else if (speed
== 2)
1324 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "1000Base-TX ");
1327 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "Full-Duplex, ");
1329 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "Half-Duplex, ");
1332 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "TX-Pause ");
1334 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "RX-Pause ");
1336 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "nway ");
1344 static int rtl8366_attr_get_vlan_info(struct switch_dev
*dev
,
1345 const struct switch_attr
*attr
,
1346 struct switch_val
*val
)
1350 struct rtl8366s_vlanconfig vlanmc
;
1351 struct rtl8366s_vlan4kentry vlan4k
;
1352 struct rtl8366_smi
*smi
= to_rtl8366(dev
);
1353 char *buf
= smi
->buf
;
1355 if (val
->port_vlan
>= RTL8366_NUM_PORTS
)
1358 memset(buf
, '\0', sizeof(smi
->buf
));
1360 rtl8366s_get_vlan_member_config(smi
, val
->port_vlan
, &vlanmc
);
1361 rtl8366s_get_vlan_4k_entry(smi
, vlanmc
.vid
, &vlan4k
);
1363 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "VLAN %d: Ports: ",
1366 for (i
= 0; i
< RTL8366_NUM_PORTS
; ++i
) {
1368 if (!rtl8366_get_port_vlan_index(smi
, i
, &index
) &&
1369 index
== val
->port_vlan
)
1370 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "%d", i
);
1372 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "\n");
1374 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1375 "\t\t vid \t prio \t member \t untag \t fid\n");
1376 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "\tMC:\t");
1377 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1378 "%d \t %d \t 0x%04x \t 0x%04x \t %d\n",
1379 vlanmc
.vid
, vlanmc
.priority
, vlanmc
.member
,
1380 vlanmc
.untag
, vlanmc
.fid
);
1381 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "\t4K:\t");
1382 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1383 "%d \t \t 0x%04x \t 0x%04x \t %d",
1384 vlan4k
.vid
, vlan4k
.member
, vlan4k
.untag
, vlan4k
.fid
);
1392 static int rtl8366_set_port_led(struct switch_dev
*dev
,
1393 const struct switch_attr
*attr
,
1394 struct switch_val
*val
)
1397 struct rtl8366_smi
*smi
= to_rtl8366(dev
);
1398 if (val
->port_vlan
>= RTL8366_NUM_PORTS
||
1399 (1 << val
->port_vlan
) == RTL8366_PORT_UNKNOWN
)
1402 if (val
->port_vlan
== RTL8366_PORT_NUM_CPU
) {
1403 rtl8366_smi_read_reg(smi
, RTL8366_LED_BLINKRATE_REG
, &data
);
1404 data
= (data
& (~(0xF << 4))) | (val
->value
.i
<< 4);
1405 rtl8366_smi_write_reg(smi
, RTL8366_LED_BLINKRATE_REG
, data
);
1407 rtl8366_smi_read_reg(smi
, RTL8366_LED_CTRL_REG
, &data
);
1408 data
= (data
& (~(0xF << (val
->port_vlan
* 4)))) |
1409 (val
->value
.i
<< (val
->port_vlan
* 4));
1410 rtl8366_smi_write_reg(smi
, RTL8366_LED_CTRL_REG
, data
);
1416 static int rtl8366_get_port_led(struct switch_dev
*dev
,
1417 const struct switch_attr
*attr
,
1418 struct switch_val
*val
)
1421 struct rtl8366_smi
*smi
= to_rtl8366(dev
);
1422 if (val
->port_vlan
>= RTL8366_NUM_LEDGROUPS
)
1425 rtl8366_smi_read_reg(smi
, RTL8366_LED_CTRL_REG
, &data
);
1426 val
->value
.i
= (data
>> (val
->port_vlan
* 4)) & 0x000F;
1431 static int rtl8366_reset_port_mibs(struct switch_dev
*dev
,
1432 const struct switch_attr
*attr
,
1433 struct switch_val
*val
)
1436 struct rtl8366_smi
*smi
= to_rtl8366(dev
);
1437 if (val
->port_vlan
>= RTL8366_NUM_PORTS
)
1440 rtl8366_smi_read_reg(smi
, RTL8366S_MIB_CTRL_REG
, &data
);
1441 data
|= (1 << (val
->port_vlan
+ 3));
1442 rtl8366_smi_write_reg(smi
, RTL8366S_MIB_CTRL_REG
, data
);
1447 static int rtl8366_get_port_mib(struct switch_dev
*dev
,
1448 const struct switch_attr
*attr
,
1449 struct switch_val
*val
)
1452 unsigned long long counter
= 0;
1453 struct rtl8366_smi
*smi
= to_rtl8366(dev
);
1454 char *buf
= smi
->buf
;
1456 if (val
->port_vlan
>= RTL8366_NUM_PORTS
)
1459 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "Port %d MIB counters\n",
1461 for (i
= 0; i
< RTL8366S_MIB_COUNT
; ++i
) {
1463 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1464 "%d:%s\t", i
, MIBCOUNTERS
[i
]);
1465 if (!rtl8366_get_mib_counter(smi
, i
, val
->port_vlan
, &counter
))
1466 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1467 "[%llu]\n", counter
);
1469 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1478 static int rtl8366_get_ports(struct switch_dev
*dev
,
1479 struct switch_val
*val
)
1481 struct rtl8366s_vlanconfig vlanmc
;
1482 struct rtl8366_smi
*smi
= to_rtl8366(dev
);
1483 struct switch_port
*port
;
1486 if (val
->port_vlan
>= RTL8366_NUM_VLANS
)
1489 rtl8366s_get_vlan_member_config(smi
, val
->port_vlan
, &vlanmc
);
1491 port
= &val
->value
.ports
[0];
1493 for (i
= 0; i
< RTL8366_NUM_PORTS
; i
++) {
1494 if (!(vlanmc
.member
& BIT(i
)))
1498 port
->flags
= vlanmc
.untag
? 0 : BIT(SWITCH_PORT_FLAG_TAGGED
);
1505 static int rtl8366_set_ports(struct switch_dev
*dev
,
1506 struct switch_val
*val
)
1508 struct rtl8366s_vlanconfig vlanmc
;
1509 struct rtl8366s_vlan4kentry vlan4k
;
1510 struct rtl8366_smi
*smi
= to_rtl8366(dev
);
1511 struct switch_port
*port
;
1514 if (val
->port_vlan
>= RTL8366_NUM_VLANS
)
1517 rtl8366s_get_vlan_member_config(smi
, val
->port_vlan
, &vlanmc
);
1518 rtl8366s_get_vlan_4k_entry(smi
, vlanmc
.vid
, &vlan4k
);
1523 port
= &val
->value
.ports
[0];
1524 for (i
= 0; i
< val
->len
; i
++, port
++) {
1525 vlanmc
.member
|= BIT(port
->id
);
1527 if (!(port
->flags
& BIT(SWITCH_PORT_FLAG_TAGGED
)))
1528 vlanmc
.untag
|= BIT(port
->id
);
1531 vlan4k
.member
= vlanmc
.member
;
1532 vlan4k
.untag
= vlanmc
.untag
;
1534 rtl8366s_set_vlan_member_config(smi
, val
->port_vlan
, &vlanmc
);
1535 rtl8366s_set_vlan_4k_entry(smi
, &vlan4k
);
1539 static int rtl8366_get_port_pvid(struct switch_dev
*dev
, int port
, int *val
)
1541 struct rtl8366_smi
*smi
= to_rtl8366(dev
);
1542 return rtl8366_get_vlan_port_pvid(smi
, port
, val
);
1545 static int rtl8366_set_port_pvid(struct switch_dev
*dev
, int port
, int val
)
1547 struct rtl8366_smi
*smi
= to_rtl8366(dev
);
1548 return rtl8366_set_vlan_port_pvid(smi
, port
, val
);
1551 static int rtl8366_reset_switch(struct switch_dev
*dev
)
1553 struct rtl8366_smi
*smi
= to_rtl8366(dev
);
1557 rtl8366_smi_write_reg(smi
, RTL8366_RESET_CTRL_REG
,
1558 RTL8366_CHIP_CTRL_RESET_HW
);
1561 if (rtl8366_smi_read_reg(smi
, RTL8366_RESET_CTRL_REG
, &data
))
1564 if (!(data
& RTL8366_CHIP_CTRL_RESET_HW
))
1566 } while (--timeout
);
1569 printk("Timeout waiting for the switch to reset\n");
1573 return rtl8366s_reset_vlan(smi
);
1576 static struct switch_attr rtl8366_globals
[] = {
1578 .type
= SWITCH_TYPE_INT
,
1579 .name
= "enable_vlan",
1580 .description
= "Enable VLAN mode",
1581 .set
= rtl8366_set_vlan
,
1582 .get
= rtl8366_get_vlan
,
1587 .type
= SWITCH_TYPE_INT
,
1588 .name
= "enable_vlan4k",
1589 .description
= "Enable VLAN 4K mode",
1590 .set
= rtl8366_set_vlan
,
1591 .get
= rtl8366_get_vlan
,
1596 .type
= SWITCH_TYPE_INT
,
1597 .name
= "reset_mibs",
1598 .description
= "Reset all MIB counters",
1599 .set
= rtl8366_global_reset_mibs
,
1604 .type
= SWITCH_TYPE_INT
,
1605 .name
= "blinkrate",
1606 .description
= "Get/Set LED blinking rate (0 = 43ms, 1 = 84ms,"
1607 " 2 = 120ms, 3 = 170ms, 4 = 340ms, 5 = 670ms)",
1608 .set
= rtl8366_global_set_blinkrate
,
1609 .get
= rtl8366_global_get_blinkrate
,
1614 static struct switch_attr rtl8366_port
[] = {
1616 .type
= SWITCH_TYPE_STRING
,
1618 .description
= "Get port link information",
1621 .get
= rtl8366_attr_get_port_link
1624 .type
= SWITCH_TYPE_INT
,
1625 .name
= "reset_mib",
1626 .description
= "Reset single port MIB counters",
1628 .set
= rtl8366_reset_port_mibs
,
1632 .type
= SWITCH_TYPE_STRING
,
1634 .description
= "Get MIB counters for port",
1637 .get
= rtl8366_get_port_mib
1640 .type
= SWITCH_TYPE_INT
,
1642 .description
= "Get/Set port group (0 - 3) led mode (0 - 15)",
1644 .set
= rtl8366_set_port_led
,
1645 .get
= rtl8366_get_port_led
1649 static struct switch_attr rtl8366_vlan
[] = {
1651 .type
= SWITCH_TYPE_STRING
,
1653 .description
= "Get vlan information",
1656 .get
= rtl8366_attr_get_vlan_info
1662 static struct switch_dev rtldev
= {
1664 .cpu_port
= RTL8366_PORT_NUM_CPU
,
1665 .ports
= RTL8366_NUM_PORTS
,
1666 .vlans
= RTL8366_NUM_VLANS
,
1668 .attr
= rtl8366_globals
,
1669 .n_attr
= ARRAY_SIZE(rtl8366_globals
),
1672 .attr
= rtl8366_port
,
1673 .n_attr
= ARRAY_SIZE(rtl8366_port
),
1676 .attr
= rtl8366_vlan
,
1677 .n_attr
= ARRAY_SIZE(rtl8366_vlan
),
1680 .get_vlan_ports
= rtl8366_get_ports
,
1681 .set_vlan_ports
= rtl8366_set_ports
,
1682 .get_port_pvid
= rtl8366_get_port_pvid
,
1683 .set_port_pvid
= rtl8366_set_port_pvid
,
1684 .reset_switch
= rtl8366_reset_switch
,
1687 static int rtl8366_smi_switch_init(struct rtl8366_smi
*smi
)
1689 struct switch_dev
*dev
= &smi
->dev
;
1692 memcpy(dev
, &rtldev
, sizeof(struct switch_dev
));
1694 dev
->devname
= dev_name(&smi
->pdev
->dev
);
1696 err
= register_switch(dev
, NULL
);
1698 dev_err(&smi
->pdev
->dev
, "switch registration failed\n");
1703 static void rtl8366_smi_switch_cleanup(struct rtl8366_smi
*smi
)
1705 unregister_switch(&smi
->dev
);
1708 static int rtl8366_smi_mii_read(struct mii_bus
*bus
, int addr
, int reg
)
1710 struct rtl8366_smi
*smi
= bus
->priv
;
1714 err
= rtl8366_smi_read_phy_reg(smi
, addr
, 0, reg
, &val
);
1721 static int rtl8366_smi_mii_write(struct mii_bus
*bus
, int addr
, int reg
,
1724 struct rtl8366_smi
*smi
= bus
->priv
;
1728 err
= rtl8366_smi_write_phy_reg(smi
, addr
, 0, reg
, val
);
1730 (void) rtl8366_smi_read_phy_reg(smi
, addr
, 0, reg
, &t
);
1735 static int rtl8366_smi_mii_init(struct rtl8366_smi
*smi
)
1740 smi
->mii_bus
= mdiobus_alloc();
1741 if (smi
->mii_bus
== NULL
) {
1746 spin_lock_init(&smi
->lock
);
1747 smi
->mii_bus
->priv
= (void *) smi
;
1748 smi
->mii_bus
->name
= "rtl8366-smi";
1749 smi
->mii_bus
->read
= rtl8366_smi_mii_read
;
1750 smi
->mii_bus
->write
= rtl8366_smi_mii_write
;
1751 snprintf(smi
->mii_bus
->id
, MII_BUS_ID_SIZE
, "%s",
1752 dev_name(&smi
->pdev
->dev
));
1753 smi
->mii_bus
->parent
= &smi
->pdev
->dev
;
1754 smi
->mii_bus
->phy_mask
= ~(0x1f);
1755 smi
->mii_bus
->irq
= smi
->mii_irq
;
1756 for (i
= 0; i
< PHY_MAX_ADDR
; i
++)
1757 smi
->mii_irq
[i
] = PHY_POLL
;
1759 ret
= mdiobus_register(smi
->mii_bus
);
1766 mdiobus_free(smi
->mii_bus
);
1771 static void rtl8366_smi_mii_cleanup(struct rtl8366_smi
*smi
)
1773 mdiobus_unregister(smi
->mii_bus
);
1774 mdiobus_free(smi
->mii_bus
);
1777 static int rtl8366_smi_mii_bus_match(struct mii_bus
*bus
)
1779 return (bus
->read
== rtl8366_smi_mii_read
&&
1780 bus
->write
== rtl8366_smi_mii_write
);
1783 static int rtl8366_smi_setup(struct rtl8366_smi
*smi
)
1789 ret
= rtl8366_smi_read_reg(smi
, RTL8366S_CHIP_ID_REG
, &chip_id
);
1791 dev_err(&smi
->pdev
->dev
, "unable to read chip id\n");
1796 case RTL8366S_CHIP_ID_8366
:
1799 dev_err(&smi
->pdev
->dev
, "unknown chip id (%04x)\n", chip_id
);
1803 ret
= rtl8366_smi_read_reg(smi
, RTL8366S_CHIP_VERSION_CTRL_REG
,
1806 dev_err(&smi
->pdev
->dev
, "unable to read chip version\n");
1810 dev_info(&smi
->pdev
->dev
, "RTL%04x ver. %u chip found\n",
1811 chip_id
, chip_ver
& RTL8366S_CHIP_VERSION_MASK
);
1813 rtl8366_debugfs_init(smi
);
1818 static int __init
rtl8366_smi_probe(struct platform_device
*pdev
)
1820 static int rtl8366_smi_version_printed
;
1821 struct rtl8366_smi_platform_data
*pdata
;
1822 struct rtl8366_smi
*smi
;
1825 if (!rtl8366_smi_version_printed
++)
1826 printk(KERN_NOTICE RTL8366_SMI_DRIVER_DESC
1827 " version " RTL8366_SMI_DRIVER_VER
"\n");
1829 pdata
= pdev
->dev
.platform_data
;
1831 dev_err(&pdev
->dev
, "no platform data specified\n");
1836 smi
= kzalloc(sizeof(struct rtl8366_smi
), GFP_KERNEL
);
1838 dev_err(&pdev
->dev
, "no memory for private data\n");
1843 err
= gpio_request(pdata
->gpio_sda
, dev_name(&pdev
->dev
));
1845 dev_err(&pdev
->dev
, "gpio_request failed for %u, err=%d\n",
1846 pdata
->gpio_sda
, err
);
1850 err
= gpio_request(pdata
->gpio_sck
, dev_name(&pdev
->dev
));
1852 dev_err(&pdev
->dev
, "gpio_request failed for %u, err=%d\n",
1853 pdata
->gpio_sck
, err
);
1859 spin_lock_init(&smi
->lock
);
1861 platform_set_drvdata(pdev
, smi
);
1863 dev_info(&pdev
->dev
, "using GPIO pins %u (SDA) and %u (SCK)\n",
1864 pdata
->gpio_sda
, pdata
->gpio_sck
);
1866 err
= rtl8366_smi_setup(smi
);
1868 goto err_clear_drvdata
;
1870 err
= rtl8366_smi_mii_init(smi
);
1872 goto err_clear_drvdata
;
1874 err
= rtl8366_smi_switch_init(smi
);
1876 goto err_mii_cleanup
;
1881 rtl8366_smi_mii_cleanup(smi
);
1883 platform_set_drvdata(pdev
, NULL
);
1884 gpio_free(pdata
->gpio_sck
);
1886 gpio_free(pdata
->gpio_sda
);
1893 int rtl8366_phy_config_init(struct phy_device
*phydev
)
1895 if (!rtl8366_smi_mii_bus_match(phydev
->bus
))
1901 int rtl8366_phy_config_aneg(struct phy_device
*phydev
)
1906 static struct phy_driver rtl8366_smi_phy_driver
= {
1907 .phy_id
= 0x001cc960,
1908 .name
= "Realtek RTL8366",
1909 .phy_id_mask
= 0x1ffffff0,
1910 .features
= PHY_GBIT_FEATURES
,
1911 .config_aneg
= rtl8366_phy_config_aneg
,
1912 .config_init
= rtl8366_phy_config_init
,
1913 .read_status
= genphy_read_status
,
1915 .owner
= THIS_MODULE
,
1919 static int __devexit
rtl8366_smi_remove(struct platform_device
*pdev
)
1921 struct rtl8366_smi
*smi
= platform_get_drvdata(pdev
);
1924 struct rtl8366_smi_platform_data
*pdata
;
1926 pdata
= pdev
->dev
.platform_data
;
1928 rtl8366_smi_switch_cleanup(smi
);
1929 rtl8366_debugfs_remove(smi
);
1930 rtl8366_smi_mii_cleanup(smi
);
1931 platform_set_drvdata(pdev
, NULL
);
1932 gpio_free(pdata
->gpio_sck
);
1933 gpio_free(pdata
->gpio_sda
);
1940 static struct platform_driver rtl8366_smi_driver
= {
1942 .name
= RTL8366_SMI_DRIVER_NAME
,
1943 .owner
= THIS_MODULE
,
1945 .probe
= rtl8366_smi_probe
,
1946 .remove
= __devexit_p(rtl8366_smi_remove
),
1949 static int __init
rtl8366_smi_init(void)
1952 ret
= platform_driver_register(&rtl8366_smi_driver
);
1956 ret
= phy_driver_register(&rtl8366_smi_phy_driver
);
1958 goto err_platform_unregister
;
1962 err_platform_unregister
:
1963 platform_driver_unregister(&rtl8366_smi_driver
);
1966 module_init(rtl8366_smi_init
);
1968 static void __exit
rtl8366_smi_exit(void)
1970 phy_driver_unregister(&rtl8366_smi_phy_driver
);
1971 platform_driver_unregister(&rtl8366_smi_driver
);
1973 module_exit(rtl8366_smi_exit
);
1975 MODULE_DESCRIPTION(RTL8366_SMI_DRIVER_DESC
);
1976 MODULE_VERSION(RTL8366_SMI_DRIVER_VER
);
1977 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
1978 MODULE_AUTHOR("Antti Seppälä <a.seppala@gmail.com>");
1979 MODULE_LICENSE("GPL v2");
1980 MODULE_ALIAS("platform:" RTL8366_SMI_DRIVER_NAME
);