1 From d677877e2688813e5e0c12d0228a631021ed70c4 Mon Sep 17 00:00:00 2001
2 From: Gabor Juhos <juhosg@openwrt.org>
3 Date: Wed, 14 Mar 2012 10:45:28 +0100
4 Subject: [PATCH 33/47] MIPS: ath79: add WMAC registration code for AR934X
6 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
7 Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
8 Cc: linux-mips@linux-mips.org
9 Cc: mcgrof@infradead.org
10 Patchwork: https://patchwork.linux-mips.org/patch/3513/
11 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
13 arch/mips/ath79/Kconfig | 2 +-
14 arch/mips/ath79/dev-wmac.c | 30 ++++++++++++++++++++++-
15 arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 3 ++
16 3 files changed, 32 insertions(+), 3 deletions(-)
18 --- a/arch/mips/ath79/Kconfig
19 +++ b/arch/mips/ath79/Kconfig
20 @@ -86,7 +86,7 @@ config ATH79_DEV_USB
24 - depends on (SOC_AR913X || SOC_AR933X)
25 + depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X)
29 --- a/arch/mips/ath79/dev-wmac.c
30 +++ b/arch/mips/ath79/dev-wmac.c
33 * Atheros AR913X/AR933X SoC built-in WMAC device support
35 + * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
36 * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
37 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
39 + * Parts of this file are based on Atheros 2.6.15/2.6.31 BSP
41 * This program is free software; you can redistribute it and/or modify it
42 * under the terms of the GNU General Public License version 2 as published
43 * by the Free Software Foundation.
44 @@ -26,8 +29,7 @@ static struct resource ath79_wmac_resour
45 /* .start and .end fields are filled dynamically */
46 .flags = IORESOURCE_MEM,
48 - .start = ATH79_CPU_IRQ_IP2,
49 - .end = ATH79_CPU_IRQ_IP2,
50 + /* .start and .end fields are filled dynamically */
51 .flags = IORESOURCE_IRQ,
54 @@ -53,6 +55,8 @@ static void __init ar913x_wmac_setup(voi
56 ath79_wmac_resources[0].start = AR913X_WMAC_BASE;
57 ath79_wmac_resources[0].end = AR913X_WMAC_BASE + AR913X_WMAC_SIZE - 1;
58 + ath79_wmac_resources[1].start = ATH79_CPU_IRQ_IP2;
59 + ath79_wmac_resources[1].end = ATH79_CPU_IRQ_IP2;
63 @@ -79,6 +83,8 @@ static void __init ar933x_wmac_setup(voi
65 ath79_wmac_resources[0].start = AR933X_WMAC_BASE;
66 ath79_wmac_resources[0].end = AR933X_WMAC_BASE + AR933X_WMAC_SIZE - 1;
67 + ath79_wmac_resources[1].start = ATH79_CPU_IRQ_IP2;
68 + ath79_wmac_resources[1].end = ATH79_CPU_IRQ_IP2;
70 t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
71 if (t & AR933X_BOOTSTRAP_REF_CLK_40)
72 @@ -92,12 +98,32 @@ static void __init ar933x_wmac_setup(voi
73 ath79_wmac_data.external_reset = ar933x_wmac_reset;
76 +static void ar934x_wmac_setup(void)
80 + ath79_wmac_device.name = "ar934x_wmac";
82 + ath79_wmac_resources[0].start = AR934X_WMAC_BASE;
83 + ath79_wmac_resources[0].end = AR934X_WMAC_BASE + AR934X_WMAC_SIZE - 1;
84 + ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1);
85 + ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1);
87 + t = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
88 + if (t & AR934X_BOOTSTRAP_REF_CLK_40)
89 + ath79_wmac_data.is_clk_25mhz = false;
91 + ath79_wmac_data.is_clk_25mhz = true;
94 void __init ath79_register_wmac(u8 *cal_data)
98 else if (soc_is_ar933x())
100 + else if (soc_is_ar934x())
101 + ar934x_wmac_setup();
105 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
106 +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
108 #define AR933X_EHCI_BASE 0x1b000000
109 #define AR933X_EHCI_SIZE 0x1000
111 +#define AR934X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000)
112 +#define AR934X_WMAC_SIZE 0x20000