1 From 5e079d9b7ac5dda3be9f215f8440333597f57b26 Mon Sep 17 00:00:00 2001
2 From: Gabor Juhos <juhosg@openwrt.org>
3 Date: Sun, 3 Feb 2013 14:52:47 +0000
4 Subject: [PATCH] MIPS: pci-ar724x: setup command register of the PCI
7 commit 12401fc28d40aa5bf8bda6991a96b6d7a3dae3ac upstream.
9 The command register of the PCI controller is
10 not initialized correctly by the bootloader on
11 some boards and this leads to non working PCI
14 Add code to initialize the command register
15 from the Linux code to avoid this.
17 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
18 Patchwork: http://patchwork.linux-mips.org/patch/4916/
19 Signed-off-by: John Crispin <blogic@openwrt.org>
21 arch/mips/ath79/pci.c | 10 +++-
22 arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 2 +
23 arch/mips/pci/pci-ar724x.c | 63 ++++++++++++++++++++++++
24 3 files changed, 74 insertions(+), 1 deletion(-)
26 --- a/arch/mips/ath79/pci.c
27 +++ b/arch/mips/ath79/pci.c
28 @@ -139,13 +139,14 @@ static struct platform_device *
29 ath79_register_pci_ar724x(int id,
30 unsigned long cfg_base,
31 unsigned long ctrl_base,
32 + unsigned long crp_base,
33 unsigned long mem_base,
34 unsigned long mem_size,
35 unsigned long io_base,
38 struct platform_device *pdev;
39 - struct resource res[5];
40 + struct resource res[6];
42 memset(res, 0, sizeof(res));
44 @@ -173,6 +174,11 @@ ath79_register_pci_ar724x(int id,
45 res[4].start = io_base;
48 + res[5].name = "crp_base";
49 + res[5].flags = IORESOURCE_MEM;
50 + res[5].start = crp_base;
51 + res[5].end = crp_base + AR724X_PCI_CRP_SIZE - 1;
53 pdev = platform_device_register_simple("ar724x-pci", id,
54 res, ARRAY_SIZE(res));
56 @@ -188,6 +194,7 @@ int __init ath79_register_pci(void)
57 pdev = ath79_register_pci_ar724x(-1,
60 + AR724X_PCI_CRP_BASE,
64 @@ -203,6 +210,7 @@ int __init ath79_register_pci(void)
65 pdev = ath79_register_pci_ar724x(-1,
68 + AR724X_PCI_CRP_BASE,
72 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
73 +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
76 #define AR724X_PCI_CFG_BASE 0x14000000
77 #define AR724X_PCI_CFG_SIZE 0x1000
78 +#define AR724X_PCI_CRP_BASE (AR71XX_APB_BASE + 0x000c0000)
79 +#define AR724X_PCI_CRP_SIZE 0x1000
80 #define AR724X_PCI_CTRL_BASE (AR71XX_APB_BASE + 0x000f0000)
81 #define AR724X_PCI_CTRL_SIZE 0x100
83 --- a/arch/mips/pci/pci-ar724x.c
84 +++ b/arch/mips/pci/pci-ar724x.c
87 #define AR7240_BAR0_WAR_VALUE 0xffff
89 +#define AR724X_PCI_CMD_INIT (PCI_COMMAND_MEMORY | \
90 + PCI_COMMAND_MASTER | \
91 + PCI_COMMAND_INVALIDATE | \
92 + PCI_COMMAND_PARITY | \
93 + PCI_COMMAND_SERR | \
94 + PCI_COMMAND_FAST_BACK)
96 struct ar724x_pci_controller {
97 void __iomem *devcfg_base;
98 void __iomem *ctrl_base;
99 + void __iomem *crp_base;
103 @@ -64,6 +72,51 @@ pci_bus_to_ar724x_controller(struct pci_
104 return container_of(hose, struct ar724x_pci_controller, pci_controller);
107 +static int ar724x_pci_local_write(struct ar724x_pci_controller *apc,
108 + int where, int size, u32 value)
110 + unsigned long flags;
111 + void __iomem *base;
115 + WARN_ON(where & (size - 1));
118 + return PCIBIOS_DEVICE_NOT_FOUND;
120 + base = apc->crp_base;
122 + spin_lock_irqsave(&apc->lock, flags);
123 + data = __raw_readl(base + (where & ~3));
127 + s = ((where & 3) * 8);
128 + data &= ~(0xff << s);
129 + data |= ((value & 0xff) << s);
132 + s = ((where & 2) * 8);
133 + data &= ~(0xffff << s);
134 + data |= ((value & 0xffff) << s);
140 + spin_unlock_irqrestore(&apc->lock, flags);
141 + return PCIBIOS_BAD_REGISTER_NUMBER;
144 + __raw_writel(data, base + (where & ~3));
146 + __raw_readl(base + (where & ~3));
147 + spin_unlock_irqrestore(&apc->lock, flags);
149 + return PCIBIOS_SUCCESSFUL;
152 static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
153 int size, uint32_t *value)
155 @@ -324,6 +377,14 @@ static int ar724x_pci_probe(struct platf
156 if (!apc->devcfg_base)
159 + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "crp_base");
163 + apc->crp_base = devm_request_and_ioremap(&pdev->dev, res);
164 + if (apc->crp_base == NULL)
167 apc->irq = platform_get_irq(pdev, 0);
170 @@ -360,6 +421,8 @@ static int ar724x_pci_probe(struct platf
172 ar724x_pci_irq_init(apc, id);
174 + ar724x_pci_local_write(apc, PCI_COMMAND, 4, AR724X_PCI_CMD_INIT);
176 register_pci_controller(&apc->pci_controller);