1 From 7f8c0c731409b9c3e62fa8a6eb4830ace8568769 Mon Sep 17 00:00:00 2001
2 From: Gabor Juhos <juhosg@openwrt.org>
3 Date: Fri, 15 Feb 2013 13:38:25 +0000
4 Subject: [PATCH] MIPS: ath79: add support for the Qualcomm Atheros AP136-010
7 commit 27ea052acb9eaca98cc90bf1b8738b6d0ea5bc2f upstream.
9 Also enable the board in the default configuration.
11 Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
12 Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
13 Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
14 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
15 Patchwork: http://patchwork.linux-mips.org/patch/4953/
16 Signed-off-by: John Crispin <blogic@openwrt.org>
18 arch/mips/ath79/Kconfig | 12 +++
19 arch/mips/ath79/Makefile | 1 +
20 arch/mips/ath79/mach-ap136.c | 156 +++++++++++++++++++++++++++++++++++++
21 arch/mips/ath79/machtypes.h | 1 +
22 arch/mips/configs/ath79_defconfig | 1 +
23 5 files changed, 171 insertions(+)
24 create mode 100644 arch/mips/ath79/mach-ap136.c
26 --- a/arch/mips/ath79/Kconfig
27 +++ b/arch/mips/ath79/Kconfig
28 @@ -14,6 +14,18 @@ config ATH79_MACH_AP121
29 Say 'Y' here if you want your kernel to support the
30 Atheros AP121 reference board.
32 +config ATH79_MACH_AP136
33 + bool "Atheros AP136 reference board"
35 + select ATH79_DEV_GPIO_BUTTONS
36 + select ATH79_DEV_LEDS_GPIO
37 + select ATH79_DEV_SPI
38 + select ATH79_DEV_USB
39 + select ATH79_DEV_WMAC
41 + Say 'Y' here if you want your kernel to support the
42 + Atheros AP136 reference board.
44 config ATH79_MACH_AP81
45 bool "Atheros AP81 reference board"
47 --- a/arch/mips/ath79/Makefile
48 +++ b/arch/mips/ath79/Makefile
49 @@ -27,6 +27,7 @@ obj-$(CONFIG_ATH79_DEV_WMAC) += dev-wma
52 obj-$(CONFIG_ATH79_MACH_AP121) += mach-ap121.o
53 +obj-$(CONFIG_ATH79_MACH_AP136) += mach-ap136.o
54 obj-$(CONFIG_ATH79_MACH_AP81) += mach-ap81.o
55 obj-$(CONFIG_ATH79_MACH_DB120) += mach-db120.o
56 obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o
58 +++ b/arch/mips/ath79/mach-ap136.c
61 + * Qualcomm Atheros AP136 reference board support
63 + * Copyright (c) 2012 Qualcomm Atheros
64 + * Copyright (c) 2012-2013 Gabor Juhos <juhosg@openwrt.org>
66 + * Permission to use, copy, modify, and/or distribute this software for any
67 + * purpose with or without fee is hereby granted, provided that the above
68 + * copyright notice and this permission notice appear in all copies.
70 + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
71 + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
72 + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
73 + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
74 + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
75 + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
76 + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
80 +#include <linux/pci.h>
81 +#include <linux/ath9k_platform.h>
83 +#include "machtypes.h"
84 +#include "dev-gpio-buttons.h"
85 +#include "dev-leds-gpio.h"
88 +#include "dev-wmac.h"
91 +#define AP136_GPIO_LED_STATUS_RED 14
92 +#define AP136_GPIO_LED_STATUS_GREEN 19
93 +#define AP136_GPIO_LED_USB 4
94 +#define AP136_GPIO_LED_WLAN_2G 13
95 +#define AP136_GPIO_LED_WLAN_5G 12
96 +#define AP136_GPIO_LED_WPS_RED 15
97 +#define AP136_GPIO_LED_WPS_GREEN 20
99 +#define AP136_GPIO_BTN_WPS 16
100 +#define AP136_GPIO_BTN_RFKILL 21
102 +#define AP136_KEYS_POLL_INTERVAL 20 /* msecs */
103 +#define AP136_KEYS_DEBOUNCE_INTERVAL (3 * AP136_KEYS_POLL_INTERVAL)
105 +#define AP136_WMAC_CALDATA_OFFSET 0x1000
106 +#define AP136_PCIE_CALDATA_OFFSET 0x5000
108 +static struct gpio_led ap136_leds_gpio[] __initdata = {
110 + .name = "qca:green:status",
111 + .gpio = AP136_GPIO_LED_STATUS_GREEN,
115 + .name = "qca:red:status",
116 + .gpio = AP136_GPIO_LED_STATUS_RED,
120 + .name = "qca:green:wps",
121 + .gpio = AP136_GPIO_LED_WPS_GREEN,
125 + .name = "qca:red:wps",
126 + .gpio = AP136_GPIO_LED_WPS_RED,
130 + .name = "qca:red:wlan-2g",
131 + .gpio = AP136_GPIO_LED_WLAN_2G,
135 + .name = "qca:red:usb",
136 + .gpio = AP136_GPIO_LED_USB,
141 +static struct gpio_keys_button ap136_gpio_keys[] __initdata = {
143 + .desc = "WPS button",
145 + .code = KEY_WPS_BUTTON,
146 + .debounce_interval = AP136_KEYS_DEBOUNCE_INTERVAL,
147 + .gpio = AP136_GPIO_BTN_WPS,
151 + .desc = "RFKILL button",
153 + .code = KEY_RFKILL,
154 + .debounce_interval = AP136_KEYS_DEBOUNCE_INTERVAL,
155 + .gpio = AP136_GPIO_BTN_RFKILL,
160 +static struct spi_board_info ap136_spi_info[] = {
164 + .max_speed_hz = 25000000,
165 + .modalias = "mx25l6405d",
169 +static struct ath79_spi_platform_data ap136_spi_data = {
171 + .num_chipselect = 1,
175 +static struct ath9k_platform_data ap136_ath9k_data;
177 +static int ap136_pci_plat_dev_init(struct pci_dev *dev)
179 + if (dev->bus->number == 1 && (PCI_SLOT(dev->devfn)) == 0)
180 + dev->dev.platform_data = &ap136_ath9k_data;
185 +static void __init ap136_pci_init(u8 *eeprom)
187 + memcpy(ap136_ath9k_data.eeprom_data, eeprom,
188 + sizeof(ap136_ath9k_data.eeprom_data));
190 + ath79_pci_set_plat_dev_init(ap136_pci_plat_dev_init);
191 + ath79_register_pci();
194 +static inline void ap136_pci_init(void) {}
195 +#endif /* CONFIG_PCI */
197 +static void __init ap136_setup(void)
199 + u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
201 + ath79_register_leds_gpio(-1, ARRAY_SIZE(ap136_leds_gpio),
203 + ath79_register_gpio_keys_polled(-1, AP136_KEYS_POLL_INTERVAL,
204 + ARRAY_SIZE(ap136_gpio_keys),
206 + ath79_register_spi(&ap136_spi_data, ap136_spi_info,
207 + ARRAY_SIZE(ap136_spi_info));
208 + ath79_register_usb();
209 + ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET);
210 + ap136_pci_init(art + AP136_PCIE_CALDATA_OFFSET);
213 +MIPS_MACHINE(ATH79_MACH_AP136_010, "AP136-010",
214 + "Atheros AP136-010 reference board",
216 --- a/arch/mips/ath79/machtypes.h
217 +++ b/arch/mips/ath79/machtypes.h
219 enum ath79_mach_type {
220 ATH79_MACH_GENERIC = 0,
221 ATH79_MACH_AP121, /* Atheros AP121 reference board */
222 + ATH79_MACH_AP136_010, /* Atheros AP136-010 reference board */
223 ATH79_MACH_AP81, /* Atheros AP81 reference board */
224 ATH79_MACH_DB120, /* Atheros DB120 reference board */
225 ATH79_MACH_PB44, /* Atheros PB44 reference board */
226 --- a/arch/mips/configs/ath79_defconfig
227 +++ b/arch/mips/configs/ath79_defconfig
230 CONFIG_ATH79_MACH_AP121=y
231 +CONFIG_ATH79_MACH_AP136=y
232 CONFIG_ATH79_MACH_AP81=y
233 CONFIG_ATH79_MACH_DB120=y
234 CONFIG_ATH79_MACH_PB44=y