1 --- a/arch/mips/ath79/gpio.c
2 +++ b/arch/mips/ath79/gpio.c
3 @@ -186,6 +186,7 @@ static void __iomem *ath79_gpio_get_func
4 reg = AR71XX_GPIO_REG_FUNC;
5 else if (soc_is_ar934x() ||
10 reg = AR934X_GPIO_REG_FUNC;
11 @@ -223,15 +224,30 @@ void __init ath79_gpio_output_select(uns
13 void __iomem *base = ath79_gpio_base;
16 + unsigned int reg, reg_base;
17 + unsigned long gpio_count;
20 - BUG_ON(!soc_is_ar934x() && !soc_is_qca953x() && !soc_is_qca956x());
21 + if (soc_is_ar934x()) {
22 + gpio_count = AR934X_GPIO_COUNT;
23 + reg_base = AR934X_GPIO_REG_OUT_FUNC0;
24 + } else if (soc_is_qca953x()) {
25 + gpio_count = QCA953X_GPIO_COUNT;
26 + reg_base = QCA953X_GPIO_REG_OUT_FUNC0;
27 + } else if (soc_is_qca955x()) {
28 + gpio_count = QCA955X_GPIO_COUNT;
29 + reg_base = QCA955X_GPIO_REG_OUT_FUNC0;
30 + } else if (soc_is_qca956x()) {
31 + gpio_count = QCA956X_GPIO_COUNT;
32 + reg_base = QCA956X_GPIO_REG_OUT_FUNC0;
37 - if (gpio >= AR934X_GPIO_COUNT)
38 + if (gpio >= gpio_count)
41 - reg = AR934X_GPIO_REG_OUT_FUNC0 + 4 * (gpio / 4);
42 + reg = reg_base + 4 * (gpio / 4);
45 spin_lock_irqsave(&ath79_gpio_lock, flags);