1 --- a/arch/mips/Kconfig
2 +++ b/arch/mips/Kconfig
3 @@ -203,7 +203,6 @@ config ATH79
4 select SYS_SUPPORTS_BIG_ENDIAN
5 select SYS_SUPPORTS_MIPS16
6 select SYS_SUPPORTS_ZBOOT_UART_PROM
9 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
11 --- a/arch/mips/ath79/setup.c
12 +++ b/arch/mips/ath79/setup.c
13 @@ -190,16 +190,20 @@ unsigned int get_c0_compare_int(void)
15 void __init plat_mem_setup(void)
18 unsigned long fdt_start;
21 set_io_port_base(KSEG1);
24 /* Get the position of the FDT passed by the bootloader */
25 fdt_start = fw_getenvl("fdt_start");
27 __dt_setup_arch((void *)KSEG0ADDR(fdt_start));
28 else if (fw_passed_dtb)
29 __dt_setup_arch((void *)KSEG0ADDR(fw_passed_dtb));
32 if (mips_machtype != ATH79_MACH_GENERIC_OF) {
33 ath79_reset_base = ioremap_nocache(AR71XX_RESET_BASE,
34 @@ -295,17 +299,21 @@ static int __init ath79_setup(void)
36 arch_initcall(ath79_setup);
39 void __init device_tree_init(void)
41 unflatten_and_copy_device_tree();
45 MIPS_MACHINE(ATH79_MACH_GENERIC,
47 "Generic AR71XX/AR724X/AR913X based board",
51 MIPS_MACHINE(ATH79_MACH_GENERIC_OF,
53 "Generic AR71XX/AR724X/AR913X based board (DT)",
56 --- a/arch/mips/ath79/clock.c
57 +++ b/arch/mips/ath79/clock.c
59 #define AR724X_BASE_FREQ 40000000
61 static struct clk *clks[ATH79_CLK_END];
63 static struct clk_onecell_data clk_data = {
65 .clk_num = ARRAY_SIZE(clks),
69 static struct clk *__init ath79_add_sys_clkdev(
70 const char *id, unsigned long rate)