1 Index: linux-4.4.4/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
2 ===================================================================
3 --- linux-4.4.4.orig/arch/mips/include/asm/mach-ath79/ar71xx_regs.h 2016-03-31 21:43:10.595132564 +0300
4 +++ linux-4.4.4/arch/mips/include/asm/mach-ath79/ar71xx_regs.h 2016-03-31 21:56:21.463152017 +0300
7 #define AR933X_BOOTSTRAP_MDIO_GPIO_EN BIT(18)
8 #define AR933X_BOOTSTRAP_EEPBUSY BIT(4)
9 +#define AR933X_BOOTSTRAP_USB_MODE_HOST BIT(3)
10 #define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0)
12 #define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23)
15 #define QCA956X_BOOTSTRAP_REF_CLK_40 BIT(2)
17 +#define AR933X_USB_CONFIG_HOST_ONLY BIT(8)
19 #define AR934X_PCIE_WMAC_INT_WMAC_MISC BIT(0)
20 #define AR934X_PCIE_WMAC_INT_WMAC_TX BIT(1)
21 #define AR934X_PCIE_WMAC_INT_WMAC_RXLP BIT(2)
22 Index: linux-4.4.4/arch/mips/ath79/dev-usb.c
23 ===================================================================
24 --- linux-4.4.4.orig/arch/mips/ath79/dev-usb.c 2016-03-31 21:43:10.407132560 +0300
25 +++ linux-4.4.4/arch/mips/ath79/dev-usb.c 2016-03-31 21:43:10.707132567 +0300
27 #include <linux/platform_device.h>
28 #include <linux/usb/ehci_pdriver.h>
29 #include <linux/usb/ohci_pdriver.h>
30 +#include <linux/usb/otg.h>
31 +#include <linux/usb/chipidea.h>
32 +#include <linux/usb/usb_phy_generic.h>
34 #include <asm/mach-ath79/ath79.h>
35 #include <asm/mach-ath79/ar71xx_regs.h>
37 &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
40 +static void __init ar933x_usb_setup_ctrl_config(void)
42 + void __iomem *usb_ctrl_base, *usb_config_reg;
45 + usb_ctrl_base = ioremap(AR71XX_USB_CTRL_BASE, AR71XX_USB_CTRL_SIZE);
46 + usb_config_reg = usb_ctrl_base + AR71XX_USB_CTRL_REG_CONFIG;
47 + usb_config = __raw_readl(usb_config_reg);
48 + usb_config &= ~AR933X_USB_CONFIG_HOST_ONLY;
49 + __raw_writel(usb_config, usb_config_reg);
50 + iounmap(usb_ctrl_base);
53 +static void __init ar933x_ci_usb_setup(void)
56 + enum usb_dr_mode dr_mode;
57 + struct ci_hdrc_platform_data ci_pdata;
58 + struct platform_device *phy;
60 + bootstrap = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
61 + if (bootstrap & AR933X_BOOTSTRAP_USB_MODE_HOST) {
62 + dr_mode = USB_DR_MODE_HOST;
64 + dr_mode = USB_DR_MODE_PERIPHERAL;
65 + ar933x_usb_setup_ctrl_config();
68 + memset(&ci_pdata, 0, sizeof(ci_pdata));
69 + ci_pdata.name = "ci_hdrc_ar933x";
70 + ci_pdata.capoffset = DEF_CAPOFFSET;
71 + ci_pdata.dr_mode = dr_mode;
72 + ci_pdata.flags = CI_HDRC_DUAL_ROLE_NOT_OTG | CI_HDRC_DP_ALWAYS_PULLUP;
73 + ci_pdata.vbus_extcon.edev = ERR_PTR(-ENODEV);
74 + ci_pdata.id_extcon.edev = ERR_PTR(-ENODEV);
75 + ci_pdata.itc_setting = 1;
77 + /* register a nop PHY */
78 + phy = usb_phy_generic_register();
82 + ath79_usb_register("ci_hdrc", -1,
83 + AR933X_EHCI_BASE, AR933X_EHCI_SIZE,
85 + &ci_pdata, sizeof(ci_pdata));
88 static void __init ar933x_usb_setup(void)
90 ath79_device_reset_set(AR933X_RESET_USBSUS_OVERRIDE);
92 AR933X_EHCI_BASE, AR933X_EHCI_SIZE,
94 &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
96 + ar933x_ci_usb_setup();
99 static void enable_tx_tx_idp_violation_fix(unsigned base)