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804bf2f22930384c821146146ee6fffd9452ef7e
[openwrt/staging/florian.git] / target / linux / aruba-2.6 / patches / 000-aruba.patch
1 diff -Nur linux-2.6.21.1/arch/mips/Kconfig linux-2.6.21.1-owrt/arch/mips/Kconfig
2 --- linux-2.6.21.1/arch/mips/Kconfig 2007-04-27 23:49:26.000000000 +0200
3 +++ linux-2.6.21.1-owrt/arch/mips/Kconfig 2007-05-23 23:34:01.000000000 +0200
4 @@ -220,6 +220,17 @@
5 <http://www.marvell.com/>. Say Y here if you wish to build a
6 kernel for this platform.
7
8 +config MACH_ARUBA
9 + bool "Support for the ARUBA product line"
10 + select DMA_NONCOHERENT
11 + select CPU_HAS_PREFETCH
12 + select HW_HAS_PCI
13 + select SWAP_IO_SPACE
14 + select SYS_SUPPORTS_32BIT_KERNEL
15 + select SYS_HAS_CPU_MIPS32_R1
16 + select SYS_SUPPORTS_BIG_ENDIAN
17 +
18 +
19 config MACH_JAZZ
20 bool "Jazz family of machines"
21 select ARC
22 diff -Nur linux-2.6.21.1/arch/mips/Makefile linux-2.6.21.1-owrt/arch/mips/Makefile
23 --- linux-2.6.21.1/arch/mips/Makefile 2007-04-27 23:49:26.000000000 +0200
24 +++ linux-2.6.21.1-owrt/arch/mips/Makefile 2007-05-23 23:34:01.000000000 +0200
25 @@ -158,6 +158,14 @@
26 #
27
28 #
29 +# Aruba
30 +#
31 +
32 +core-$(CONFIG_MACH_ARUBA) += arch/mips/aruba/
33 +cflags-$(CONFIG_MACH_ARUBA) += -Iinclude/asm-mips/aruba
34 +load-$(CONFIG_MACH_ARUBA) += 0x80100000
35 +
36 +#
37 # Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
38 #
39 core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
40 diff -Nur linux-2.6.21.1/arch/mips/pci/Makefile linux-2.6.21.1-owrt/arch/mips/pci/Makefile
41 --- linux-2.6.21.1/arch/mips/pci/Makefile 2007-04-27 23:49:26.000000000 +0200
42 +++ linux-2.6.21.1-owrt/arch/mips/pci/Makefile 2007-05-23 23:36:48.000000000 +0200
43 @@ -53,3 +53,4 @@
44 obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o
45 obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o
46 obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o
47 +obj-$(CONFIG_MACH_ARUBA) += fixup-aruba.o ops-aruba.o pci-aruba.o
48 diff -Nur linux-2.6.21.1/drivers/char/watchdog/Makefile linux-2.6.21.1-owrt/drivers/char/watchdog/Makefile
49 --- linux-2.6.21.1/drivers/char/watchdog/Makefile 2007-04-27 23:49:26.000000000 +0200
50 +++ linux-2.6.21.1-owrt/drivers/char/watchdog/Makefile 2007-05-23 23:36:53.000000000 +0200
51 @@ -82,5 +82,8 @@
52
53 # SPARC64 Architecture
54
55 +# Aruba Architecture
56 +obj-$(CONFIG_MACH_ARUBA) += wdt_merlot.o
57 +
58 # Architecture Independant
59 obj-$(CONFIG_SOFT_WATCHDOG) += softdog.o
60 diff -Nur linux-2.6.21.1/drivers/char/watchdog/Makefile.orig linux-2.6.21.1-owrt/drivers/char/watchdog/Makefile.orig
61 --- linux-2.6.21.1/drivers/char/watchdog/Makefile.orig 1970-01-01 01:00:00.000000000 +0100
62 +++ linux-2.6.21.1-owrt/drivers/char/watchdog/Makefile.orig 2007-04-27 23:49:26.000000000 +0200
63 @@ -0,0 +1,86 @@
64 +#
65 +# Makefile for the WatchDog device drivers.
66 +#
67 +
68 +# Only one watchdog can succeed. We probe the ISA/PCI/USB based
69 +# watchdog-cards first, then the architecture specific watchdog
70 +# drivers and then the architecture independant "softdog" driver.
71 +# This means that if your ISA/PCI/USB card isn't detected that
72 +# you can fall back to an architecture specific driver and if
73 +# that also fails then you can fall back to the software watchdog
74 +# to give you some cover.
75 +
76 +# ISA-based Watchdog Cards
77 +obj-$(CONFIG_PCWATCHDOG) += pcwd.o
78 +obj-$(CONFIG_MIXCOMWD) += mixcomwd.o
79 +obj-$(CONFIG_WDT) += wdt.o
80 +
81 +# PCI-based Watchdog Cards
82 +obj-$(CONFIG_PCIPCWATCHDOG) += pcwd_pci.o
83 +obj-$(CONFIG_WDTPCI) += wdt_pci.o
84 +
85 +# USB-based Watchdog Cards
86 +obj-$(CONFIG_USBPCWATCHDOG) += pcwd_usb.o
87 +
88 +# ARM Architecture
89 +obj-$(CONFIG_AT91RM9200_WATCHDOG) += at91rm9200_wdt.o
90 +obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
91 +obj-$(CONFIG_21285_WATCHDOG) += wdt285.o
92 +obj-$(CONFIG_977_WATCHDOG) += wdt977.o
93 +obj-$(CONFIG_IXP2000_WATCHDOG) += ixp2000_wdt.o
94 +obj-$(CONFIG_IXP4XX_WATCHDOG) += ixp4xx_wdt.o
95 +obj-$(CONFIG_S3C2410_WATCHDOG) += s3c2410_wdt.o
96 +obj-$(CONFIG_SA1100_WATCHDOG) += sa1100_wdt.o
97 +obj-$(CONFIG_MPCORE_WATCHDOG) += mpcore_wdt.o
98 +obj-$(CONFIG_EP93XX_WATCHDOG) += ep93xx_wdt.o
99 +obj-$(CONFIG_PNX4008_WATCHDOG) += pnx4008_wdt.o
100 +
101 +# X86 (i386 + ia64 + x86_64) Architecture
102 +obj-$(CONFIG_ACQUIRE_WDT) += acquirewdt.o
103 +obj-$(CONFIG_ADVANTECH_WDT) += advantechwdt.o
104 +obj-$(CONFIG_ALIM1535_WDT) += alim1535_wdt.o
105 +obj-$(CONFIG_ALIM7101_WDT) += alim7101_wdt.o
106 +obj-$(CONFIG_SC520_WDT) += sc520_wdt.o
107 +obj-$(CONFIG_EUROTECH_WDT) += eurotechwdt.o
108 +obj-$(CONFIG_IB700_WDT) += ib700wdt.o
109 +obj-$(CONFIG_IBMASR) += ibmasr.o
110 +obj-$(CONFIG_WAFER_WDT) += wafer5823wdt.o
111 +obj-$(CONFIG_I6300ESB_WDT) += i6300esb.o
112 +obj-$(CONFIG_I8XX_TCO) += i8xx_tco.o
113 +obj-$(CONFIG_ITCO_WDT) += iTCO_wdt.o iTCO_vendor_support.o
114 +obj-$(CONFIG_SC1200_WDT) += sc1200wdt.o
115 +obj-$(CONFIG_SCx200_WDT) += scx200_wdt.o
116 +obj-$(CONFIG_PC87413_WDT) += pc87413_wdt.o
117 +obj-$(CONFIG_60XX_WDT) += sbc60xxwdt.o
118 +obj-$(CONFIG_SBC8360_WDT) += sbc8360.o
119 +obj-$(CONFIG_CPU5_WDT) += cpu5wdt.o
120 +obj-$(CONFIG_SMSC37B787_WDT) += smsc37b787_wdt.o
121 +obj-$(CONFIG_W83627HF_WDT) += w83627hf_wdt.o
122 +obj-$(CONFIG_W83697HF_WDT) += w83697hf_wdt.o
123 +obj-$(CONFIG_W83877F_WDT) += w83877f_wdt.o
124 +obj-$(CONFIG_W83977F_WDT) += w83977f_wdt.o
125 +obj-$(CONFIG_MACHZ_WDT) += machzwd.o
126 +obj-$(CONFIG_SBC_EPX_C3_WATCHDOG) += sbc_epx_c3.o
127 +
128 +# PowerPC Architecture
129 +obj-$(CONFIG_8xx_WDT) += mpc8xx_wdt.o
130 +obj-$(CONFIG_83xx_WDT) += mpc83xx_wdt.o
131 +obj-$(CONFIG_MV64X60_WDT) += mv64x60_wdt.o
132 +obj-$(CONFIG_BOOKE_WDT) += booke_wdt.o
133 +
134 +# PPC64 Architecture
135 +obj-$(CONFIG_WATCHDOG_RTAS) += wdrtas.o
136 +
137 +# MIPS Architecture
138 +obj-$(CONFIG_INDYDOG) += indydog.o
139 +obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o
140 +
141 +# S390 Architecture
142 +
143 +# SUPERH Architecture
144 +obj-$(CONFIG_SH_WDT) += shwdt.o
145 +
146 +# SPARC64 Architecture
147 +
148 +# Architecture Independant
149 +obj-$(CONFIG_SOFT_WATCHDOG) += softdog.o
150 diff -Nur linux-2.6.21.1/drivers/mtd/chips/cfi_probe.c linux-2.6.21.1-owrt/drivers/mtd/chips/cfi_probe.c
151 --- linux-2.6.21.1/drivers/mtd/chips/cfi_probe.c 2007-04-27 23:49:26.000000000 +0200
152 +++ linux-2.6.21.1-owrt/drivers/mtd/chips/cfi_probe.c 2007-05-23 23:36:42.000000000 +0200
153 @@ -25,6 +25,74 @@
154 static void print_cfi_ident(struct cfi_ident *);
155 #endif
156
157 +#if 1
158 +
159 +#define AMD_AUTOSEL_OFF1 0xAAA
160 +#define AMD_AUTOSEL_OFF2 0x555
161 +#define AMD_MANUF_ID 0x1
162 +#define AMD_DEVICE_ID1 0xF6 /* T */
163 +#define AMD_DEVICE_ID2 0xF9 /* B */
164 +/* Foll. are definitions for Macronix Flash Part */
165 +#define MCX_MANUF_ID 0xC2
166 +#define MCX_DEVICE_ID1 0xA7
167 +#define MCX_DEVICE_ID2 0xA8
168 +/* Foll. common to both AMD and Macronix */
169 +#define FACTORY_LOCKED 0x99
170 +#define USER_LOCKED 0x19
171 +
172 +/* NOTE: AP-70/6x use BYTE mode flash access. Therefore the
173 + * lowest Addr. pin in the flash is not A0 but A-1 (A minus 1).
174 + * CPU's A0 is tied to Flash's A-1, A1 to A0 and so on. This
175 + * gives 4MB of byte-addressable mem. In byte mode, all addr
176 + * need to be multiplied by 2 (i.e compared to word mode).
177 + * NOTE: AMD_AUTOSEL_OFF1 and OFF2 are already mult. by 2
178 + * Just blindly use the addr offsets suggested in the manual
179 + * for byte mode and you'll be OK. Offs. in Table 6 need to
180 + * be mult by 2 (for getting autosel params)
181 + */
182 +void
183 +flash_detect(struct map_info *map, __u32 base, struct cfi_private *cfi)
184 +{
185 + map_word val[3];
186 + int osf = cfi->interleave * cfi->device_type; // =2 for AP70/6x
187 + char *manuf, *part, *lock ;
188 +
189 + if (osf != 1) return ;
190 +
191 + cfi_send_gen_cmd(0xAA, AMD_AUTOSEL_OFF1, base, map, cfi, cfi->device_type, NULL);
192 + cfi_send_gen_cmd(0x55, AMD_AUTOSEL_OFF2, base, map, cfi, cfi->device_type, NULL);
193 + cfi_send_gen_cmd(0x90, AMD_AUTOSEL_OFF1, base, map, cfi, cfi->device_type, NULL);
194 + val[0] = map_read(map, base) ; // manuf ID
195 + val[1] = map_read(map, base+2) ; // device ID
196 + val[2] = map_read(map, base+6) ; // lock indicator
197 +#if 0
198 +printk("v1=0x%x v2=0x%x v3=0x%x\n", val[0], val[1], val[2]) ;
199 +#endif
200 + if (val[0].x[0] == AMD_MANUF_ID) {
201 + manuf = "AMD Flash" ;
202 + if (val[1].x[0] == AMD_DEVICE_ID1)
203 + part = "AM29LV320D (Top)" ;
204 + else if (val[1].x[0] == AMD_DEVICE_ID2)
205 + part = "AM29LV320D (Bot)" ;
206 + else part = "Unknown" ;
207 + } else if (val[0].x[0] == MCX_MANUF_ID) {
208 + manuf = "Macronix Flash" ;
209 + if (val[1].x[0] == MCX_DEVICE_ID1)
210 + part = "MX29LV320A (Top)" ;
211 + else if (val[1].x[0] == MCX_DEVICE_ID2)
212 + part = "MX29LV320A (Bot)" ;
213 + else part = "Unknown" ;
214 + } else
215 + return ;
216 + if (val[2].x[0] == FACTORY_LOCKED)
217 + lock = "Factory Locked" ;
218 + else if (val[2].x[0] == USER_LOCKED)
219 + lock = "User Locked" ;
220 + else lock = "Unknown locking" ;
221 + printk("%s %s (%s)\n", manuf, part, lock) ;
222 +}
223 +#endif
224 +
225 static int cfi_probe_chip(struct map_info *map, __u32 base,
226 unsigned long *chip_map, struct cfi_private *cfi);
227 static int cfi_chip_setup(struct map_info *map, struct cfi_private *cfi);
228 @@ -117,6 +185,10 @@
229 }
230
231 xip_disable();
232 +#if 1
233 + //cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL);
234 + flash_detect(map, base, cfi) ;
235 +#endif
236 cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL);
237 cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL);
238 cfi_send_gen_cmd(0x98, 0x55, base, map, cfi, cfi->device_type, NULL);
239 diff -Nur linux-2.6.21.1/drivers/mtd/chips/cfi_probe.c.orig linux-2.6.21.1-owrt/drivers/mtd/chips/cfi_probe.c.orig
240 --- linux-2.6.21.1/drivers/mtd/chips/cfi_probe.c.orig 1970-01-01 01:00:00.000000000 +0100
241 +++ linux-2.6.21.1-owrt/drivers/mtd/chips/cfi_probe.c.orig 2007-04-27 23:49:26.000000000 +0200
242 @@ -0,0 +1,444 @@
243 +/*
244 + Common Flash Interface probe code.
245 + (C) 2000 Red Hat. GPL'd.
246 + $Id: cfi_probe.c,v 1.86 2005/11/29 14:48:31 gleixner Exp $
247 +*/
248 +
249 +#include <linux/module.h>
250 +#include <linux/types.h>
251 +#include <linux/kernel.h>
252 +#include <linux/init.h>
253 +#include <asm/io.h>
254 +#include <asm/byteorder.h>
255 +#include <linux/errno.h>
256 +#include <linux/slab.h>
257 +#include <linux/interrupt.h>
258 +
259 +#include <linux/mtd/xip.h>
260 +#include <linux/mtd/map.h>
261 +#include <linux/mtd/cfi.h>
262 +#include <linux/mtd/gen_probe.h>
263 +
264 +//#define DEBUG_CFI
265 +
266 +#ifdef DEBUG_CFI
267 +static void print_cfi_ident(struct cfi_ident *);
268 +#endif
269 +
270 +static int cfi_probe_chip(struct map_info *map, __u32 base,
271 + unsigned long *chip_map, struct cfi_private *cfi);
272 +static int cfi_chip_setup(struct map_info *map, struct cfi_private *cfi);
273 +
274 +struct mtd_info *cfi_probe(struct map_info *map);
275 +
276 +#ifdef CONFIG_MTD_XIP
277 +
278 +/* only needed for short periods, so this is rather simple */
279 +#define xip_disable() local_irq_disable()
280 +
281 +#define xip_allowed(base, map) \
282 +do { \
283 + (void) map_read(map, base); \
284 + asm volatile (".rep 8; nop; .endr"); \
285 + local_irq_enable(); \
286 +} while (0)
287 +
288 +#define xip_enable(base, map, cfi) \
289 +do { \
290 + cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL); \
291 + cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL); \
292 + xip_allowed(base, map); \
293 +} while (0)
294 +
295 +#define xip_disable_qry(base, map, cfi) \
296 +do { \
297 + xip_disable(); \
298 + cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL); \
299 + cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL); \
300 + cfi_send_gen_cmd(0x98, 0x55, base, map, cfi, cfi->device_type, NULL); \
301 +} while (0)
302 +
303 +#else
304 +
305 +#define xip_disable() do { } while (0)
306 +#define xip_allowed(base, map) do { } while (0)
307 +#define xip_enable(base, map, cfi) do { } while (0)
308 +#define xip_disable_qry(base, map, cfi) do { } while (0)
309 +
310 +#endif
311 +
312 +/* check for QRY.
313 + in: interleave,type,mode
314 + ret: table index, <0 for error
315 + */
316 +static int __xipram qry_present(struct map_info *map, __u32 base,
317 + struct cfi_private *cfi)
318 +{
319 + int osf = cfi->interleave * cfi->device_type; // scale factor
320 + map_word val[3];
321 + map_word qry[3];
322 +
323 + qry[0] = cfi_build_cmd('Q', map, cfi);
324 + qry[1] = cfi_build_cmd('R', map, cfi);
325 + qry[2] = cfi_build_cmd('Y', map, cfi);
326 +
327 + val[0] = map_read(map, base + osf*0x10);
328 + val[1] = map_read(map, base + osf*0x11);
329 + val[2] = map_read(map, base + osf*0x12);
330 +
331 + if (!map_word_equal(map, qry[0], val[0]))
332 + return 0;
333 +
334 + if (!map_word_equal(map, qry[1], val[1]))
335 + return 0;
336 +
337 + if (!map_word_equal(map, qry[2], val[2]))
338 + return 0;
339 +
340 + return 1; // "QRY" found
341 +}
342 +
343 +static int __xipram cfi_probe_chip(struct map_info *map, __u32 base,
344 + unsigned long *chip_map, struct cfi_private *cfi)
345 +{
346 + int i;
347 +
348 + if ((base + 0) >= map->size) {
349 + printk(KERN_NOTICE
350 + "Probe at base[0x00](0x%08lx) past the end of the map(0x%08lx)\n",
351 + (unsigned long)base, map->size -1);
352 + return 0;
353 + }
354 + if ((base + 0xff) >= map->size) {
355 + printk(KERN_NOTICE
356 + "Probe at base[0x55](0x%08lx) past the end of the map(0x%08lx)\n",
357 + (unsigned long)base + 0x55, map->size -1);
358 + return 0;
359 + }
360 +
361 + xip_disable();
362 + cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL);
363 + cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL);
364 + cfi_send_gen_cmd(0x98, 0x55, base, map, cfi, cfi->device_type, NULL);
365 +
366 + if (!qry_present(map,base,cfi)) {
367 + xip_enable(base, map, cfi);
368 + return 0;
369 + }
370 +
371 + if (!cfi->numchips) {
372 + /* This is the first time we're called. Set up the CFI
373 + stuff accordingly and return */
374 + return cfi_chip_setup(map, cfi);
375 + }
376 +
377 + /* Check each previous chip to see if it's an alias */
378 + for (i=0; i < (base >> cfi->chipshift); i++) {
379 + unsigned long start;
380 + if(!test_bit(i, chip_map)) {
381 + /* Skip location; no valid chip at this address */
382 + continue;
383 + }
384 + start = i << cfi->chipshift;
385 + /* This chip should be in read mode if it's one
386 + we've already touched. */
387 + if (qry_present(map, start, cfi)) {
388 + /* Eep. This chip also had the QRY marker.
389 + * Is it an alias for the new one? */
390 + cfi_send_gen_cmd(0xF0, 0, start, map, cfi, cfi->device_type, NULL);
391 + cfi_send_gen_cmd(0xFF, 0, start, map, cfi, cfi->device_type, NULL);
392 +
393 + /* If the QRY marker goes away, it's an alias */
394 + if (!qry_present(map, start, cfi)) {
395 + xip_allowed(base, map);
396 + printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
397 + map->name, base, start);
398 + return 0;
399 + }
400 + /* Yes, it's actually got QRY for data. Most
401 + * unfortunate. Stick the new chip in read mode
402 + * too and if it's the same, assume it's an alias. */
403 + /* FIXME: Use other modes to do a proper check */
404 + cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL);
405 + cfi_send_gen_cmd(0xFF, 0, start, map, cfi, cfi->device_type, NULL);
406 +
407 + if (qry_present(map, base, cfi)) {
408 + xip_allowed(base, map);
409 + printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
410 + map->name, base, start);
411 + return 0;
412 + }
413 + }
414 + }
415 +
416 + /* OK, if we got to here, then none of the previous chips appear to
417 + be aliases for the current one. */
418 + set_bit((base >> cfi->chipshift), chip_map); /* Update chip map */
419 + cfi->numchips++;
420 +
421 + /* Put it back into Read Mode */
422 + cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL);
423 + cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL);
424 + xip_allowed(base, map);
425 +
426 + printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n",
427 + map->name, cfi->interleave, cfi->device_type*8, base,
428 + map->bankwidth*8);
429 +
430 + return 1;
431 +}
432 +
433 +static int __xipram cfi_chip_setup(struct map_info *map,
434 + struct cfi_private *cfi)
435 +{
436 + int ofs_factor = cfi->interleave*cfi->device_type;
437 + __u32 base = 0;
438 + int num_erase_regions = cfi_read_query(map, base + (0x10 + 28)*ofs_factor);
439 + int i;
440 +
441 + xip_enable(base, map, cfi);
442 +#ifdef DEBUG_CFI
443 + printk("Number of erase regions: %d\n", num_erase_regions);
444 +#endif
445 + if (!num_erase_regions)
446 + return 0;
447 +
448 + cfi->cfiq = kmalloc(sizeof(struct cfi_ident) + num_erase_regions * 4, GFP_KERNEL);
449 + if (!cfi->cfiq) {
450 + printk(KERN_WARNING "%s: kmalloc failed for CFI ident structure\n", map->name);
451 + return 0;
452 + }
453 +
454 + memset(cfi->cfiq,0,sizeof(struct cfi_ident));
455 +
456 + cfi->cfi_mode = CFI_MODE_CFI;
457 +
458 + /* Read the CFI info structure */
459 + xip_disable_qry(base, map, cfi);
460 + for (i=0; i<(sizeof(struct cfi_ident) + num_erase_regions * 4); i++)
461 + ((unsigned char *)cfi->cfiq)[i] = cfi_read_query(map,base + (0x10 + i)*ofs_factor);
462 +
463 + /* Note we put the device back into Read Mode BEFORE going into Auto
464 + * Select Mode, as some devices support nesting of modes, others
465 + * don't. This way should always work.
466 + * On cmdset 0001 the writes of 0xaa and 0x55 are not needed, and
467 + * so should be treated as nops or illegal (and so put the device
468 + * back into Read Mode, which is a nop in this case).
469 + */
470 + cfi_send_gen_cmd(0xf0, 0, base, map, cfi, cfi->device_type, NULL);
471 + cfi_send_gen_cmd(0xaa, 0x555, base, map, cfi, cfi->device_type, NULL);
472 + cfi_send_gen_cmd(0x55, 0x2aa, base, map, cfi, cfi->device_type, NULL);
473 + cfi_send_gen_cmd(0x90, 0x555, base, map, cfi, cfi->device_type, NULL);
474 + cfi->mfr = cfi_read_query16(map, base);
475 + cfi->id = cfi_read_query16(map, base + ofs_factor);
476 +
477 + /* Put it back into Read Mode */
478 + cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL);
479 + /* ... even if it's an Intel chip */
480 + cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL);
481 + xip_allowed(base, map);
482 +
483 + /* Do any necessary byteswapping */
484 + cfi->cfiq->P_ID = le16_to_cpu(cfi->cfiq->P_ID);
485 +
486 + cfi->cfiq->P_ADR = le16_to_cpu(cfi->cfiq->P_ADR);
487 + cfi->cfiq->A_ID = le16_to_cpu(cfi->cfiq->A_ID);
488 + cfi->cfiq->A_ADR = le16_to_cpu(cfi->cfiq->A_ADR);
489 + cfi->cfiq->InterfaceDesc = le16_to_cpu(cfi->cfiq->InterfaceDesc);
490 + cfi->cfiq->MaxBufWriteSize = le16_to_cpu(cfi->cfiq->MaxBufWriteSize);
491 +
492 +#ifdef DEBUG_CFI
493 + /* Dump the information therein */
494 + print_cfi_ident(cfi->cfiq);
495 +#endif
496 +
497 + for (i=0; i<cfi->cfiq->NumEraseRegions; i++) {
498 + cfi->cfiq->EraseRegionInfo[i] = le32_to_cpu(cfi->cfiq->EraseRegionInfo[i]);
499 +
500 +#ifdef DEBUG_CFI
501 + printk(" Erase Region #%d: BlockSize 0x%4.4X bytes, %d blocks\n",
502 + i, (cfi->cfiq->EraseRegionInfo[i] >> 8) & ~0xff,
503 + (cfi->cfiq->EraseRegionInfo[i] & 0xffff) + 1);
504 +#endif
505 + }
506 +
507 + printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n",
508 + map->name, cfi->interleave, cfi->device_type*8, base,
509 + map->bankwidth*8);
510 +
511 + return 1;
512 +}
513 +
514 +#ifdef DEBUG_CFI
515 +static char *vendorname(__u16 vendor)
516 +{
517 + switch (vendor) {
518 + case P_ID_NONE:
519 + return "None";
520 +
521 + case P_ID_INTEL_EXT:
522 + return "Intel/Sharp Extended";
523 +
524 + case P_ID_AMD_STD:
525 + return "AMD/Fujitsu Standard";
526 +
527 + case P_ID_INTEL_STD:
528 + return "Intel/Sharp Standard";
529 +
530 + case P_ID_AMD_EXT:
531 + return "AMD/Fujitsu Extended";
532 +
533 + case P_ID_WINBOND:
534 + return "Winbond Standard";
535 +
536 + case P_ID_ST_ADV:
537 + return "ST Advanced";
538 +
539 + case P_ID_MITSUBISHI_STD:
540 + return "Mitsubishi Standard";
541 +
542 + case P_ID_MITSUBISHI_EXT:
543 + return "Mitsubishi Extended";
544 +
545 + case P_ID_SST_PAGE:
546 + return "SST Page Write";
547 +
548 + case P_ID_INTEL_PERFORMANCE:
549 + return "Intel Performance Code";
550 +
551 + case P_ID_INTEL_DATA:
552 + return "Intel Data";
553 +
554 + case P_ID_RESERVED:
555 + return "Not Allowed / Reserved for Future Use";
556 +
557 + default:
558 + return "Unknown";
559 + }
560 +}
561 +
562 +
563 +static void print_cfi_ident(struct cfi_ident *cfip)
564 +{
565 +#if 0
566 + if (cfip->qry[0] != 'Q' || cfip->qry[1] != 'R' || cfip->qry[2] != 'Y') {
567 + printk("Invalid CFI ident structure.\n");
568 + return;
569 + }
570 +#endif
571 + printk("Primary Vendor Command Set: %4.4X (%s)\n", cfip->P_ID, vendorname(cfip->P_ID));
572 + if (cfip->P_ADR)
573 + printk("Primary Algorithm Table at %4.4X\n", cfip->P_ADR);
574 + else
575 + printk("No Primary Algorithm Table\n");
576 +
577 + printk("Alternative Vendor Command Set: %4.4X (%s)\n", cfip->A_ID, vendorname(cfip->A_ID));
578 + if (cfip->A_ADR)
579 + printk("Alternate Algorithm Table at %4.4X\n", cfip->A_ADR);
580 + else
581 + printk("No Alternate Algorithm Table\n");
582 +
583 +
584 + printk("Vcc Minimum: %2d.%d V\n", cfip->VccMin >> 4, cfip->VccMin & 0xf);
585 + printk("Vcc Maximum: %2d.%d V\n", cfip->VccMax >> 4, cfip->VccMax & 0xf);
586 + if (cfip->VppMin) {
587 + printk("Vpp Minimum: %2d.%d V\n", cfip->VppMin >> 4, cfip->VppMin & 0xf);
588 + printk("Vpp Maximum: %2d.%d V\n", cfip->VppMax >> 4, cfip->VppMax & 0xf);
589 + }
590 + else
591 + printk("No Vpp line\n");
592 +
593 + printk("Typical byte/word write timeout: %d µs\n", 1<<cfip->WordWriteTimeoutTyp);
594 + printk("Maximum byte/word write timeout: %d µs\n", (1<<cfip->WordWriteTimeoutMax) * (1<<cfip->WordWriteTimeoutTyp));
595 +
596 + if (cfip->BufWriteTimeoutTyp || cfip->BufWriteTimeoutMax) {
597 + printk("Typical full buffer write timeout: %d µs\n", 1<<cfip->BufWriteTimeoutTyp);
598 + printk("Maximum full buffer write timeout: %d µs\n", (1<<cfip->BufWriteTimeoutMax) * (1<<cfip->BufWriteTimeoutTyp));
599 + }
600 + else
601 + printk("Full buffer write not supported\n");
602 +
603 + printk("Typical block erase timeout: %d ms\n", 1<<cfip->BlockEraseTimeoutTyp);
604 + printk("Maximum block erase timeout: %d ms\n", (1<<cfip->BlockEraseTimeoutMax) * (1<<cfip->BlockEraseTimeoutTyp));
605 + if (cfip->ChipEraseTimeoutTyp || cfip->ChipEraseTimeoutMax) {
606 + printk("Typical chip erase timeout: %d ms\n", 1<<cfip->ChipEraseTimeoutTyp);
607 + printk("Maximum chip erase timeout: %d ms\n", (1<<cfip->ChipEraseTimeoutMax) * (1<<cfip->ChipEraseTimeoutTyp));
608 + }
609 + else
610 + printk("Chip erase not supported\n");
611 +
612 + printk("Device size: 0x%X bytes (%d MiB)\n", 1 << cfip->DevSize, 1<< (cfip->DevSize - 20));
613 + printk("Flash Device Interface description: 0x%4.4X\n", cfip->InterfaceDesc);
614 + switch(cfip->InterfaceDesc) {
615 + case 0:
616 + printk(" - x8-only asynchronous interface\n");
617 + break;
618 +
619 + case 1:
620 + printk(" - x16-only asynchronous interface\n");
621 + break;
622 +
623 + case 2:
624 + printk(" - supports x8 and x16 via BYTE# with asynchronous interface\n");
625 + break;
626 +
627 + case 3:
628 + printk(" - x32-only asynchronous interface\n");
629 + break;
630 +
631 + case 4:
632 + printk(" - supports x16 and x32 via Word# with asynchronous interface\n");
633 + break;
634 +
635 + case 65535:
636 + printk(" - Not Allowed / Reserved\n");
637 + break;
638 +
639 + default:
640 + printk(" - Unknown\n");
641 + break;
642 + }
643 +
644 + printk("Max. bytes in buffer write: 0x%x\n", 1<< cfip->MaxBufWriteSize);
645 + printk("Number of Erase Block Regions: %d\n", cfip->NumEraseRegions);
646 +
647 +}
648 +#endif /* DEBUG_CFI */
649 +
650 +static struct chip_probe cfi_chip_probe = {
651 + .name = "CFI",
652 + .probe_chip = cfi_probe_chip
653 +};
654 +
655 +struct mtd_info *cfi_probe(struct map_info *map)
656 +{
657 + /*
658 + * Just use the generic probe stuff to call our CFI-specific
659 + * chip_probe routine in all the possible permutations, etc.
660 + */
661 + return mtd_do_chip_probe(map, &cfi_chip_probe);
662 +}
663 +
664 +static struct mtd_chip_driver cfi_chipdrv = {
665 + .probe = cfi_probe,
666 + .name = "cfi_probe",
667 + .module = THIS_MODULE
668 +};
669 +
670 +static int __init cfi_probe_init(void)
671 +{
672 + register_mtd_chip_driver(&cfi_chipdrv);
673 + return 0;
674 +}
675 +
676 +static void __exit cfi_probe_exit(void)
677 +{
678 + unregister_mtd_chip_driver(&cfi_chipdrv);
679 +}
680 +
681 +module_init(cfi_probe_init);
682 +module_exit(cfi_probe_exit);
683 +
684 +MODULE_LICENSE("GPL");
685 +MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org> et al.");
686 +MODULE_DESCRIPTION("Probe code for CFI-compliant flash chips");
687 diff -Nur linux-2.6.21.1/drivers/net/Kconfig linux-2.6.21.1-owrt/drivers/net/Kconfig
688 --- linux-2.6.21.1/drivers/net/Kconfig 2007-04-27 23:49:26.000000000 +0200
689 +++ linux-2.6.21.1-owrt/drivers/net/Kconfig 2007-05-23 23:37:01.000000000 +0200
690 @@ -201,6 +201,19 @@
691
692 source "drivers/net/arm/Kconfig"
693
694 +config AR2313
695 + tristate "AR2313 Ethernet support"
696 + depends on NET_ETHERNET && MACH_ARUBA
697 + help
698 + Support for the AR2313 Ethernet part on Aruba AP60/61
699 +
700 +config IDT_RC32434_ETH
701 + tristate "IDT RC32434 Local Ethernet support"
702 + depends on NET_ETHERNET
703 + help
704 + IDT RC32434 has one local ethernet port. Say Y here to enable it.
705 + To compile this driver as a module, choose M here.
706 +
707 config MACE
708 tristate "MACE (Power Mac ethernet) support"
709 depends on NET_ETHERNET && PPC_PMAC && PPC32
710 diff -Nur linux-2.6.21.1/drivers/net/Kconfig.orig linux-2.6.21.1-owrt/drivers/net/Kconfig.orig
711 --- linux-2.6.21.1/drivers/net/Kconfig.orig 1970-01-01 01:00:00.000000000 +0100
712 +++ linux-2.6.21.1-owrt/drivers/net/Kconfig.orig 2007-05-23 23:34:01.000000000 +0200
713 @@ -0,0 +1,2952 @@
714 +
715 +#
716 +# Network device configuration
717 +#
718 +
719 +menu "Network device support"
720 + depends on NET
721 +
722 +config NETDEVICES
723 + default y if UML
724 + bool "Network device support"
725 + ---help---
726 + You can say N here if you don't intend to connect your Linux box to
727 + any other computer at all.
728 +
729 + You'll have to say Y if your computer contains a network card that
730 + you want to use under Linux. If you are going to run SLIP or PPP over
731 + telephone line or null modem cable you need say Y here. Connecting
732 + two machines with parallel ports using PLIP needs this, as well as
733 + AX.25/KISS for sending Internet traffic over amateur radio links.
734 +
735 + See also "The Linux Network Administrator's Guide" by Olaf Kirch and
736 + Terry Dawson. Available at <http://www.tldp.org/guides.html>.
737 +
738 + If unsure, say Y.
739 +
740 +# All the following symbols are dependent on NETDEVICES - do not repeat
741 +# that for each of the symbols.
742 +if NETDEVICES
743 +
744 +config IFB
745 + tristate "Intermediate Functional Block support"
746 + depends on NET_CLS_ACT
747 + ---help---
748 + This is an intermediate driver that allows sharing of
749 + resources.
750 + To compile this driver as a module, choose M here: the module
751 + will be called ifb. If you want to use more than one ifb
752 + device at a time, you need to compile this driver as a module.
753 + Instead of 'ifb', the devices will then be called 'ifb0',
754 + 'ifb1' etc.
755 + Look at the iproute2 documentation directory for usage etc
756 +
757 +config DUMMY
758 + tristate "Dummy net driver support"
759 + ---help---
760 + This is essentially a bit-bucket device (i.e. traffic you send to
761 + this device is consigned into oblivion) with a configurable IP
762 + address. It is most commonly used in order to make your currently
763 + inactive SLIP address seem like a real address for local programs.
764 + If you use SLIP or PPP, you might want to say Y here. Since this
765 + thing often comes in handy, the default is Y. It won't enlarge your
766 + kernel either. What a deal. Read about it in the Network
767 + Administrator's Guide, available from
768 + <http://www.tldp.org/docs.html#guide>.
769 +
770 + To compile this driver as a module, choose M here: the module
771 + will be called dummy. If you want to use more than one dummy
772 + device at a time, you need to compile this driver as a module.
773 + Instead of 'dummy', the devices will then be called 'dummy0',
774 + 'dummy1' etc.
775 +
776 +config BONDING
777 + tristate "Bonding driver support"
778 + depends on INET
779 + ---help---
780 + Say 'Y' or 'M' if you wish to be able to 'bond' multiple Ethernet
781 + Channels together. This is called 'Etherchannel' by Cisco,
782 + 'Trunking' by Sun, 802.3ad by the IEEE, and 'Bonding' in Linux.
783 +
784 + The driver supports multiple bonding modes to allow for both high
785 + performance and high availability operation.
786 +
787 + Refer to <file:Documentation/networking/bonding.txt> for more
788 + information.
789 +
790 + To compile this driver as a module, choose M here: the module
791 + will be called bonding.
792 +
793 +config EQUALIZER
794 + tristate "EQL (serial line load balancing) support"
795 + ---help---
796 + If you have two serial connections to some other computer (this
797 + usually requires two modems and two telephone lines) and you use
798 + SLIP (the protocol for sending Internet traffic over telephone
799 + lines) or PPP (a better SLIP) on them, you can make them behave like
800 + one double speed connection using this driver. Naturally, this has
801 + to be supported at the other end as well, either with a similar EQL
802 + Linux driver or with a Livingston Portmaster 2e.
803 +
804 + Say Y if you want this and read
805 + <file:Documentation/networking/eql.txt>. You may also want to read
806 + section 6.2 of the NET-3-HOWTO, available from
807 + <http://www.tldp.org/docs.html#howto>.
808 +
809 + To compile this driver as a module, choose M here: the module
810 + will be called eql. If unsure, say N.
811 +
812 +config TUN
813 + tristate "Universal TUN/TAP device driver support"
814 + select CRC32
815 + ---help---
816 + TUN/TAP provides packet reception and transmission for user space
817 + programs. It can be viewed as a simple Point-to-Point or Ethernet
818 + device, which instead of receiving packets from a physical media,
819 + receives them from user space program and instead of sending packets
820 + via physical media writes them to the user space program.
821 +
822 + When a program opens /dev/net/tun, driver creates and registers
823 + corresponding net device tunX or tapX. After a program closed above
824 + devices, driver will automatically delete tunXX or tapXX device and
825 + all routes corresponding to it.
826 +
827 + Please read <file:Documentation/networking/tuntap.txt> for more
828 + information.
829 +
830 + To compile this driver as a module, choose M here: the module
831 + will be called tun.
832 +
833 + If you don't know what to use this for, you don't need it.
834 +
835 +config NET_SB1000
836 + tristate "General Instruments Surfboard 1000"
837 + depends on PNP
838 + ---help---
839 + This is a driver for the General Instrument (also known as
840 + NextLevel) SURFboard 1000 internal
841 + cable modem. This is an ISA card which is used by a number of cable
842 + TV companies to provide cable modem access. It's a one-way
843 + downstream-only cable modem, meaning that your upstream net link is
844 + provided by your regular phone modem.
845 +
846 + At present this driver only compiles as a module, so say M here if
847 + you have this card. The module will be called sb1000. Then read
848 + <file:Documentation/networking/README.sb1000> for information on how
849 + to use this module, as it needs special ppp scripts for establishing
850 + a connection. Further documentation and the necessary scripts can be
851 + found at:
852 +
853 + <http://www.jacksonville.net/~fventuri/>
854 + <http://home.adelphia.net/~siglercm/sb1000.html>
855 + <http://linuxpower.cx/~cable/>
856 +
857 + If you don't have this card, of course say N.
858 +
859 +source "drivers/net/arcnet/Kconfig"
860 +
861 +source "drivers/net/phy/Kconfig"
862 +
863 +#
864 +# Ethernet
865 +#
866 +
867 +menu "Ethernet (10 or 100Mbit)"
868 + depends on !UML
869 +
870 +config NET_ETHERNET
871 + bool "Ethernet (10 or 100Mbit)"
872 + ---help---
873 + Ethernet (also called IEEE 802.3 or ISO 8802-2) is the most common
874 + type of Local Area Network (LAN) in universities and companies.
875 +
876 + Common varieties of Ethernet are: 10BASE-2 or Thinnet (10 Mbps over
877 + coaxial cable, linking computers in a chain), 10BASE-T or twisted
878 + pair (10 Mbps over twisted pair cable, linking computers to central
879 + hubs), 10BASE-F (10 Mbps over optical fiber links, using hubs),
880 + 100BASE-TX (100 Mbps over two twisted pair cables, using hubs),
881 + 100BASE-T4 (100 Mbps over 4 standard voice-grade twisted pair
882 + cables, using hubs), 100BASE-FX (100 Mbps over optical fiber links)
883 + [the 100BASE varieties are also known as Fast Ethernet], and Gigabit
884 + Ethernet (1 Gbps over optical fiber or short copper links).
885 +
886 + If your Linux machine will be connected to an Ethernet and you have
887 + an Ethernet network interface card (NIC) installed in your computer,
888 + say Y here and read the Ethernet-HOWTO, available from
889 + <http://www.tldp.org/docs.html#howto>. You will then also have
890 + to say Y to the driver for your particular NIC.
891 +
892 + Note that the answer to this question won't directly affect the
893 + kernel: saying N will just cause the configurator to skip all
894 + the questions about Ethernet network cards. If unsure, say N.
895 +
896 +config MII
897 + tristate "Generic Media Independent Interface device support"
898 + depends on NET_ETHERNET
899 + help
900 + Most ethernet controllers have MII transceiver either as an external
901 + or internal device. It is safe to say Y or M here even if your
902 + ethernet card lack MII.
903 +
904 +config MACB
905 + tristate "Atmel MACB support"
906 + depends on NET_ETHERNET && (AVR32 || ARCH_AT91SAM9260 || ARCH_AT91SAM9263)
907 + select MII
908 + help
909 + The Atmel MACB ethernet interface is found on many AT32 and AT91
910 + parts. Say Y to include support for the MACB chip.
911 +
912 + To compile this driver as a module, choose M here: the module
913 + will be called macb.
914 +
915 +source "drivers/net/arm/Kconfig"
916 +
917 +config IDT_RC32434_ETH
918 + tristate "IDT RC32434 Local Ethernet support"
919 + depends on NET_ETHERNET
920 + help
921 + IDT RC32434 has one local ethernet port. Say Y here to enable it.
922 + To compile this driver as a module, choose M here.
923 +
924 +config MACE
925 + tristate "MACE (Power Mac ethernet) support"
926 + depends on NET_ETHERNET && PPC_PMAC && PPC32
927 + select CRC32
928 + help
929 + Power Macintoshes and clones with Ethernet built-in on the
930 + motherboard will usually use a MACE (Medium Access Control for
931 + Ethernet) interface. Say Y to include support for the MACE chip.
932 +
933 + To compile this driver as a module, choose M here: the module
934 + will be called mace.
935 +
936 +config MACE_AAUI_PORT
937 + bool "Use AAUI port instead of TP by default"
938 + depends on MACE
939 + help
940 + Some Apple machines (notably the Apple Network Server) which use the
941 + MACE ethernet chip have an Apple AUI port (small 15-pin connector),
942 + instead of an 8-pin RJ45 connector for twisted-pair ethernet. Say
943 + Y here if you have such a machine. If unsure, say N.
944 + The driver will default to AAUI on ANS anyway, and if you use it as
945 + a module, you can provide the port_aaui=0|1 to force the driver.
946 +
947 +config BMAC
948 + tristate "BMAC (G3 ethernet) support"
949 + depends on NET_ETHERNET && PPC_PMAC && PPC32
950 + select CRC32
951 + help
952 + Say Y for support of BMAC Ethernet interfaces. These are used on G3
953 + computers.
954 +
955 + To compile this driver as a module, choose M here: the module
956 + will be called bmac.
957 +
958 +config ARIADNE
959 + tristate "Ariadne support"
960 + depends on NET_ETHERNET && ZORRO
961 + help
962 + If you have a Village Tronic Ariadne Ethernet adapter, say Y.
963 + Otherwise, say N.
964 +
965 + To compile this driver as a module, choose M here: the module
966 + will be called ariadne.
967 +
968 +config A2065
969 + tristate "A2065 support"
970 + depends on NET_ETHERNET && ZORRO
971 + select CRC32
972 + help
973 + If you have a Commodore A2065 Ethernet adapter, say Y. Otherwise,
974 + say N.
975 +
976 + To compile this driver as a module, choose M here: the module
977 + will be called a2065.
978 +
979 +config HYDRA
980 + tristate "Hydra support"
981 + depends on NET_ETHERNET && ZORRO
982 + select CRC32
983 + help
984 + If you have a Hydra Ethernet adapter, say Y. Otherwise, say N.
985 +
986 + To compile this driver as a module, choose M here: the module
987 + will be called hydra.
988 +
989 +config ZORRO8390
990 + tristate "Zorro NS8390-based Ethernet support"
991 + depends on NET_ETHERNET && ZORRO
992 + select CRC32
993 + help
994 + This driver is for Zorro Ethernet cards using an NS8390-compatible
995 + chipset, like the Village Tronic Ariadne II and the Individual
996 + Computers X-Surf Ethernet cards. If you have such a card, say Y.
997 + Otherwise, say N.
998 +
999 + To compile this driver as a module, choose M here: the module
1000 + will be called zorro8390.
1001 +
1002 +config APNE
1003 + tristate "PCMCIA NE2000 support"
1004 + depends on NET_ETHERNET && AMIGA_PCMCIA
1005 + select CRC32
1006 + help
1007 + If you have a PCMCIA NE2000 compatible adapter, say Y. Otherwise,
1008 + say N.
1009 +
1010 + To compile this driver as a module, choose M here: the module
1011 + will be called apne.
1012 +
1013 +config APOLLO_ELPLUS
1014 + tristate "Apollo 3c505 support"
1015 + depends on NET_ETHERNET && APOLLO
1016 + help
1017 + Say Y or M here if your Apollo has a 3Com 3c505 ISA Ethernet card.
1018 + If you don't have one made for Apollos, you can use one from a PC,
1019 + except that your Apollo won't be able to boot from it (because the
1020 + code in the ROM will be for a PC).
1021 +
1022 +config MAC8390
1023 + bool "Macintosh NS 8390 based ethernet cards"
1024 + depends on NET_ETHERNET && MAC
1025 + select CRC32
1026 + help
1027 + If you want to include a driver to support Nubus or LC-PDS
1028 + Ethernet cards using an NS8390 chipset or its equivalent, say Y
1029 + and read the Ethernet-HOWTO, available from
1030 + <http://www.tldp.org/docs.html#howto>.
1031 +
1032 +config MAC89x0
1033 + tristate "Macintosh CS89x0 based ethernet cards"
1034 + depends on NET_ETHERNET && MAC && BROKEN
1035 + ---help---
1036 + Support for CS89x0 chipset based Ethernet cards. If you have a
1037 + Nubus or LC-PDS network (Ethernet) card of this type, say Y and
1038 + read the Ethernet-HOWTO, available from
1039 + <http://www.tldp.org/docs.html#howto>.
1040 +
1041 + To compile this driver as a module, choose M here and read
1042 + <file:Documentation/networking/net-modules.txt>. This module will
1043 + be called mac89x0.
1044 +
1045 +config MACSONIC
1046 + tristate "Macintosh SONIC based ethernet (onboard, NuBus, LC, CS)"
1047 + depends on NET_ETHERNET && MAC
1048 + ---help---
1049 + Support for NatSemi SONIC based Ethernet devices. This includes
1050 + the onboard Ethernet in many Quadras as well as some LC-PDS,
1051 + a few Nubus and all known Comm Slot Ethernet cards. If you have
1052 + one of these say Y and read the Ethernet-HOWTO, available from
1053 + <http://www.tldp.org/docs.html#howto>.
1054 +
1055 + To compile this driver as a module, choose M here and read
1056 + <file:Documentation/networking/net-modules.txt>. This module will
1057 + be called macsonic.
1058 +
1059 +config MACMACE
1060 + bool "Macintosh (AV) onboard MACE ethernet (EXPERIMENTAL)"
1061 + depends on NET_ETHERNET && MAC && EXPERIMENTAL
1062 + select CRC32
1063 + help
1064 + Support for the onboard AMD 79C940 MACE Ethernet controller used in
1065 + the 660AV and 840AV Macintosh. If you have one of these Macintoshes
1066 + say Y and read the Ethernet-HOWTO, available from
1067 + <http://www.tldp.org/docs.html#howto>.
1068 +
1069 +config MVME147_NET
1070 + tristate "MVME147 (Lance) Ethernet support"
1071 + depends on NET_ETHERNET && MVME147
1072 + select CRC32
1073 + help
1074 + Support for the on-board Ethernet interface on the Motorola MVME147
1075 + single-board computer. Say Y here to include the
1076 + driver for this chip in your kernel.
1077 + To compile this driver as a module, choose M here.
1078 +
1079 +config MVME16x_NET
1080 + tristate "MVME16x Ethernet support"
1081 + depends on NET_ETHERNET && MVME16x
1082 + help
1083 + This is the driver for the Ethernet interface on the Motorola
1084 + MVME162, 166, 167, 172 and 177 boards. Say Y here to include the
1085 + driver for this chip in your kernel.
1086 + To compile this driver as a module, choose M here.
1087 +
1088 +config BVME6000_NET
1089 + tristate "BVME6000 Ethernet support"
1090 + depends on NET_ETHERNET && BVME6000
1091 + help
1092 + This is the driver for the Ethernet interface on BVME4000 and
1093 + BVME6000 VME boards. Say Y here to include the driver for this chip
1094 + in your kernel.
1095 + To compile this driver as a module, choose M here.
1096 +
1097 +config ATARILANCE
1098 + tristate "Atari Lance support"
1099 + depends on NET_ETHERNET && ATARI
1100 + help
1101 + Say Y to include support for several Atari Ethernet adapters based
1102 + on the AMD Lance chipset: RieblCard (with or without battery), or
1103 + PAMCard VME (also the version by Rhotron, with different addresses).
1104 +
1105 +config ATARI_BIONET
1106 + tristate "BioNet-100 support"
1107 + depends on NET_ETHERNET && ATARI && ATARI_ACSI && BROKEN
1108 + help
1109 + Say Y to include support for BioData's BioNet-100 Ethernet adapter
1110 + for the ACSI port. The driver works (has to work...) with a polled
1111 + I/O scheme, so it's rather slow :-(
1112 +
1113 +config ATARI_PAMSNET
1114 + tristate "PAMsNet support"
1115 + depends on NET_ETHERNET && ATARI && ATARI_ACSI && BROKEN
1116 + help
1117 + Say Y to include support for the PAMsNet Ethernet adapter for the
1118 + ACSI port ("ACSI node"). The driver works (has to work...) with a
1119 + polled I/O scheme, so it's rather slow :-(
1120 +
1121 +config SUN3LANCE
1122 + tristate "Sun3/Sun3x on-board LANCE support"
1123 + depends on NET_ETHERNET && (SUN3 || SUN3X)
1124 + help
1125 + Most Sun3 and Sun3x motherboards (including the 3/50, 3/60 and 3/80)
1126 + featured an AMD Lance 10Mbit Ethernet controller on board; say Y
1127 + here to compile in the Linux driver for this and enable Ethernet.
1128 + General Linux information on the Sun 3 and 3x series (now
1129 + discontinued) is at
1130 + <http://www.angelfire.com/ca2/tech68k/sun3.html>.
1131 +
1132 + If you're not building a kernel for a Sun 3, say N.
1133 +
1134 +config SUN3_82586
1135 + bool "Sun3 on-board Intel 82586 support"
1136 + depends on NET_ETHERNET && SUN3
1137 + help
1138 + This driver enables support for the on-board Intel 82586 based
1139 + Ethernet adapter found on Sun 3/1xx and 3/2xx motherboards. Note
1140 + that this driver does not support 82586-based adapters on additional
1141 + VME boards.
1142 +
1143 +config HPLANCE
1144 + bool "HP on-board LANCE support"
1145 + depends on NET_ETHERNET && DIO
1146 + select CRC32
1147 + help
1148 + If you want to use the builtin "LANCE" Ethernet controller on an
1149 + HP300 machine, say Y here.
1150 +
1151 +config LASI_82596
1152 + tristate "Lasi ethernet"
1153 + depends on NET_ETHERNET && GSC
1154 + help
1155 + Say Y here to support the builtin Intel 82596 ethernet controller
1156 + found in Hewlett-Packard PA-RISC machines with 10Mbit ethernet.
1157 +
1158 +config MIPS_JAZZ_SONIC
1159 + tristate "MIPS JAZZ onboard SONIC Ethernet support"
1160 + depends on NET_ETHERNET && MACH_JAZZ
1161 + help
1162 + This is the driver for the onboard card of MIPS Magnum 4000,
1163 + Acer PICA, Olivetti M700-10 and a few other identical OEM systems.
1164 +
1165 +config MIPS_AU1X00_ENET
1166 + bool "MIPS AU1000 Ethernet support"
1167 + depends on NET_ETHERNET && SOC_AU1X00
1168 + select PHYLIB
1169 + select CRC32
1170 + help
1171 + If you have an Alchemy Semi AU1X00 based system
1172 + say Y. Otherwise, say N.
1173 +
1174 +config NET_SB1250_MAC
1175 + tristate "SB1250 Ethernet support"
1176 + depends on NET_ETHERNET && SIBYTE_SB1xxx_SOC
1177 +
1178 +config SGI_IOC3_ETH
1179 + bool "SGI IOC3 Ethernet"
1180 + depends on NET_ETHERNET && PCI && SGI_IP27
1181 + select CRC32
1182 + select MII
1183 + help
1184 + If you have a network (Ethernet) card of this type, say Y and read
1185 + the Ethernet-HOWTO, available from
1186 + <http://www.tldp.org/docs.html#howto>.
1187 +
1188 +config SGI_IOC3_ETH_HW_RX_CSUM
1189 + bool "Receive hardware checksums"
1190 + depends on SGI_IOC3_ETH && INET
1191 + default y
1192 + help
1193 + The SGI IOC3 network adapter supports TCP and UDP checksums in
1194 + hardware to offload processing of these checksums from the CPU. At
1195 + the moment only acceleration of IPv4 is supported. This option
1196 + enables offloading for checksums on receive. If unsure, say Y.
1197 +
1198 +config SGI_IOC3_ETH_HW_TX_CSUM
1199 + bool "Transmit hardware checksums"
1200 + depends on SGI_IOC3_ETH && INET
1201 + default y
1202 + help
1203 + The SGI IOC3 network adapter supports TCP and UDP checksums in
1204 + hardware to offload processing of these checksums from the CPU. At
1205 + the moment only acceleration of IPv4 is supported. This option
1206 + enables offloading for checksums on transmit. If unsure, say Y.
1207 +
1208 +config MIPS_SIM_NET
1209 + tristate "MIPS simulator Network device (EXPERIMENTAL)"
1210 + depends on MIPS_SIM && EXPERIMENTAL
1211 + help
1212 + The MIPSNET device is a simple Ethernet network device which is
1213 + emulated by the MIPS Simulator.
1214 + If you are not using a MIPSsim or are unsure, say N.
1215 +
1216 +config SGI_O2MACE_ETH
1217 + tristate "SGI O2 MACE Fast Ethernet support"
1218 + depends on NET_ETHERNET && SGI_IP32=y
1219 +
1220 +config STNIC
1221 + tristate "National DP83902AV support"
1222 + depends on NET_ETHERNET && SUPERH
1223 + select CRC32
1224 + help
1225 + Support for cards based on the National Semiconductor DP83902AV
1226 + ST-NIC Serial Network Interface Controller for Twisted Pair. This
1227 + is a 10Mbit/sec Ethernet controller. Product overview and specs at
1228 + <http://www.national.com/pf/DP/DP83902A.html>.
1229 +
1230 + If unsure, say N.
1231 +
1232 +config SUNLANCE
1233 + tristate "Sun LANCE support"
1234 + depends on NET_ETHERNET && SBUS
1235 + select CRC32
1236 + help
1237 + This driver supports the "le" interface present on all 32-bit Sparc
1238 + systems, on some older Ultra systems and as an Sbus option. These
1239 + cards are based on the AMD Lance chipset, which is better known
1240 + via the NE2100 cards.
1241 +
1242 + To compile this driver as a module, choose M here: the module
1243 + will be called sunlance.
1244 +
1245 +config HAPPYMEAL
1246 + tristate "Sun Happy Meal 10/100baseT support"
1247 + depends on NET_ETHERNET && (SBUS || PCI)
1248 + select CRC32
1249 + help
1250 + This driver supports the "hme" interface present on most Ultra
1251 + systems and as an option on older Sbus systems. This driver supports
1252 + both PCI and Sbus devices. This driver also supports the "qfe" quad
1253 + 100baseT device available in both PCI and Sbus configurations.
1254 +
1255 + To compile this driver as a module, choose M here: the module
1256 + will be called sunhme.
1257 +
1258 +config SUNBMAC
1259 + tristate "Sun BigMAC 10/100baseT support (EXPERIMENTAL)"
1260 + depends on NET_ETHERNET && SBUS && EXPERIMENTAL
1261 + select CRC32
1262 + help
1263 + This driver supports the "be" interface available as an Sbus option.
1264 + This is Sun's older 100baseT Ethernet device.
1265 +
1266 + To compile this driver as a module, choose M here: the module
1267 + will be called sunbmac.
1268 +
1269 +config SUNQE
1270 + tristate "Sun QuadEthernet support"
1271 + depends on NET_ETHERNET && SBUS
1272 + select CRC32
1273 + help
1274 + This driver supports the "qe" 10baseT Ethernet device, available as
1275 + an Sbus option. Note that this is not the same as Quad FastEthernet
1276 + "qfe" which is supported by the Happy Meal driver instead.
1277 +
1278 + To compile this driver as a module, choose M here: the module
1279 + will be called sunqe.
1280 +
1281 +config SUNGEM
1282 + tristate "Sun GEM support"
1283 + depends on NET_ETHERNET && PCI
1284 + select CRC32
1285 + help
1286 + Support for the Sun GEM chip, aka Sun GigabitEthernet/P 2.0. See also
1287 + <http://www.sun.com/products-n-solutions/hardware/docs/pdf/806-3985-10.pdf>.
1288 +
1289 +config CASSINI
1290 + tristate "Sun Cassini support"
1291 + depends on NET_ETHERNET && PCI
1292 + select CRC32
1293 + help
1294 + Support for the Sun Cassini chip, aka Sun GigaSwift Ethernet. See also
1295 + <http://www.sun.com/products-n-solutions/hardware/docs/pdf/817-4341-10.pdf>
1296 +
1297 +config NET_VENDOR_3COM
1298 + bool "3COM cards"
1299 + depends on NET_ETHERNET && (ISA || EISA || MCA || PCI)
1300 + help
1301 + If you have a network (Ethernet) card belonging to this class, say Y
1302 + and read the Ethernet-HOWTO, available from
1303 + <http://www.tldp.org/docs.html#howto>.
1304 +
1305 + Note that the answer to this question doesn't directly affect the
1306 + kernel: saying N will just cause the configurator to skip all
1307 + the questions about 3COM cards. If you say Y, you will be asked for
1308 + your specific card in the following questions.
1309 +
1310 +config EL1
1311 + tristate "3c501 \"EtherLink\" support"
1312 + depends on NET_VENDOR_3COM && ISA
1313 + ---help---
1314 + If you have a network (Ethernet) card of this type, say Y and read
1315 + the Ethernet-HOWTO, available from
1316 + <http://www.tldp.org/docs.html#howto>. Also, consider buying a
1317 + new card, since the 3c501 is slow, broken, and obsolete: you will
1318 + have problems. Some people suggest to ping ("man ping") a nearby
1319 + machine every minute ("man cron") when using this card.
1320 +
1321 + To compile this driver as a module, choose M here and read
1322 + <file:Documentation/networking/net-modules.txt>. The module
1323 + will be called 3c501.
1324 +
1325 +config EL2
1326 + tristate "3c503 \"EtherLink II\" support"
1327 + depends on NET_VENDOR_3COM && ISA
1328 + select CRC32
1329 + help
1330 + If you have a network (Ethernet) card of this type, say Y and read
1331 + the Ethernet-HOWTO, available from
1332 + <http://www.tldp.org/docs.html#howto>.
1333 +
1334 + To compile this driver as a module, choose M here and read
1335 + <file:Documentation/networking/net-modules.txt>. The module
1336 + will be called 3c503.
1337 +
1338 +config ELPLUS
1339 + tristate "3c505 \"EtherLink Plus\" support"
1340 + depends on NET_VENDOR_3COM && ISA && ISA_DMA_API
1341 + ---help---
1342 + Information about this network (Ethernet) card can be found in
1343 + <file:Documentation/networking/3c505.txt>. If you have a card of
1344 + this type, say Y and read the Ethernet-HOWTO, available from
1345 + <http://www.tldp.org/docs.html#howto>.
1346 +
1347 + To compile this driver as a module, choose M here and read
1348 + <file:Documentation/networking/net-modules.txt>. The module
1349 + will be called 3c505.
1350 +
1351 +config EL16
1352 + tristate "3c507 \"EtherLink 16\" support (EXPERIMENTAL)"
1353 + depends on NET_VENDOR_3COM && ISA && EXPERIMENTAL
1354 + help
1355 + If you have a network (Ethernet) card of this type, say Y and read
1356 + the Ethernet-HOWTO, available from
1357 + <http://www.tldp.org/docs.html#howto>.
1358 +
1359 + To compile this driver as a module, choose M here and read
1360 + <file:Documentation/networking/net-modules.txt>. The module
1361 + will be called 3c507.
1362 +
1363 +config EL3
1364 + tristate "3c509/3c529 (MCA)/3c579 \"EtherLink III\" support"
1365 + depends on NET_VENDOR_3COM && (ISA || EISA || MCA)
1366 + ---help---
1367 + If you have a network (Ethernet) card belonging to the 3Com
1368 + EtherLinkIII series, say Y and read the Ethernet-HOWTO, available
1369 + from <http://www.tldp.org/docs.html#howto>.
1370 +
1371 + If your card is not working you may need to use the DOS
1372 + setup disk to disable Plug & Play mode, and to select the default
1373 + media type.
1374 +
1375 + To compile this driver as a module, choose M here and read
1376 + <file:Documentation/networking/net-modules.txt>. The module
1377 + will be called 3c509.
1378 +
1379 +config 3C515
1380 + tristate "3c515 ISA \"Fast EtherLink\""
1381 + depends on NET_VENDOR_3COM && (ISA || EISA) && ISA_DMA_API
1382 + help
1383 + If you have a 3Com ISA EtherLink XL "Corkscrew" 3c515 Fast Ethernet
1384 + network card, say Y and read the Ethernet-HOWTO, available from
1385 + <http://www.tldp.org/docs.html#howto>.
1386 +
1387 + To compile this driver as a module, choose M here and read
1388 + <file:Documentation/networking/net-modules.txt>. The module
1389 + will be called 3c515.
1390 +
1391 +config ELMC
1392 + tristate "3c523 \"EtherLink/MC\" support"
1393 + depends on NET_VENDOR_3COM && MCA_LEGACY
1394 + help
1395 + If you have a network (Ethernet) card of this type, say Y and read
1396 + the Ethernet-HOWTO, available from
1397 + <http://www.tldp.org/docs.html#howto>.
1398 +
1399 + To compile this driver as a module, choose M here and read
1400 + <file:Documentation/networking/net-modules.txt>. The module
1401 + will be called 3c523.
1402 +
1403 +config ELMC_II
1404 + tristate "3c527 \"EtherLink/MC 32\" support (EXPERIMENTAL)"
1405 + depends on NET_VENDOR_3COM && MCA && MCA_LEGACY
1406 + help
1407 + If you have a network (Ethernet) card of this type, say Y and read
1408 + the Ethernet-HOWTO, available from
1409 + <http://www.tldp.org/docs.html#howto>.
1410 +
1411 + To compile this driver as a module, choose M here and read
1412 + <file:Documentation/networking/net-modules.txt>. The module
1413 + will be called 3c527.
1414 +
1415 +config VORTEX
1416 + tristate "3c590/3c900 series (592/595/597) \"Vortex/Boomerang\" support"
1417 + depends on NET_VENDOR_3COM && (PCI || EISA)
1418 + select MII
1419 + ---help---
1420 + This option enables driver support for a large number of 10Mbps and
1421 + 10/100Mbps EISA, PCI and PCMCIA 3Com network cards:
1422 +
1423 + "Vortex" (Fast EtherLink 3c590/3c592/3c595/3c597) EISA and PCI
1424 + "Boomerang" (EtherLink XL 3c900 or 3c905) PCI
1425 + "Cyclone" (3c540/3c900/3c905/3c980/3c575/3c656) PCI and Cardbus
1426 + "Tornado" (3c905) PCI
1427 + "Hurricane" (3c555/3cSOHO) PCI
1428 +
1429 + If you have such a card, say Y and read the Ethernet-HOWTO,
1430 + available from <http://www.tldp.org/docs.html#howto>. More
1431 + specific information is in
1432 + <file:Documentation/networking/vortex.txt> and in the comments at
1433 + the beginning of <file:drivers/net/3c59x.c>.
1434 +
1435 + To compile this support as a module, choose M here and read
1436 + <file:Documentation/networking/net-modules.txt>.
1437 +
1438 +config TYPHOON
1439 + tristate "3cr990 series \"Typhoon\" support"
1440 + depends on NET_VENDOR_3COM && PCI
1441 + select CRC32
1442 + ---help---
1443 + This option enables driver support for the 3cr990 series of cards:
1444 +
1445 + 3C990-TX, 3CR990-TX-95, 3CR990-TX-97, 3CR990-FX-95, 3CR990-FX-97,
1446 + 3CR990SVR, 3CR990SVR95, 3CR990SVR97, 3CR990-FX-95 Server,
1447 + 3CR990-FX-97 Server, 3C990B-TX-M, 3C990BSVR
1448 +
1449 + If you have a network (Ethernet) card of this type, say Y and read
1450 + the Ethernet-HOWTO, available from
1451 + <http://www.tldp.org/docs.html#howto>.
1452 +
1453 + To compile this driver as a module, choose M here and read
1454 + <file:Documentation/networking/net-modules.txt>. The module
1455 + will be called typhoon.
1456 +
1457 +config LANCE
1458 + tristate "AMD LANCE and PCnet (AT1500 and NE2100) support"
1459 + depends on NET_ETHERNET && ISA && ISA_DMA_API
1460 + help
1461 + If you have a network (Ethernet) card of this type, say Y and read
1462 + the Ethernet-HOWTO, available from
1463 + <http://www.tldp.org/docs.html#howto>. Some LinkSys cards are
1464 + of this type.
1465 +
1466 + To compile this driver as a module, choose M here: the module
1467 + will be called lance. This is recommended.
1468 +
1469 +config NET_VENDOR_SMC
1470 + bool "Western Digital/SMC cards"
1471 + depends on NET_ETHERNET && (ISA || MCA || EISA || MAC)
1472 + help
1473 + If you have a network (Ethernet) card belonging to this class, say Y
1474 + and read the Ethernet-HOWTO, available from
1475 + <http://www.tldp.org/docs.html#howto>.
1476 +
1477 + Note that the answer to this question doesn't directly affect the
1478 + kernel: saying N will just cause the configurator to skip all
1479 + the questions about Western Digital cards. If you say Y, you will be
1480 + asked for your specific card in the following questions.
1481 +
1482 +config WD80x3
1483 + tristate "WD80*3 support"
1484 + depends on NET_VENDOR_SMC && ISA
1485 + select CRC32
1486 + help
1487 + If you have a network (Ethernet) card of this type, say Y and read
1488 + the Ethernet-HOWTO, available from
1489 + <http://www.tldp.org/docs.html#howto>.
1490 +
1491 + To compile this driver as a module, choose M here and read
1492 + <file:Documentation/networking/net-modules.txt>. The module
1493 + will be called wd.
1494 +
1495 +config ULTRAMCA
1496 + tristate "SMC Ultra MCA support"
1497 + depends on NET_VENDOR_SMC && MCA
1498 + select CRC32
1499 + help
1500 + If you have a network (Ethernet) card of this type and are running
1501 + an MCA based system (PS/2), say Y and read the Ethernet-HOWTO,
1502 + available from <http://www.tldp.org/docs.html#howto>.
1503 +
1504 + To compile this driver as a module, choose M here and read
1505 + <file:Documentation/networking/net-modules.txt>. The module
1506 + will be called smc-mca.
1507 +
1508 +config ULTRA
1509 + tristate "SMC Ultra support"
1510 + depends on NET_VENDOR_SMC && ISA
1511 + select CRC32
1512 + ---help---
1513 + If you have a network (Ethernet) card of this type, say Y and read
1514 + the Ethernet-HOWTO, available from
1515 + <http://www.tldp.org/docs.html#howto>.
1516 +
1517 + Important: There have been many reports that, with some motherboards
1518 + mixing an SMC Ultra and an Adaptec AHA154x SCSI card (or compatible,
1519 + such as some BusLogic models) causes corruption problems with many
1520 + operating systems. The Linux smc-ultra driver has a work-around for
1521 + this but keep it in mind if you have such a SCSI card and have
1522 + problems.
1523 +
1524 + To compile this driver as a module, choose M here and read
1525 + <file:Documentation/networking/net-modules.txt>. The module
1526 + will be called smc-ultra.
1527 +
1528 +config ULTRA32
1529 + tristate "SMC Ultra32 EISA support"
1530 + depends on NET_VENDOR_SMC && EISA
1531 + select CRC32
1532 + help
1533 + If you have a network (Ethernet) card of this type, say Y and read
1534 + the Ethernet-HOWTO, available from
1535 + <http://www.tldp.org/docs.html#howto>.
1536 +
1537 + To compile this driver as a module, choose M here and read
1538 + <file:Documentation/networking/net-modules.txt>. The module
1539 + will be called smc-ultra32.
1540 +
1541 +config SMC91X
1542 + tristate "SMC 91C9x/91C1xxx support"
1543 + select CRC32
1544 + select MII
1545 + depends on NET_ETHERNET && (ARM || REDWOOD_5 || REDWOOD_6 || M32R || SUPERH || SOC_AU1X00)
1546 + help
1547 + This is a driver for SMC's 91x series of Ethernet chipsets,
1548 + including the SMC91C94 and the SMC91C111. Say Y if you want it
1549 + compiled into the kernel, and read the file
1550 + <file:Documentation/networking/smc9.txt> and the Ethernet-HOWTO,
1551 + available from <http://www.linuxdoc.org/docs.html#howto>.
1552 +
1553 + This driver is also available as a module ( = code which can be
1554 + inserted in and removed from the running kernel whenever you want).
1555 + The module will be called smc91x. If you want to compile it as a
1556 + module, say M here and read <file:Documentation/modules.txt> as well
1557 + as <file:Documentation/networking/net-modules.txt>.
1558 +
1559 +config SMC9194
1560 + tristate "SMC 9194 support"
1561 + depends on NET_VENDOR_SMC && (ISA || MAC && BROKEN)
1562 + select CRC32
1563 + ---help---
1564 + This is support for the SMC9xxx based Ethernet cards. Choose this
1565 + option if you have a DELL laptop with the docking station, or
1566 + another SMC9192/9194 based chipset. Say Y if you want it compiled
1567 + into the kernel, and read the file
1568 + <file:Documentation/networking/smc9.txt> and the Ethernet-HOWTO,
1569 + available from <http://www.tldp.org/docs.html#howto>.
1570 +
1571 + To compile this driver as a module, choose M here and read
1572 + <file:Documentation/networking/net-modules.txt>. The module
1573 + will be called smc9194.
1574 +
1575 +config NET_NETX
1576 + tristate "NetX Ethernet support"
1577 + select MII
1578 + depends on NET_ETHERNET && ARCH_NETX
1579 + help
1580 + This is support for the Hilscher netX builtin Ethernet ports
1581 +
1582 + To compile this driver as a module, choose M here and read
1583 + <file:Documentation/networking/net-modules.txt>. The module
1584 + will be called netx-eth.
1585 +
1586 +config DM9000
1587 + tristate "DM9000 support"
1588 + depends on (ARM || MIPS) && NET_ETHERNET
1589 + select CRC32
1590 + select MII
1591 + ---help---
1592 + Support for DM9000 chipset.
1593 +
1594 + To compile this driver as a module, choose M here and read
1595 + <file:Documentation/networking/net-modules.txt>. The module will be
1596 + called dm9000.
1597 +
1598 +config SMC911X
1599 + tristate "SMSC LAN911[5678] support"
1600 + select CRC32
1601 + select MII
1602 + depends on NET_ETHERNET && ARCH_PXA
1603 + help
1604 + This is a driver for SMSC's LAN911x series of Ethernet chipsets
1605 + including the new LAN9115, LAN9116, LAN9117, and LAN9118.
1606 + Say Y if you want it compiled into the kernel,
1607 + and read the Ethernet-HOWTO, available from
1608 + <http://www.linuxdoc.org/docs.html#howto>.
1609 +
1610 + This driver is also available as a module. The module will be
1611 + called smc911x. If you want to compile it as a module, say M
1612 + here and read <file:Documentation/modules.txt>
1613 +
1614 +config NET_VENDOR_RACAL
1615 + bool "Racal-Interlan (Micom) NI cards"
1616 + depends on NET_ETHERNET && ISA
1617 + help
1618 + If you have a network (Ethernet) card belonging to this class, such
1619 + as the NI5010, NI5210 or NI6210, say Y and read the Ethernet-HOWTO,
1620 + available from <http://www.tldp.org/docs.html#howto>.
1621 +
1622 + Note that the answer to this question doesn't directly affect the
1623 + kernel: saying N will just cause the configurator to skip all
1624 + the questions about NI cards. If you say Y, you will be asked for
1625 + your specific card in the following questions.
1626 +
1627 +config NI5010
1628 + tristate "NI5010 support (EXPERIMENTAL)"
1629 + depends on NET_VENDOR_RACAL && ISA && EXPERIMENTAL && BROKEN_ON_SMP
1630 + ---help---
1631 + If you have a network (Ethernet) card of this type, say Y and read
1632 + the Ethernet-HOWTO, available from
1633 + <http://www.tldp.org/docs.html#howto>. Note that this is still
1634 + experimental code.
1635 +
1636 + To compile this driver as a module, choose M here and read
1637 + <file:Documentation/networking/net-modules.txt>. The module
1638 + will be called ni5010.
1639 +
1640 +config NI52
1641 + tristate "NI5210 support"
1642 + depends on NET_VENDOR_RACAL && ISA
1643 + help
1644 + If you have a network (Ethernet) card of this type, say Y and read
1645 + the Ethernet-HOWTO, available from
1646 + <http://www.tldp.org/docs.html#howto>.
1647 +
1648 + To compile this driver as a module, choose M here and read
1649 + <file:Documentation/networking/net-modules.txt>. The module
1650 + will be called ni52.
1651 +
1652 +config NI65
1653 + tristate "NI6510 support"
1654 + depends on NET_VENDOR_RACAL && ISA && ISA_DMA_API
1655 + help
1656 + If you have a network (Ethernet) card of this type, say Y and read
1657 + the Ethernet-HOWTO, available from
1658 + <http://www.tldp.org/docs.html#howto>.
1659 +
1660 + To compile this driver as a module, choose M here and read
1661 + <file:Documentation/networking/net-modules.txt>. The module
1662 + will be called ni65.
1663 +
1664 +source "drivers/net/tulip/Kconfig"
1665 +
1666 +config AT1700
1667 + tristate "AT1700/1720 support (EXPERIMENTAL)"
1668 + depends on NET_ETHERNET && (ISA || MCA_LEGACY) && EXPERIMENTAL
1669 + select CRC32
1670 + ---help---
1671 + If you have a network (Ethernet) card of this type, say Y and read
1672 + the Ethernet-HOWTO, available from
1673 + <http://www.tldp.org/docs.html#howto>.
1674 +
1675 + To compile this driver as a module, choose M here and read
1676 + <file:Documentation/networking/net-modules.txt>. The module
1677 + will be called at1700.
1678 +
1679 +config DEPCA
1680 + tristate "DEPCA, DE10x, DE200, DE201, DE202, DE422 support"
1681 + depends on NET_ETHERNET && (ISA || EISA || MCA)
1682 + select CRC32
1683 + ---help---
1684 + If you have a network (Ethernet) card of this type, say Y and read
1685 + the Ethernet-HOWTO, available from
1686 + <http://www.tldp.org/docs.html#howto> as well as
1687 + <file:drivers/net/depca.c>.
1688 +
1689 + To compile this driver as a module, choose M here and read
1690 + <file:Documentation/networking/net-modules.txt>. The module
1691 + will be called depca.
1692 +
1693 +config HP100
1694 + tristate "HP 10/100VG PCLAN (ISA, EISA, PCI) support"
1695 + depends on NET_ETHERNET && (ISA || EISA || PCI)
1696 + help
1697 + If you have a network (Ethernet) card of this type, say Y and read
1698 + the Ethernet-HOWTO, available from
1699 + <http://www.tldp.org/docs.html#howto>.
1700 +
1701 + To compile this driver as a module, choose M here and read
1702 + <file:Documentation/networking/net-modules.txt>. The module
1703 + will be called hp100.
1704 +
1705 +config NET_ISA
1706 + bool "Other ISA cards"
1707 + depends on NET_ETHERNET && ISA
1708 + ---help---
1709 + If your network (Ethernet) card hasn't been mentioned yet and its
1710 + bus system (that's the way the cards talks to the other components
1711 + of your computer) is ISA (as opposed to EISA, VLB or PCI), say Y.
1712 + Make sure you know the name of your card. Read the Ethernet-HOWTO,
1713 + available from <http://www.tldp.org/docs.html#howto>.
1714 +
1715 + If unsure, say Y.
1716 +
1717 + Note that the answer to this question doesn't directly affect the
1718 + kernel: saying N will just cause the configurator to skip all
1719 + the remaining ISA network card questions. If you say Y, you will be
1720 + asked for your specific card in the following questions.
1721 +
1722 +config E2100
1723 + tristate "Cabletron E21xx support"
1724 + depends on NET_ISA
1725 + select CRC32
1726 + help
1727 + If you have a network (Ethernet) card of this type, say Y and read
1728 + the Ethernet-HOWTO, available from
1729 + <http://www.tldp.org/docs.html#howto>.
1730 +
1731 + To compile this driver as a module, choose M here and read
1732 + <file:Documentation/networking/net-modules.txt>. The module
1733 + will be called e2100.
1734 +
1735 +config EWRK3
1736 + tristate "EtherWORKS 3 (DE203, DE204, DE205) support"
1737 + depends on NET_ISA
1738 + select CRC32
1739 + ---help---
1740 + This driver supports the DE203, DE204 and DE205 network (Ethernet)
1741 + cards. If this is for you, say Y and read
1742 + <file:Documentation/networking/ewrk3.txt> in the kernel source as
1743 + well as the Ethernet-HOWTO, available from
1744 + <http://www.tldp.org/docs.html#howto>.
1745 +
1746 + To compile this driver as a module, choose M here and read
1747 + <file:Documentation/networking/net-modules.txt>. The module
1748 + will be called ewrk3.
1749 +
1750 +config EEXPRESS
1751 + tristate "EtherExpress 16 support"
1752 + depends on NET_ISA
1753 + ---help---
1754 + If you have an EtherExpress16 network (Ethernet) card, say Y and
1755 + read the Ethernet-HOWTO, available from
1756 + <http://www.tldp.org/docs.html#howto>. Note that the Intel
1757 + EtherExpress16 card used to be regarded as a very poor choice
1758 + because the driver was very unreliable. We now have a new driver
1759 + that should do better.
1760 +
1761 + To compile this driver as a module, choose M here and read
1762 + <file:Documentation/networking/net-modules.txt>. The module
1763 + will be called eexpress.
1764 +
1765 +config EEXPRESS_PRO
1766 + tristate "EtherExpressPro support/EtherExpress 10 (i82595) support"
1767 + depends on NET_ISA
1768 + ---help---
1769 + If you have a network (Ethernet) card of this type, say Y. This
1770 + driver supports Intel i82595{FX,TX} based boards. Note however
1771 + that the EtherExpress PRO/100 Ethernet card has its own separate
1772 + driver. Please read the Ethernet-HOWTO, available from
1773 + <http://www.tldp.org/docs.html#howto>.
1774 +
1775 + To compile this driver as a module, choose M here and read
1776 + <file:Documentation/networking/net-modules.txt>. The module
1777 + will be called eepro.
1778 +
1779 +config HPLAN_PLUS
1780 + tristate "HP PCLAN+ (27247B and 27252A) support"
1781 + depends on NET_ISA
1782 + select CRC32
1783 + help
1784 + If you have a network (Ethernet) card of this type, say Y and read
1785 + the Ethernet-HOWTO, available from
1786 + <http://www.tldp.org/docs.html#howto>.
1787 +
1788 + To compile this driver as a module, choose M here and read
1789 + <file:Documentation/networking/net-modules.txt>. The module
1790 + will be called hp-plus.
1791 +
1792 +config HPLAN
1793 + tristate "HP PCLAN (27245 and other 27xxx series) support"
1794 + depends on NET_ISA
1795 + select CRC32
1796 + help
1797 + If you have a network (Ethernet) card of this type, say Y and read
1798 + the Ethernet-HOWTO, available from
1799 + <http://www.tldp.org/docs.html#howto>.
1800 +
1801 + To compile this driver as a module, choose M here and read
1802 + <file:Documentation/networking/net-modules.txt>. The module
1803 + will be called hp.
1804 +
1805 +config LP486E
1806 + tristate "LP486E on board Ethernet"
1807 + depends on NET_ISA
1808 + help
1809 + Say Y here to support the 82596-based on-board Ethernet controller
1810 + for the Panther motherboard, which is one of the two shipped in the
1811 + Intel Professional Workstation.
1812 +
1813 +config ETH16I
1814 + tristate "ICL EtherTeam 16i/32 support"
1815 + depends on NET_ISA
1816 + help
1817 + If you have a network (Ethernet) card of this type, say Y and read
1818 + the Ethernet-HOWTO, available from
1819 + <http://www.tldp.org/docs.html#howto>.
1820 +
1821 + To compile this driver as a module, choose M here and read
1822 + <file:Documentation/networking/net-modules.txt>. The module
1823 + will be called eth16i.
1824 +
1825 +config NE2000
1826 + tristate "NE2000/NE1000 support"
1827 + depends on NET_ISA || (Q40 && m) || M32R
1828 + select CRC32
1829 + ---help---
1830 + If you have a network (Ethernet) card of this type, say Y and read
1831 + the Ethernet-HOWTO, available from
1832 + <http://www.tldp.org/docs.html#howto>. Many Ethernet cards
1833 + without a specific driver are compatible with NE2000.
1834 +
1835 + If you have a PCI NE2000 card however, say N here and Y to "PCI
1836 + NE2000 and clone support" under "EISA, VLB, PCI and on board
1837 + controllers" below. If you have a NE2000 card and are running on
1838 + an MCA system (a bus system used on some IBM PS/2 computers and
1839 + laptops), say N here and Y to "NE/2 (ne2000 MCA version) support",
1840 + below.
1841 +
1842 + To compile this driver as a module, choose M here and read
1843 + <file:Documentation/networking/net-modules.txt>. The module
1844 + will be called ne.
1845 +
1846 +config ZNET
1847 + tristate "Zenith Z-Note support (EXPERIMENTAL)"
1848 + depends on NET_ISA && EXPERIMENTAL && ISA_DMA_API
1849 + help
1850 + The Zenith Z-Note notebook computer has a built-in network
1851 + (Ethernet) card, and this is the Linux driver for it. Note that the
1852 + IBM Thinkpad 300 is compatible with the Z-Note and is also supported
1853 + by this driver. Read the Ethernet-HOWTO, available from
1854 + <http://www.tldp.org/docs.html#howto>.
1855 +
1856 +config SEEQ8005
1857 + tristate "SEEQ8005 support (EXPERIMENTAL)"
1858 + depends on NET_ISA && EXPERIMENTAL
1859 + help
1860 + This is a driver for the SEEQ 8005 network (Ethernet) card. If this
1861 + is for you, read the Ethernet-HOWTO, available from
1862 + <http://www.tldp.org/docs.html#howto>.
1863 +
1864 + To compile this driver as a module, choose M here and read
1865 + <file:Documentation/networking/net-modules.txt>. The module
1866 + will be called seeq8005.
1867 +
1868 +config NE2_MCA
1869 + tristate "NE/2 (ne2000 MCA version) support"
1870 + depends on NET_ETHERNET && MCA_LEGACY
1871 + select CRC32
1872 + help
1873 + If you have a network (Ethernet) card of this type, say Y and read
1874 + the Ethernet-HOWTO, available from
1875 + <http://www.tldp.org/docs.html#howto>.
1876 +
1877 + To compile this driver as a module, choose M here and read
1878 + <file:Documentation/networking/net-modules.txt>. The module
1879 + will be called ne2.
1880 +
1881 +config IBMLANA
1882 + tristate "IBM LAN Adapter/A support"
1883 + depends on NET_ETHERNET && MCA && MCA_LEGACY
1884 + ---help---
1885 + This is a Micro Channel Ethernet adapter. You need to set
1886 + CONFIG_MCA to use this driver. It is both available as an in-kernel
1887 + driver and as a module.
1888 +
1889 + To compile this driver as a module, choose M here and read
1890 + <file:Documentation/networking/net-modules.txt>. The only
1891 + currently supported card is the IBM LAN Adapter/A for Ethernet. It
1892 + will both support 16K and 32K memory windows, however a 32K window
1893 + gives a better security against packet losses. Usage of multiple
1894 + boards with this driver should be possible, but has not been tested
1895 + up to now due to lack of hardware.
1896 +
1897 +config IBMVETH
1898 + tristate "IBM LAN Virtual Ethernet support"
1899 + depends on NET_ETHERNET && PPC_PSERIES
1900 + ---help---
1901 + This driver supports virtual ethernet adapters on newer IBM iSeries
1902 + and pSeries systems.
1903 +
1904 + To compile this driver as a module, choose M here and read
1905 + <file:Documentation/networking/net-modules.txt>. The module will
1906 + be called ibmveth.
1907 +
1908 +config IBM_EMAC
1909 + tristate "PowerPC 4xx on-chip Ethernet support"
1910 + depends on 4xx
1911 + help
1912 + This driver supports the PowerPC 4xx EMAC family of on-chip
1913 + Ethernet controllers.
1914 +
1915 +config IBM_EMAC_RXB
1916 + int "Number of receive buffers"
1917 + depends on IBM_EMAC
1918 + default "128"
1919 +
1920 +config IBM_EMAC_TXB
1921 + int "Number of transmit buffers"
1922 + depends on IBM_EMAC
1923 + default "64"
1924 +
1925 +config IBM_EMAC_POLL_WEIGHT
1926 + int "MAL NAPI polling weight"
1927 + depends on IBM_EMAC
1928 + default "32"
1929 +
1930 +config IBM_EMAC_RX_COPY_THRESHOLD
1931 + int "RX skb copy threshold (bytes)"
1932 + depends on IBM_EMAC
1933 + default "256"
1934 +
1935 +config IBM_EMAC_RX_SKB_HEADROOM
1936 + int "Additional RX skb headroom (bytes)"
1937 + depends on IBM_EMAC
1938 + default "0"
1939 + help
1940 + Additional receive skb headroom. Note, that driver
1941 + will always reserve at least 2 bytes to make IP header
1942 + aligned, so usually there is no need to add any additional
1943 + headroom.
1944 +
1945 + If unsure, set to 0.
1946 +
1947 +config IBM_EMAC_PHY_RX_CLK_FIX
1948 + bool "PHY Rx clock workaround"
1949 + depends on IBM_EMAC && (405EP || 440GX || 440EP || 440GR)
1950 + help
1951 + Enable this if EMAC attached to a PHY which doesn't generate
1952 + RX clock if there is no link, if this is the case, you will
1953 + see "TX disable timeout" or "RX disable timeout" in the system
1954 + log.
1955 +
1956 + If unsure, say N.
1957 +
1958 +config IBM_EMAC_DEBUG
1959 + bool "Debugging"
1960 + depends on IBM_EMAC
1961 + default n
1962 +
1963 +config IBM_EMAC_ZMII
1964 + bool
1965 + depends on IBM_EMAC && (NP405H || NP405L || 44x)
1966 + default y
1967 +
1968 +config IBM_EMAC_RGMII
1969 + bool
1970 + depends on IBM_EMAC && 440GX
1971 + default y
1972 +
1973 +config IBM_EMAC_TAH
1974 + bool
1975 + depends on IBM_EMAC && 440GX
1976 + default y
1977 +
1978 +config NET_PCI
1979 + bool "EISA, VLB, PCI and on board controllers"
1980 + depends on NET_ETHERNET && (ISA || EISA || PCI)
1981 + help
1982 + This is another class of network cards which attach directly to the
1983 + bus. If you have one of those, say Y and read the Ethernet-HOWTO,
1984 + available from <http://www.tldp.org/docs.html#howto>.
1985 +
1986 + Note that the answer to this question doesn't directly affect the
1987 + kernel: saying N will just cause the configurator to skip all
1988 + the questions about this class of network cards. If you say Y, you
1989 + will be asked for your specific card in the following questions. If
1990 + you are unsure, say Y.
1991 +
1992 +config PCNET32
1993 + tristate "AMD PCnet32 PCI support"
1994 + depends on NET_PCI && PCI
1995 + select CRC32
1996 + select MII
1997 + help
1998 + If you have a PCnet32 or PCnetPCI based network (Ethernet) card,
1999 + answer Y here and read the Ethernet-HOWTO, available from
2000 + <http://www.tldp.org/docs.html#howto>.
2001 +
2002 + To compile this driver as a module, choose M here and read
2003 + <file:Documentation/networking/net-modules.txt>. The module
2004 + will be called pcnet32.
2005 +
2006 +config PCNET32_NAPI
2007 + bool "Use RX polling (NAPI)"
2008 + depends on PCNET32
2009 + help
2010 + NAPI is a new driver API designed to reduce CPU and interrupt load
2011 + when the driver is receiving lots of packets from the card. It is
2012 + still somewhat experimental and thus not yet enabled by default.
2013 +
2014 + If your estimated Rx load is 10kpps or more, or if the card will be
2015 + deployed on potentially unfriendly networks (e.g. in a firewall),
2016 + then say Y here.
2017 +
2018 + See <file:Documentation/networking/NAPI_HOWTO.txt> for more
2019 + information.
2020 +
2021 + If in doubt, say N.
2022 +
2023 +config AMD8111_ETH
2024 + tristate "AMD 8111 (new PCI lance) support"
2025 + depends on NET_PCI && PCI
2026 + select CRC32
2027 + select MII
2028 + help
2029 + If you have an AMD 8111-based PCI lance ethernet card,
2030 + answer Y here and read the Ethernet-HOWTO, available from
2031 + <http://www.tldp.org/docs.html#howto>.
2032 +
2033 + To compile this driver as a module, choose M here and read
2034 + <file:Documentation/networking/net-modules.txt>. The module
2035 + will be called amd8111e.
2036 +config AMD8111E_NAPI
2037 + bool "Enable NAPI support"
2038 + depends on AMD8111_ETH
2039 + help
2040 + NAPI is a new driver API designed to reduce CPU and interrupt load
2041 + when the driver is receiving lots of packets from the card. It is
2042 + still somewhat experimental and thus not yet enabled by default.
2043 +
2044 + If your estimated Rx load is 10kpps or more, or if the card will be
2045 + deployed on potentially unfriendly networks (e.g. in a firewall),
2046 + then say Y here.
2047 +
2048 + See <file:Documentation/networking/NAPI_HOWTO.txt> for more
2049 + information.
2050 +
2051 + If in doubt, say N.
2052 +
2053 +config ADAPTEC_STARFIRE
2054 + tristate "Adaptec Starfire/DuraLAN support"
2055 + depends on NET_PCI && PCI
2056 + select CRC32
2057 + select MII
2058 + help
2059 + Say Y here if you have an Adaptec Starfire (or DuraLAN) PCI network
2060 + adapter. The DuraLAN chip is used on the 64 bit PCI boards from
2061 + Adaptec e.g. the ANA-6922A. The older 32 bit boards use the tulip
2062 + driver.
2063 +
2064 + To compile this driver as a module, choose M here: the module
2065 + will be called starfire. This is recommended.
2066 +
2067 +config ADAPTEC_STARFIRE_NAPI
2068 + bool "Use Rx Polling (NAPI) (EXPERIMENTAL)"
2069 + depends on ADAPTEC_STARFIRE && EXPERIMENTAL
2070 + help
2071 + NAPI is a new driver API designed to reduce CPU and interrupt load
2072 + when the driver is receiving lots of packets from the card. It is
2073 + still somewhat experimental and thus not yet enabled by default.
2074 +
2075 + If your estimated Rx load is 10kpps or more, or if the card will be
2076 + deployed on potentially unfriendly networks (e.g. in a firewall),
2077 + then say Y here.
2078 +
2079 + See <file:Documentation/networking/NAPI_HOWTO.txt> for more
2080 + information.
2081 +
2082 + If in doubt, say N.
2083 +
2084 +config AC3200
2085 + tristate "Ansel Communications EISA 3200 support (EXPERIMENTAL)"
2086 + depends on NET_PCI && (ISA || EISA) && EXPERIMENTAL
2087 + select CRC32
2088 + help
2089 + If you have a network (Ethernet) card of this type, say Y and read
2090 + the Ethernet-HOWTO, available from
2091 + <http://www.tldp.org/docs.html#howto>.
2092 +
2093 + To compile this driver as a module, choose M here and read
2094 + <file:Documentation/networking/net-modules.txt>. The module
2095 + will be called ac3200.
2096 +
2097 +config APRICOT
2098 + tristate "Apricot Xen-II on board Ethernet"
2099 + depends on NET_PCI && ISA
2100 + help
2101 + If you have a network (Ethernet) controller of this type, say Y and
2102 + read the Ethernet-HOWTO, available from
2103 + <http://www.tldp.org/docs.html#howto>.
2104 +
2105 + To compile this driver as a module, choose M here and read
2106 + <file:Documentation/networking/net-modules.txt>. The module will be
2107 + called apricot.
2108 +
2109 +config B44
2110 + tristate "Broadcom 4400 ethernet support"
2111 + depends on NET_PCI && PCI
2112 + select MII
2113 + help
2114 + If you have a network (Ethernet) controller of this type, say Y and
2115 + read the Ethernet-HOWTO, available from
2116 + <http://www.tldp.org/docs.html#howto>.
2117 +
2118 + To compile this driver as a module, choose M here and read
2119 + <file:Documentation/networking/net-modules.txt>. The module will be
2120 + called b44.
2121 +
2122 +config FORCEDETH
2123 + tristate "nForce Ethernet support"
2124 + depends on NET_PCI && PCI
2125 + help
2126 + If you have a network (Ethernet) controller of this type, say Y and
2127 + read the Ethernet-HOWTO, available from
2128 + <http://www.tldp.org/docs.html#howto>.
2129 +
2130 + To compile this driver as a module, choose M here and read
2131 + <file:Documentation/networking/net-modules.txt>. The module will be
2132 + called forcedeth.
2133 +
2134 +config FORCEDETH_NAPI
2135 + bool "Use Rx and Tx Polling (NAPI) (EXPERIMENTAL)"
2136 + depends on FORCEDETH && EXPERIMENTAL
2137 + help
2138 + NAPI is a new driver API designed to reduce CPU and interrupt load
2139 + when the driver is receiving lots of packets from the card. It is
2140 + still somewhat experimental and thus not yet enabled by default.
2141 +
2142 + If your estimated Rx load is 10kpps or more, or if the card will be
2143 + deployed on potentially unfriendly networks (e.g. in a firewall),
2144 + then say Y here.
2145 +
2146 + See <file:Documentation/networking/NAPI_HOWTO.txt> for more
2147 + information.
2148 +
2149 + If in doubt, say N.
2150 +
2151 +config CS89x0
2152 + tristate "CS89x0 support"
2153 + depends on NET_PCI && (ISA || MACH_IXDP2351 || ARCH_IXDP2X01 || ARCH_PNX010X)
2154 + ---help---
2155 + Support for CS89x0 chipset based Ethernet cards. If you have a
2156 + network (Ethernet) card of this type, say Y and read the
2157 + Ethernet-HOWTO, available from
2158 + <http://www.tldp.org/docs.html#howto> as well as
2159 + <file:Documentation/networking/cs89x0.txt>.
2160 +
2161 + To compile this driver as a module, choose M here and read
2162 + <file:Documentation/networking/net-modules.txt>. The module will be
2163 + called cs89x0.
2164 +
2165 +config TC35815
2166 + tristate "TOSHIBA TC35815 Ethernet support"
2167 + depends on NET_PCI && PCI && TOSHIBA_JMR3927
2168 +
2169 +config DGRS
2170 + tristate "Digi Intl. RightSwitch SE-X support"
2171 + depends on NET_PCI && (PCI || EISA)
2172 + ---help---
2173 + This is support for the Digi International RightSwitch series of
2174 + PCI/EISA Ethernet switch cards. These include the SE-4 and the SE-6
2175 + models. If you have a network card of this type, say Y and read the
2176 + Ethernet-HOWTO, available from
2177 + <http://www.tldp.org/docs.html#howto>. More specific
2178 + information is contained in <file:Documentation/networking/dgrs.txt>.
2179 +
2180 + To compile this driver as a module, choose M here and read
2181 + <file:Documentation/networking/net-modules.txt>. The module
2182 + will be called dgrs.
2183 +
2184 +config EEPRO100
2185 + tristate "EtherExpressPro/100 support (eepro100, original Becker driver)"
2186 + depends on NET_PCI && PCI
2187 + select MII
2188 + help
2189 + If you have an Intel EtherExpress PRO/100 PCI network (Ethernet)
2190 + card, say Y and read the Ethernet-HOWTO, available from
2191 + <http://www.tldp.org/docs.html#howto>.
2192 +
2193 + To compile this driver as a module, choose M here and read
2194 + <file:Documentation/networking/net-modules.txt>. The module
2195 + will be called eepro100.
2196 +
2197 +
2198 +config E100
2199 + tristate "Intel(R) PRO/100+ support"
2200 + depends on NET_PCI && PCI
2201 + select MII
2202 + ---help---
2203 + This driver supports Intel(R) PRO/100 family of adapters.
2204 + To verify that your adapter is supported, find the board ID number
2205 + on the adapter. Look for a label that has a barcode and a number
2206 + in the format 123456-001 (six digits hyphen three digits).
2207 +
2208 + Use the above information and the Adapter & Driver ID Guide at:
2209 +
2210 + <http://support.intel.com/support/network/adapter/pro100/21397.htm>
2211 +
2212 + to identify the adapter.
2213 +
2214 + For the latest Intel PRO/100 network driver for Linux, see:
2215 +
2216 + <http://appsr.intel.com/scripts-df/support_intel.asp>
2217 +
2218 + More specific information on configuring the driver is in
2219 + <file:Documentation/networking/e100.txt>.
2220 +
2221 + To compile this driver as a module, choose M here and read
2222 + <file:Documentation/networking/net-modules.txt>. The module
2223 + will be called e100.
2224 +
2225 +config LNE390
2226 + tristate "Mylex EISA LNE390A/B support (EXPERIMENTAL)"
2227 + depends on NET_PCI && EISA && EXPERIMENTAL
2228 + select CRC32
2229 + help
2230 + If you have a network (Ethernet) card of this type, say Y and read
2231 + the Ethernet-HOWTO, available from
2232 + <http://www.tldp.org/docs.html#howto>.
2233 +
2234 + To compile this driver as a module, choose M here and read
2235 + <file:Documentation/networking/net-modules.txt>. The module
2236 + will be called lne390.
2237 +
2238 +config FEALNX
2239 + tristate "Myson MTD-8xx PCI Ethernet support"
2240 + depends on NET_PCI && PCI
2241 + select CRC32
2242 + select MII
2243 + help
2244 + Say Y here to support the Mysom MTD-800 family of PCI-based Ethernet
2245 + cards. Specifications and data at
2246 + <http://www.myson.com.hk/mtd/datasheet/>.
2247 +
2248 +config NATSEMI
2249 + tristate "National Semiconductor DP8381x series PCI Ethernet support"
2250 + depends on NET_PCI && PCI
2251 + select CRC32
2252 + help
2253 + This driver is for the National Semiconductor DP83810 series,
2254 + which is used in cards from PureData, NetGear, Linksys
2255 + and others, including the 83815 chip.
2256 + More specific information and updates are available from
2257 + <http://www.scyld.com/network/natsemi.html>.
2258 +
2259 +config NE2K_PCI
2260 + tristate "PCI NE2000 and clones support (see help)"
2261 + depends on NET_PCI && PCI
2262 + select CRC32
2263 + ---help---
2264 + This driver is for NE2000 compatible PCI cards. It will not work
2265 + with ISA NE2000 cards (they have their own driver, "NE2000/NE1000
2266 + support" below). If you have a PCI NE2000 network (Ethernet) card,
2267 + say Y and read the Ethernet-HOWTO, available from
2268 + <http://www.tldp.org/docs.html#howto>.
2269 +
2270 + This driver also works for the following NE2000 clone cards:
2271 + RealTek RTL-8029 Winbond 89C940 Compex RL2000 KTI ET32P2
2272 + NetVin NV5000SC Via 86C926 SureCom NE34 Winbond
2273 + Holtek HT80232 Holtek HT80229
2274 +
2275 + To compile this driver as a module, choose M here and read
2276 + <file:Documentation/networking/net-modules.txt>. The module
2277 + will be called ne2k-pci.
2278 +
2279 +config NE3210
2280 + tristate "Novell/Eagle/Microdyne NE3210 EISA support (EXPERIMENTAL)"
2281 + depends on NET_PCI && EISA && EXPERIMENTAL
2282 + select CRC32
2283 + ---help---
2284 + If you have a network (Ethernet) card of this type, say Y and read
2285 + the Ethernet-HOWTO, available from
2286 + <http://www.tldp.org/docs.html#howto>. Note that this driver
2287 + will NOT WORK for NE3200 cards as they are completely different.
2288 +
2289 + To compile this driver as a module, choose M here and read
2290 + <file:Documentation/networking/net-modules.txt>. The module
2291 + will be called ne3210.
2292 +
2293 +config ES3210
2294 + tristate "Racal-Interlan EISA ES3210 support (EXPERIMENTAL)"
2295 + depends on NET_PCI && EISA && EXPERIMENTAL
2296 + select CRC32
2297 + help
2298 + If you have a network (Ethernet) card of this type, say Y and read
2299 + the Ethernet-HOWTO, available from
2300 + <http://www.tldp.org/docs.html#howto>.
2301 +
2302 + To compile this driver as a module, choose M here and read
2303 + <file:Documentation/networking/net-modules.txt>. The module
2304 + will be called es3210.
2305 +
2306 +config 8139CP
2307 + tristate "RealTek RTL-8139 C+ PCI Fast Ethernet Adapter support (EXPERIMENTAL)"
2308 + depends on NET_PCI && PCI && EXPERIMENTAL
2309 + select CRC32
2310 + select MII
2311 + help
2312 + This is a driver for the Fast Ethernet PCI network cards based on
2313 + the RTL8139C+ chips. If you have one of those, say Y and read
2314 + the Ethernet-HOWTO, available from
2315 + <http://www.tldp.org/docs.html#howto>.
2316 +
2317 + To compile this driver as a module, choose M here: the module
2318 + will be called 8139cp. This is recommended.
2319 +
2320 +config 8139TOO
2321 + tristate "RealTek RTL-8129/8130/8139 PCI Fast Ethernet Adapter support"
2322 + depends on NET_PCI && PCI
2323 + select CRC32
2324 + select MII
2325 + ---help---
2326 + This is a driver for the Fast Ethernet PCI network cards based on
2327 + the RTL 8129/8130/8139 chips. If you have one of those, say Y and
2328 + read the Ethernet-HOWTO <http://www.tldp.org/docs.html#howto>.
2329 +
2330 + To compile this driver as a module, choose M here: the module
2331 + will be called 8139too. This is recommended.
2332 +
2333 +config 8139TOO_PIO
2334 + bool "Use PIO instead of MMIO"
2335 + default y
2336 + depends on 8139TOO
2337 + help
2338 + This instructs the driver to use programmed I/O ports (PIO) instead
2339 + of PCI shared memory (MMIO). This can possibly solve some problems
2340 + in case your mainboard has memory consistency issues. If unsure,
2341 + say N.
2342 +
2343 +config 8139TOO_TUNE_TWISTER
2344 + bool "Support for uncommon RTL-8139 rev. K (automatic channel equalization)"
2345 + depends on 8139TOO
2346 + help
2347 + This implements a function which might come in handy in case you
2348 + are using low quality on long cabling. It is required for RealTek
2349 + RTL-8139 revision K boards, and totally unused otherwise. It tries
2350 + to match the transceiver to the cable characteristics. This is
2351 + experimental since hardly documented by the manufacturer.
2352 + If unsure, say Y.
2353 +
2354 +config 8139TOO_8129
2355 + bool "Support for older RTL-8129/8130 boards"
2356 + depends on 8139TOO
2357 + help
2358 + This enables support for the older and uncommon RTL-8129 and
2359 + RTL-8130 chips, which support MII via an external transceiver,
2360 + instead of an internal one. Disabling this option will save some
2361 + memory by making the code size smaller. If unsure, say Y.
2362 +
2363 +config 8139_OLD_RX_RESET
2364 + bool "Use older RX-reset method"
2365 + depends on 8139TOO
2366 + help
2367 + The 8139too driver was recently updated to contain a more rapid
2368 + reset sequence, in the face of severe receive errors. This "new"
2369 + RX-reset method should be adequate for all boards. But if you
2370 + experience problems, you can enable this option to restore the
2371 + old RX-reset behavior. If unsure, say N.
2372 +
2373 +config SIS900
2374 + tristate "SiS 900/7016 PCI Fast Ethernet Adapter support"
2375 + depends on NET_PCI && PCI
2376 + select CRC32
2377 + select MII
2378 + ---help---
2379 + This is a driver for the Fast Ethernet PCI network cards based on
2380 + the SiS 900 and SiS 7016 chips. The SiS 900 core is also embedded in
2381 + SiS 630 and SiS 540 chipsets.
2382 +
2383 + This driver also supports AMD 79C901 HomePNA so that you can use
2384 + your phone line as a network cable.
2385 +
2386 + To compile this driver as a module, choose M here: the module
2387 + will be called sis900. This is recommended.
2388 +
2389 +config EPIC100
2390 + tristate "SMC EtherPower II"
2391 + depends on NET_PCI && PCI
2392 + select CRC32
2393 + select MII
2394 + help
2395 + This driver is for the SMC EtherPower II 9432 PCI Ethernet NIC,
2396 + which is based on the SMC83c17x (EPIC/100).
2397 + More specific information and updates are available from
2398 + <http://www.scyld.com/network/epic100.html>.
2399 +
2400 +config SUNDANCE
2401 + tristate "Sundance Alta support"
2402 + depends on NET_PCI && PCI
2403 + select CRC32
2404 + select MII
2405 + help
2406 + This driver is for the Sundance "Alta" chip.
2407 + More specific information and updates are available from
2408 + <http://www.scyld.com/network/sundance.html>.
2409 +
2410 +config SUNDANCE_MMIO
2411 + bool "Use MMIO instead of PIO"
2412 + depends on SUNDANCE
2413 + help
2414 + Enable memory-mapped I/O for interaction with Sundance NIC registers.
2415 + Do NOT enable this by default, PIO (enabled when MMIO is disabled)
2416 + is known to solve bugs on certain chips.
2417 +
2418 + If unsure, say N.
2419 +
2420 +config TLAN
2421 + tristate "TI ThunderLAN support"
2422 + depends on NET_PCI && (PCI || EISA) && !64BIT
2423 + ---help---
2424 + If you have a PCI Ethernet network card based on the ThunderLAN chip
2425 + which is supported by this driver, say Y and read the
2426 + Ethernet-HOWTO, available from
2427 + <http://www.tldp.org/docs.html#howto>.
2428 +
2429 + Devices currently supported by this driver are Compaq Netelligent,
2430 + Compaq NetFlex and Olicom cards. Please read the file
2431 + <file:Documentation/networking/tlan.txt> for more details.
2432 +
2433 + To compile this driver as a module, choose M here and read
2434 + <file:Documentation/networking/net-modules.txt>. The module
2435 + will be called tlan.
2436 +
2437 + Please email feedback to <torben.mathiasen@compaq.com>.
2438 +
2439 +config VIA_RHINE
2440 + tristate "VIA Rhine support"
2441 + depends on NET_PCI && PCI
2442 + select CRC32
2443 + select MII
2444 + help
2445 + If you have a VIA "Rhine" based network card (Rhine-I (VT86C100A),
2446 + Rhine-II (VT6102), or Rhine-III (VT6105)), say Y here. Rhine-type
2447 + Ethernet functions can also be found integrated on South Bridges
2448 + (e.g. VT8235).
2449 +
2450 + To compile this driver as a module, choose M here. The module
2451 + will be called via-rhine.
2452 +
2453 +config VIA_RHINE_MMIO
2454 + bool "Use MMIO instead of PIO"
2455 + depends on VIA_RHINE
2456 + help
2457 + This instructs the driver to use PCI shared memory (MMIO) instead of
2458 + programmed I/O ports (PIO). Enabling this gives an improvement in
2459 + processing time in parts of the driver.
2460 +
2461 + If unsure, say Y.
2462 +
2463 +config VIA_RHINE_NAPI
2464 + bool "Use Rx Polling (NAPI)"
2465 + depends on VIA_RHINE
2466 + help
2467 + NAPI is a new driver API designed to reduce CPU and interrupt load
2468 + when the driver is receiving lots of packets from the card.
2469 +
2470 + If your estimated Rx load is 10kpps or more, or if the card will be
2471 + deployed on potentially unfriendly networks (e.g. in a firewall),
2472 + then say Y here.
2473 +
2474 + See <file:Documentation/networking/NAPI_HOWTO.txt> for more
2475 + information.
2476 +
2477 +config LAN_SAA9730
2478 + bool "Philips SAA9730 Ethernet support"
2479 + depends on NET_PCI && PCI && MIPS_ATLAS
2480 + help
2481 + The SAA9730 is a combined multimedia and peripheral controller used
2482 + in thin clients, Internet access terminals, and diskless
2483 + workstations.
2484 + See <http://www.semiconductors.philips.com/pip/SAA9730_flyer_1>.
2485 +
2486 +config SC92031
2487 + tristate "Silan SC92031 PCI Fast Ethernet Adapter driver (EXPERIMENTAL)"
2488 + depends on NET_PCI && PCI && EXPERIMENTAL
2489 + select CRC32
2490 + ---help---
2491 + This is a driver for the Fast Ethernet PCI network cards based on
2492 + the Silan SC92031 chip (sometimes also called Rsltek 8139D). If you
2493 + have one of these, say Y here.
2494 +
2495 + To compile this driver as a module, choose M here: the module
2496 + will be called sc92031. This is recommended.
2497 +
2498 +config NET_POCKET
2499 + bool "Pocket and portable adapters"
2500 + depends on NET_ETHERNET && PARPORT
2501 + ---help---
2502 + Cute little network (Ethernet) devices which attach to the parallel
2503 + port ("pocket adapters"), commonly used with laptops. If you have
2504 + one of those, say Y and read the Ethernet-HOWTO, available from
2505 + <http://www.tldp.org/docs.html#howto>.
2506 +
2507 + If you want to plug a network (or some other) card into the PCMCIA
2508 + (or PC-card) slot of your laptop instead (PCMCIA is the standard for
2509 + credit card size extension cards used by all modern laptops), you
2510 + need the pcmcia-cs package (location contained in the file
2511 + <file:Documentation/Changes>) and you can say N here.
2512 +
2513 + Laptop users should read the Linux Laptop home page at
2514 + <http://www.linux-on-laptops.com/> or
2515 + Tuxmobil - Linux on Mobile Computers at <http://www.tuxmobil.org/>.
2516 +
2517 + Note that the answer to this question doesn't directly affect the
2518 + kernel: saying N will just cause the configurator to skip all
2519 + the questions about this class of network devices. If you say Y, you
2520 + will be asked for your specific device in the following questions.
2521 +
2522 +config ATP
2523 + tristate "AT-LAN-TEC/RealTek pocket adapter support"
2524 + depends on NET_POCKET && PARPORT && X86
2525 + select CRC32
2526 + ---help---
2527 + This is a network (Ethernet) device which attaches to your parallel
2528 + port. Read <file:drivers/net/atp.c> as well as the Ethernet-HOWTO,
2529 + available from <http://www.tldp.org/docs.html#howto>, if you
2530 + want to use this. If you intend to use this driver, you should have
2531 + said N to the "Parallel printer support", because the two drivers
2532 + don't like each other.
2533 +
2534 + To compile this driver as a module, choose M here: the module
2535 + will be called atp.
2536 +
2537 +config DE600
2538 + tristate "D-Link DE600 pocket adapter support"
2539 + depends on NET_POCKET && PARPORT
2540 + ---help---
2541 + This is a network (Ethernet) device which attaches to your parallel
2542 + port. Read <file:Documentation/networking/DLINK.txt> as well as the
2543 + Ethernet-HOWTO, available from
2544 + <http://www.tldp.org/docs.html#howto>, if you want to use
2545 + this. It is possible to have several devices share a single parallel
2546 + port and it is safe to compile the corresponding drivers into the
2547 + kernel.
2548 +
2549 + To compile this driver as a module, choose M here: the module
2550 + will be called de600.
2551 +
2552 +config DE620
2553 + tristate "D-Link DE620 pocket adapter support"
2554 + depends on NET_POCKET && PARPORT
2555 + ---help---
2556 + This is a network (Ethernet) device which attaches to your parallel
2557 + port. Read <file:Documentation/networking/DLINK.txt> as well as the
2558 + Ethernet-HOWTO, available from
2559 + <http://www.tldp.org/docs.html#howto>, if you want to use
2560 + this. It is possible to have several devices share a single parallel
2561 + port and it is safe to compile the corresponding drivers into the
2562 + kernel.
2563 +
2564 + To compile this driver as a module, choose M here: the module
2565 + will be called de620.
2566 +
2567 +config SGISEEQ
2568 + tristate "SGI Seeq ethernet controller support"
2569 + depends on NET_ETHERNET && SGI_IP22
2570 + help
2571 + Say Y here if you have an Seeq based Ethernet network card. This is
2572 + used in many Silicon Graphics machines.
2573 +
2574 +config DECLANCE
2575 + tristate "DEC LANCE ethernet controller support"
2576 + depends on NET_ETHERNET && MACH_DECSTATION
2577 + select CRC32
2578 + help
2579 + This driver is for the series of Ethernet controllers produced by
2580 + DEC (now Compaq) based on the AMD Lance chipset, including the
2581 + DEPCA series. (This chipset is better known via the NE2100 cards.)
2582 +
2583 +config 68360_ENET
2584 + bool "Motorola 68360 ethernet controller"
2585 + depends on M68360
2586 + help
2587 + Say Y here if you want to use the built-in ethernet controller of
2588 + the Motorola 68360 processor.
2589 +
2590 +config FEC
2591 + bool "FEC ethernet controller (of ColdFire CPUs)"
2592 + depends on M523x || M527x || M5272 || M528x || M520x
2593 + help
2594 + Say Y here if you want to use the built-in 10/100 Fast ethernet
2595 + controller on some Motorola ColdFire processors.
2596 +
2597 +config FEC2
2598 + bool "Second FEC ethernet controller (on some ColdFire CPUs)"
2599 + depends on FEC
2600 + help
2601 + Say Y here if you want to use the second built-in 10/100 Fast
2602 + ethernet controller on some Motorola ColdFire processors.
2603 +
2604 +config NE_H8300
2605 + tristate "NE2000 compatible support for H8/300"
2606 + depends on H8300 && NET_ETHERNET
2607 + help
2608 + Say Y here if you want to use the NE2000 compatible
2609 + controller on the Renesas H8/300 processor.
2610 +
2611 +source "drivers/net/fec_8xx/Kconfig"
2612 +source "drivers/net/fs_enet/Kconfig"
2613 +
2614 +endmenu
2615 +
2616 +#
2617 +# Gigabit Ethernet
2618 +#
2619 +
2620 +menu "Ethernet (1000 Mbit)"
2621 + depends on !UML
2622 +
2623 +config ACENIC
2624 + tristate "Alteon AceNIC/3Com 3C985/NetGear GA620 Gigabit support"
2625 + depends on PCI
2626 + ---help---
2627 + Say Y here if you have an Alteon AceNIC, 3Com 3C985(B), NetGear
2628 + GA620, SGI Gigabit or Farallon PN9000-SX PCI Gigabit Ethernet
2629 + adapter. The driver allows for using the Jumbo Frame option (9000
2630 + bytes/frame) however it requires that your switches can handle this
2631 + as well. To enable Jumbo Frames, add `mtu 9000' to your ifconfig
2632 + line.
2633 +
2634 + To compile this driver as a module, choose M here: the
2635 + module will be called acenic.
2636 +
2637 +config ACENIC_OMIT_TIGON_I
2638 + bool "Omit support for old Tigon I based AceNICs"
2639 + depends on ACENIC
2640 + help
2641 + Say Y here if you only have Tigon II based AceNICs and want to leave
2642 + out support for the older Tigon I based cards which are no longer
2643 + being sold (ie. the original Alteon AceNIC and 3Com 3C985 (non B
2644 + version)). This will reduce the size of the driver object by
2645 + app. 100KB. If you are not sure whether your card is a Tigon I or a
2646 + Tigon II, say N here.
2647 +
2648 + The safe and default value for this is N.
2649 +
2650 +config DL2K
2651 + tristate "D-Link DL2000-based Gigabit Ethernet support"
2652 + depends on PCI
2653 + select CRC32
2654 + help
2655 + This driver supports D-Link 2000-based gigabit ethernet cards, which
2656 + includes
2657 + D-Link DGE-550T Gigabit Ethernet Adapter.
2658 + D-Link DL2000-based Gigabit Ethernet Adapter.
2659 +
2660 + To compile this driver as a module, choose M here: the
2661 + module will be called dl2k.
2662 +
2663 +config E1000
2664 + tristate "Intel(R) PRO/1000 Gigabit Ethernet support"
2665 + depends on PCI
2666 + ---help---
2667 + This driver supports Intel(R) PRO/1000 gigabit ethernet family of
2668 + adapters. For more information on how to identify your adapter, go
2669 + to the Adapter & Driver ID Guide at:
2670 +
2671 + <http://support.intel.com/support/network/adapter/pro100/21397.htm>
2672 +
2673 + For general information and support, go to the Intel support
2674 + website at:
2675 +
2676 + <http://support.intel.com>
2677 +
2678 + More specific information on configuring the driver is in
2679 + <file:Documentation/networking/e1000.txt>.
2680 +
2681 + To compile this driver as a module, choose M here and read
2682 + <file:Documentation/networking/net-modules.txt>. The module
2683 + will be called e1000.
2684 +
2685 +config E1000_NAPI
2686 + bool "Use Rx Polling (NAPI)"
2687 + depends on E1000
2688 + help
2689 + NAPI is a new driver API designed to reduce CPU and interrupt load
2690 + when the driver is receiving lots of packets from the card. It is
2691 + still somewhat experimental and thus not yet enabled by default.
2692 +
2693 + If your estimated Rx load is 10kpps or more, or if the card will be
2694 + deployed on potentially unfriendly networks (e.g. in a firewall),
2695 + then say Y here.
2696 +
2697 + See <file:Documentation/networking/NAPI_HOWTO.txt> for more
2698 + information.
2699 +
2700 + If in doubt, say N.
2701 +
2702 +config E1000_DISABLE_PACKET_SPLIT
2703 + bool "Disable Packet Split for PCI express adapters"
2704 + depends on E1000
2705 + help
2706 + Say Y here if you want to use the legacy receive path for PCI express
2707 + hardware.
2708 +
2709 + If in doubt, say N.
2710 +
2711 +source "drivers/net/ixp2000/Kconfig"
2712 +
2713 +config MYRI_SBUS
2714 + tristate "MyriCOM Gigabit Ethernet support"
2715 + depends on SBUS
2716 + help
2717 + This driver supports MyriCOM Sbus gigabit Ethernet cards.
2718 +
2719 + To compile this driver as a module, choose M here: the module
2720 + will be called myri_sbus. This is recommended.
2721 +
2722 +config NS83820
2723 + tristate "National Semiconductor DP83820 support"
2724 + depends on PCI
2725 + help
2726 + This is a driver for the National Semiconductor DP83820 series
2727 + of gigabit ethernet MACs. Cards using this chipset include
2728 + the D-Link DGE-500T, PureData's PDP8023Z-TG, SMC's SMC9462TX,
2729 + SOHO-GA2000T, SOHO-GA2500T. The driver supports the use of
2730 + zero copy.
2731 +
2732 +config HAMACHI
2733 + tristate "Packet Engines Hamachi GNIC-II support"
2734 + depends on PCI
2735 + select MII
2736 + help
2737 + If you have a Gigabit Ethernet card of this type, say Y and read
2738 + the Ethernet-HOWTO, available from
2739 + <http://www.tldp.org/docs.html#howto>.
2740 +
2741 + To compile this driver as a module, choose M here and read
2742 + <file:Documentation/networking/net-modules.txt>. The module will be
2743 + called hamachi.
2744 +
2745 +config YELLOWFIN
2746 + tristate "Packet Engines Yellowfin Gigabit-NIC support (EXPERIMENTAL)"
2747 + depends on PCI && EXPERIMENTAL
2748 + select CRC32
2749 + ---help---
2750 + Say Y here if you have a Packet Engines G-NIC PCI Gigabit Ethernet
2751 + adapter or the SYM53C885 Ethernet controller. The Gigabit adapter is
2752 + used by the Beowulf Linux cluster project. See
2753 + <http://cesdis.gsfc.nasa.gov/linux/drivers/yellowfin.html> for more
2754 + information about this driver in particular and Beowulf in general.
2755 +
2756 + To compile this driver as a module, choose M here: the module
2757 + will be called yellowfin. This is recommended.
2758 +
2759 +config R8169
2760 + tristate "Realtek 8169 gigabit ethernet support"
2761 + depends on PCI
2762 + select CRC32
2763 + ---help---
2764 + Say Y here if you have a Realtek 8169 PCI Gigabit Ethernet adapter.
2765 +
2766 + To compile this driver as a module, choose M here: the module
2767 + will be called r8169. This is recommended.
2768 +
2769 +config R8169_NAPI
2770 + bool "Use Rx and Tx Polling (NAPI) (EXPERIMENTAL)"
2771 + depends on R8169 && EXPERIMENTAL
2772 + help
2773 + NAPI is a new driver API designed to reduce CPU and interrupt load
2774 + when the driver is receiving lots of packets from the card. It is
2775 + still somewhat experimental and thus not yet enabled by default.
2776 +
2777 + If your estimated Rx load is 10kpps or more, or if the card will be
2778 + deployed on potentially unfriendly networks (e.g. in a firewall),
2779 + then say Y here.
2780 +
2781 + See <file:Documentation/networking/NAPI_HOWTO.txt> for more
2782 + information.
2783 +
2784 + If in doubt, say N.
2785 +
2786 +config R8169_VLAN
2787 + bool "VLAN support"
2788 + depends on R8169 && VLAN_8021Q
2789 + ---help---
2790 + Say Y here for the r8169 driver to support the functions required
2791 + by the kernel 802.1Q code.
2792 +
2793 + If in doubt, say Y.
2794 +
2795 +config SIS190
2796 + tristate "SiS190/SiS191 gigabit ethernet support"
2797 + depends on PCI
2798 + select CRC32
2799 + select MII
2800 + ---help---
2801 + Say Y here if you have a SiS 190 PCI Fast Ethernet adapter or
2802 + a SiS 191 PCI Gigabit Ethernet adapter. Both are expected to
2803 + appear in lan on motherboard designs which are based on SiS 965
2804 + and SiS 966 south bridge.
2805 +
2806 + To compile this driver as a module, choose M here: the module
2807 + will be called sis190. This is recommended.
2808 +
2809 +config SKGE
2810 + tristate "New SysKonnect GigaEthernet support"
2811 + depends on PCI
2812 + select CRC32
2813 + ---help---
2814 + This driver support the Marvell Yukon or SysKonnect SK-98xx/SK-95xx
2815 + and related Gigabit Ethernet adapters. It is a new smaller driver
2816 + with better performance and more complete ethtool support.
2817 +
2818 + It does not support the link failover and network management
2819 + features that "portable" vendor supplied sk98lin driver does.
2820 +
2821 + This driver supports adapters based on the original Yukon chipset:
2822 + Marvell 88E8001, Belkin F5D5005, CNet GigaCard, DLink DGE-530T,
2823 + Linksys EG1032/EG1064, 3Com 3C940/3C940B, SysKonnect SK-9871/9872.
2824 +
2825 + It does not support the newer Yukon2 chipset: a separate driver,
2826 + sky2, is provided for Yukon2-based adapters.
2827 +
2828 + To compile this driver as a module, choose M here: the module
2829 + will be called skge. This is recommended.
2830 +
2831 +config SKY2
2832 + tristate "SysKonnect Yukon2 support (EXPERIMENTAL)"
2833 + depends on PCI
2834 + select CRC32
2835 + ---help---
2836 + This driver supports Gigabit Ethernet adapters based on the
2837 + Marvell Yukon 2 chipset:
2838 + Marvell 88E8021/88E8022/88E8035/88E8036/88E8038/88E8050/88E8052/
2839 + 88E8053/88E8055/88E8061/88E8062, SysKonnect SK-9E21D/SK-9S21
2840 +
2841 + There is companion driver for the older Marvell Yukon and
2842 + Genesis based adapters: skge.
2843 +
2844 + To compile this driver as a module, choose M here: the module
2845 + will be called sky2. This is recommended.
2846 +
2847 +config SK98LIN
2848 + tristate "Marvell Yukon Chipset / SysKonnect SK-98xx Support (DEPRECATED)"
2849 + depends on PCI
2850 + ---help---
2851 + Say Y here if you have a Marvell Yukon or SysKonnect SK-98xx/SK-95xx
2852 + compliant Gigabit Ethernet Adapter.
2853 +
2854 + This driver supports the original Yukon chipset. This driver is
2855 + deprecated and will be removed from the kernel in the near future,
2856 + it has been replaced by the skge driver. skge is cleaner and
2857 + seems to work better.
2858 +
2859 + This driver does not support the newer Yukon2 chipset. A separate
2860 + driver, sky2, is provided to support Yukon2-based adapters.
2861 +
2862 + The following adapters are supported by this driver:
2863 + - 3Com 3C940 Gigabit LOM Ethernet Adapter
2864 + - 3Com 3C941 Gigabit LOM Ethernet Adapter
2865 + - Allied Telesyn AT-2970LX Gigabit Ethernet Adapter
2866 + - Allied Telesyn AT-2970LX/2SC Gigabit Ethernet Adapter
2867 + - Allied Telesyn AT-2970SX Gigabit Ethernet Adapter
2868 + - Allied Telesyn AT-2970SX/2SC Gigabit Ethernet Adapter
2869 + - Allied Telesyn AT-2970TX Gigabit Ethernet Adapter
2870 + - Allied Telesyn AT-2970TX/2TX Gigabit Ethernet Adapter
2871 + - Allied Telesyn AT-2971SX Gigabit Ethernet Adapter
2872 + - Allied Telesyn AT-2971T Gigabit Ethernet Adapter
2873 + - Belkin Gigabit Desktop Card 10/100/1000Base-T Adapter, Copper RJ-45
2874 + - EG1032 v2 Instant Gigabit Network Adapter
2875 + - EG1064 v2 Instant Gigabit Network Adapter
2876 + - Marvell 88E8001 Gigabit LOM Ethernet Adapter (Abit)
2877 + - Marvell 88E8001 Gigabit LOM Ethernet Adapter (Albatron)
2878 + - Marvell 88E8001 Gigabit LOM Ethernet Adapter (Asus)
2879 + - Marvell 88E8001 Gigabit LOM Ethernet Adapter (ECS)
2880 + - Marvell 88E8001 Gigabit LOM Ethernet Adapter (Epox)
2881 + - Marvell 88E8001 Gigabit LOM Ethernet Adapter (Foxconn)
2882 + - Marvell 88E8001 Gigabit LOM Ethernet Adapter (Gigabyte)
2883 + - Marvell 88E8001 Gigabit LOM Ethernet Adapter (Iwill)
2884 + - Marvell 88E8050 Gigabit LOM Ethernet Adapter (Intel)
2885 + - Marvell RDK-8001 Adapter
2886 + - Marvell RDK-8002 Adapter
2887 + - Marvell RDK-8003 Adapter
2888 + - Marvell RDK-8004 Adapter
2889 + - Marvell RDK-8006 Adapter
2890 + - Marvell RDK-8007 Adapter
2891 + - Marvell RDK-8008 Adapter
2892 + - Marvell RDK-8009 Adapter
2893 + - Marvell RDK-8010 Adapter
2894 + - Marvell RDK-8011 Adapter
2895 + - Marvell RDK-8012 Adapter
2896 + - Marvell RDK-8052 Adapter
2897 + - Marvell Yukon Gigabit Ethernet 10/100/1000Base-T Adapter (32 bit)
2898 + - Marvell Yukon Gigabit Ethernet 10/100/1000Base-T Adapter (64 bit)
2899 + - N-Way PCI-Bus Giga-Card 1000/100/10Mbps(L)
2900 + - SK-9521 10/100/1000Base-T Adapter
2901 + - SK-9521 V2.0 10/100/1000Base-T Adapter
2902 + - SK-9821 Gigabit Ethernet Server Adapter (SK-NET GE-T)
2903 + - SK-9821 V2.0 Gigabit Ethernet 10/100/1000Base-T Adapter
2904 + - SK-9822 Gigabit Ethernet Server Adapter (SK-NET GE-T dual link)
2905 + - SK-9841 Gigabit Ethernet Server Adapter (SK-NET GE-LX)
2906 + - SK-9841 V2.0 Gigabit Ethernet 1000Base-LX Adapter
2907 + - SK-9842 Gigabit Ethernet Server Adapter (SK-NET GE-LX dual link)
2908 + - SK-9843 Gigabit Ethernet Server Adapter (SK-NET GE-SX)
2909 + - SK-9843 V2.0 Gigabit Ethernet 1000Base-SX Adapter
2910 + - SK-9844 Gigabit Ethernet Server Adapter (SK-NET GE-SX dual link)
2911 + - SK-9851 V2.0 Gigabit Ethernet 1000Base-SX Adapter
2912 + - SK-9861 Gigabit Ethernet Server Adapter (SK-NET GE-SX Volition)
2913 + - SK-9861 V2.0 Gigabit Ethernet 1000Base-SX Adapter
2914 + - SK-9862 Gigabit Ethernet Server Adapter (SK-NET GE-SX Volition dual link)
2915 + - SK-9871 Gigabit Ethernet Server Adapter (SK-NET GE-ZX)
2916 + - SK-9871 V2.0 Gigabit Ethernet 1000Base-ZX Adapter
2917 + - SK-9872 Gigabit Ethernet Server Adapter (SK-NET GE-ZX dual link)
2918 + - SMC EZ Card 1000 (SMC9452TXV.2)
2919 +
2920 + The adapters support Jumbo Frames.
2921 + The dual link adapters support link-failover and dual port features.
2922 + Both Marvell Yukon and SysKonnect SK-98xx/SK-95xx adapters support
2923 + the scatter-gather functionality with sendfile(). Please refer to
2924 + <file:Documentation/networking/sk98lin.txt> for more information about
2925 + optional driver parameters.
2926 + Questions concerning this driver may be addressed to:
2927 + <linux@syskonnect.de>
2928 +
2929 + If you want to compile this driver as a module ( = code which can be
2930 + inserted in and removed from the running kernel whenever you want),
2931 + say M here and read <file:Documentation/kbuild/modules.txt>. The module will
2932 + be called sk98lin. This is recommended.
2933 +
2934 +config VIA_VELOCITY
2935 + tristate "VIA Velocity support"
2936 + depends on NET_PCI && PCI
2937 + select CRC32
2938 + select CRC_CCITT
2939 + select MII
2940 + help
2941 + If you have a VIA "Velocity" based network card say Y here.
2942 +
2943 + To compile this driver as a module, choose M here. The module
2944 + will be called via-velocity.
2945 +
2946 +config TIGON3
2947 + tristate "Broadcom Tigon3 support"
2948 + depends on PCI
2949 + help
2950 + This driver supports Broadcom Tigon3 based gigabit Ethernet cards.
2951 +
2952 + To compile this driver as a module, choose M here: the module
2953 + will be called tg3. This is recommended.
2954 +
2955 +config BNX2
2956 + tristate "Broadcom NetXtremeII support"
2957 + depends on PCI
2958 + select CRC32
2959 + select ZLIB_INFLATE
2960 + help
2961 + This driver supports Broadcom NetXtremeII gigabit Ethernet cards.
2962 +
2963 + To compile this driver as a module, choose M here: the module
2964 + will be called bnx2. This is recommended.
2965 +
2966 +config SPIDER_NET
2967 + tristate "Spider Gigabit Ethernet driver"
2968 + depends on PCI && (PPC_IBM_CELL_BLADE || PPC_CELLEB)
2969 + select FW_LOADER
2970 + help
2971 + This driver supports the Gigabit Ethernet chips present on the
2972 + Cell Processor-Based Blades from IBM.
2973 +
2974 +config TSI108_ETH
2975 + tristate "Tundra TSI108 gigabit Ethernet support"
2976 + depends on TSI108_BRIDGE
2977 + help
2978 + This driver supports Tundra TSI108 gigabit Ethernet ports.
2979 + To compile this driver as a module, choose M here: the module
2980 + will be called tsi108_eth.
2981 +
2982 +config GIANFAR
2983 + tristate "Gianfar Ethernet"
2984 + depends on 85xx || 83xx || PPC_86xx
2985 + select PHYLIB
2986 + select CRC32
2987 + help
2988 + This driver supports the Gigabit TSEC on the MPC83xx, MPC85xx,
2989 + and MPC86xx family of chips, and the FEC on the 8540.
2990 +
2991 +config GFAR_NAPI
2992 + bool "NAPI Support"
2993 + depends on GIANFAR
2994 +
2995 +config UCC_GETH
2996 + tristate "Freescale QE UCC GETH"
2997 + depends on QUICC_ENGINE && UCC_FAST
2998 + help
2999 + This driver supports the Gigabit Ethernet mode of QE UCC.
3000 + QE can be found on MPC836x CPUs.
3001 +
3002 +config UGETH_NAPI
3003 + bool "NAPI Support"
3004 + depends on UCC_GETH
3005 +
3006 +config UGETH_MAGIC_PACKET
3007 + bool "Magic Packet detection support"
3008 + depends on UCC_GETH
3009 +
3010 +config UGETH_FILTERING
3011 + bool "Mac address filtering support"
3012 + depends on UCC_GETH
3013 +
3014 +config UGETH_TX_ON_DEMOND
3015 + bool "Transmit on Demond support"
3016 + depends on UCC_GETH
3017 +
3018 +config UGETH_HAS_GIGA
3019 + bool
3020 + depends on UCC_GETH && PPC_MPC836x
3021 +
3022 +config MV643XX_ETH
3023 + tristate "MV-643XX Ethernet support"
3024 + depends on MOMENCO_OCELOT_C || MOMENCO_JAGUAR_ATX || MV64360 || MOMENCO_OCELOT_3 || (PPC_MULTIPLATFORM && PPC32)
3025 + select MII
3026 + help
3027 + This driver supports the gigabit Ethernet on the Marvell MV643XX
3028 + chipset which is used in the Momenco Ocelot C and Jaguar ATX and
3029 + Pegasos II, amongst other PPC and MIPS boards.
3030 +
3031 +config QLA3XXX
3032 + tristate "QLogic QLA3XXX Network Driver Support"
3033 + depends on PCI
3034 + help
3035 + This driver supports QLogic ISP3XXX gigabit Ethernet cards.
3036 +
3037 + To compile this driver as a module, choose M here: the module
3038 + will be called qla3xxx.
3039 +
3040 +config ATL1
3041 + tristate "Attansic L1 Gigabit Ethernet support (EXPERIMENTAL)"
3042 + depends on PCI && EXPERIMENTAL
3043 + select CRC32
3044 + select MII
3045 + help
3046 + This driver supports the Attansic L1 gigabit ethernet adapter.
3047 +
3048 + To compile this driver as a module, choose M here. The module
3049 + will be called atl1.
3050 +
3051 +endmenu
3052 +
3053 +#
3054 +# 10 Gigabit Ethernet
3055 +#
3056 +
3057 +menu "Ethernet (10000 Mbit)"
3058 + depends on !UML
3059 +
3060 +config CHELSIO_T1
3061 + tristate "Chelsio 10Gb Ethernet support"
3062 + depends on PCI
3063 + select CRC32
3064 + help
3065 + This driver supports Chelsio gigabit and 10-gigabit
3066 + Ethernet cards. More information about adapter features and
3067 + performance tuning is in <file:Documentation/networking/cxgb.txt>.
3068 +
3069 + For general information about Chelsio and our products, visit
3070 + our website at <http://www.chelsio.com>.
3071 +
3072 + For customer support, please visit our customer support page at
3073 + <http://www.chelsio.com/support.htm>.
3074 +
3075 + Please send feedback to <linux-bugs@chelsio.com>.
3076 +
3077 + To compile this driver as a module, choose M here: the module
3078 + will be called cxgb.
3079 +
3080 +config CHELSIO_T1_1G
3081 + bool "Chelsio gigabit Ethernet support"
3082 + depends on CHELSIO_T1
3083 + help
3084 + Enables support for Chelsio's gigabit Ethernet PCI cards. If you
3085 + are using only 10G cards say 'N' here.
3086 +
3087 +config CHELSIO_T1_NAPI
3088 + bool "Use Rx Polling (NAPI)"
3089 + depends on CHELSIO_T1
3090 + default y
3091 + help
3092 + NAPI is a driver API designed to reduce CPU and interrupt load
3093 + when the driver is receiving lots of packets from the card.
3094 +
3095 +config CHELSIO_T3
3096 + tristate "Chelsio Communications T3 10Gb Ethernet support"
3097 + depends on PCI
3098 + select FW_LOADER
3099 + help
3100 + This driver supports Chelsio T3-based gigabit and 10Gb Ethernet
3101 + adapters.
3102 +
3103 + For general information about Chelsio and our products, visit
3104 + our website at <http://www.chelsio.com>.
3105 +
3106 + For customer support, please visit our customer support page at
3107 + <http://www.chelsio.com/support.htm>.
3108 +
3109 + Please send feedback to <linux-bugs@chelsio.com>.
3110 +
3111 + To compile this driver as a module, choose M here: the module
3112 + will be called cxgb3.
3113 +
3114 +config EHEA
3115 + tristate "eHEA Ethernet support"
3116 + depends on IBMEBUS
3117 + ---help---
3118 + This driver supports the IBM pSeries eHEA ethernet adapter.
3119 +
3120 + To compile the driver as a module, choose M here. The module
3121 + will be called ehea.
3122 +
3123 +config IXGB
3124 + tristate "Intel(R) PRO/10GbE support"
3125 + depends on PCI
3126 + ---help---
3127 + This driver supports Intel(R) PRO/10GbE family of
3128 + adapters. For more information on how to identify your adapter, go
3129 + to the Adapter & Driver ID Guide at:
3130 +
3131 + <http://support.intel.com/support/network/adapter/pro100/21397.htm>
3132 +
3133 + For general information and support, go to the Intel support
3134 + website at:
3135 +
3136 + <http://support.intel.com>
3137 +
3138 + More specific information on configuring the driver is in
3139 + <file:Documentation/networking/ixgb.txt>.
3140 +
3141 + To compile this driver as a module, choose M here and read
3142 + <file:Documentation/networking/net-modules.txt>. The module
3143 + will be called ixgb.
3144 +
3145 +config IXGB_NAPI
3146 + bool "Use Rx Polling (NAPI) (EXPERIMENTAL)"
3147 + depends on IXGB && EXPERIMENTAL
3148 + help
3149 + NAPI is a new driver API designed to reduce CPU and interrupt load
3150 + when the driver is receiving lots of packets from the card. It is
3151 + still somewhat experimental and thus not yet enabled by default.
3152 +
3153 + If your estimated Rx load is 10kpps or more, or if the card will be
3154 + deployed on potentially unfriendly networks (e.g. in a firewall),
3155 + then say Y here.
3156 +
3157 + See <file:Documentation/networking/NAPI_HOWTO.txt> for more
3158 + information.
3159 +
3160 + If in doubt, say N.
3161 +
3162 +config S2IO
3163 + tristate "S2IO 10Gbe XFrame NIC"
3164 + depends on PCI
3165 + ---help---
3166 + This driver supports the 10Gbe XFrame NIC of S2IO.
3167 + More specific information on configuring the driver is in
3168 + <file:Documentation/networking/s2io.txt>.
3169 +
3170 +config S2IO_NAPI
3171 + bool "Use Rx Polling (NAPI) (EXPERIMENTAL)"
3172 + depends on S2IO && EXPERIMENTAL
3173 + help
3174 + NAPI is a new driver API designed to reduce CPU and interrupt load
3175 + when the driver is receiving lots of packets from the card. It is
3176 + still somewhat experimental and thus not yet enabled by default.
3177 +
3178 + If your estimated Rx load is 10kpps or more, or if the card will be
3179 + deployed on potentially unfriendly networks (e.g. in a firewall),
3180 + then say Y here.
3181 +
3182 + See <file:Documentation/networking/NAPI_HOWTO.txt> for more
3183 + information.
3184 +
3185 + If in doubt, say N.
3186 +
3187 +config MYRI10GE
3188 + tristate "Myricom Myri-10G Ethernet support"
3189 + depends on PCI
3190 + select FW_LOADER
3191 + select CRC32
3192 + ---help---
3193 + This driver supports Myricom Myri-10G Dual Protocol interface in
3194 + Ethernet mode. If the eeprom on your board is not recent enough,
3195 + you will need a newer firmware image.
3196 + You may get this image or more information, at:
3197 +
3198 + <http://www.myri.com/scs/download-Myri10GE.html>
3199 +
3200 + To compile this driver as a module, choose M here and read
3201 + <file:Documentation/networking/net-modules.txt>. The module
3202 + will be called myri10ge.
3203 +
3204 +config NETXEN_NIC
3205 + tristate "NetXen Multi port (1/10) Gigabit Ethernet NIC"
3206 + depends on PCI
3207 + help
3208 + This enables the support for NetXen's Gigabit Ethernet card.
3209 +
3210 +config PASEMI_MAC
3211 + tristate "PA Semi 1/10Gbit MAC"
3212 + depends on PPC64 && PCI
3213 + help
3214 + This driver supports the on-chip 1/10Gbit Ethernet controller on
3215 + PA Semi's PWRficient line of chips.
3216 +
3217 +endmenu
3218 +
3219 +source "drivers/net/tokenring/Kconfig"
3220 +
3221 +source "drivers/net/wireless/Kconfig"
3222 +
3223 +source "drivers/net/pcmcia/Kconfig"
3224 +
3225 +source "drivers/net/wan/Kconfig"
3226 +
3227 +source "drivers/atm/Kconfig"
3228 +
3229 +source "drivers/s390/net/Kconfig"
3230 +
3231 +config ISERIES_VETH
3232 + tristate "iSeries Virtual Ethernet driver support"
3233 + depends on PPC_ISERIES
3234 +
3235 +config RIONET
3236 + tristate "RapidIO Ethernet over messaging driver support"
3237 + depends on RAPIDIO
3238 +
3239 +config RIONET_TX_SIZE
3240 + int "Number of outbound queue entries"
3241 + depends on RIONET
3242 + default "128"
3243 +
3244 +config RIONET_RX_SIZE
3245 + int "Number of inbound queue entries"
3246 + depends on RIONET
3247 + default "128"
3248 +
3249 +config FDDI
3250 + bool "FDDI driver support"
3251 + depends on (PCI || EISA || TC)
3252 + help
3253 + Fiber Distributed Data Interface is a high speed local area network
3254 + design; essentially a replacement for high speed Ethernet. FDDI can
3255 + run over copper or fiber. If you are connected to such a network and
3256 + want a driver for the FDDI card in your computer, say Y here (and
3257 + then also Y to the driver for your FDDI card, below). Most people
3258 + will say N.
3259 +
3260 +config DEFXX
3261 + tristate "Digital DEFTA/DEFEA/DEFPA adapter support"
3262 + depends on FDDI && (PCI || EISA || TC)
3263 + ---help---
3264 + This is support for the DIGITAL series of TURBOchannel (DEFTA),
3265 + EISA (DEFEA) and PCI (DEFPA) controllers which can connect you
3266 + to a local FDDI network.
3267 +
3268 + To compile this driver as a module, choose M here: the module
3269 + will be called defxx. If unsure, say N.
3270 +
3271 +config DEFXX_MMIO
3272 + bool
3273 + prompt "Use MMIO instead of PIO" if PCI || EISA
3274 + depends on DEFXX
3275 + default n if PCI || EISA
3276 + default y
3277 + ---help---
3278 + This instructs the driver to use EISA or PCI memory-mapped I/O
3279 + (MMIO) as appropriate instead of programmed I/O ports (PIO).
3280 + Enabling this gives an improvement in processing time in parts
3281 + of the driver, but it may cause problems with EISA (DEFEA)
3282 + adapters. TURBOchannel does not have the concept of I/O ports,
3283 + so MMIO is always used for these (DEFTA) adapters.
3284 +
3285 + If unsure, say N.
3286 +
3287 +config SKFP
3288 + tristate "SysKonnect FDDI PCI support"
3289 + depends on FDDI && PCI
3290 + select BITREVERSE
3291 + ---help---
3292 + Say Y here if you have a SysKonnect FDDI PCI adapter.
3293 + The following adapters are supported by this driver:
3294 + - SK-5521 (SK-NET FDDI-UP)
3295 + - SK-5522 (SK-NET FDDI-UP DAS)
3296 + - SK-5541 (SK-NET FDDI-FP)
3297 + - SK-5543 (SK-NET FDDI-LP)
3298 + - SK-5544 (SK-NET FDDI-LP DAS)
3299 + - SK-5821 (SK-NET FDDI-UP64)
3300 + - SK-5822 (SK-NET FDDI-UP64 DAS)
3301 + - SK-5841 (SK-NET FDDI-FP64)
3302 + - SK-5843 (SK-NET FDDI-LP64)
3303 + - SK-5844 (SK-NET FDDI-LP64 DAS)
3304 + - Netelligent 100 FDDI DAS Fibre SC
3305 + - Netelligent 100 FDDI SAS Fibre SC
3306 + - Netelligent 100 FDDI DAS UTP
3307 + - Netelligent 100 FDDI SAS UTP
3308 + - Netelligent 100 FDDI SAS Fibre MIC
3309 +
3310 + Read <file:Documentation/networking/skfp.txt> for information about
3311 + the driver.
3312 +
3313 + Questions concerning this driver can be addressed to:
3314 + <linux@syskonnect.de>
3315 +
3316 + To compile this driver as a module, choose M here: the module
3317 + will be called skfp. This is recommended.
3318 +
3319 +config HIPPI
3320 + bool "HIPPI driver support (EXPERIMENTAL)"
3321 + depends on EXPERIMENTAL && INET && PCI
3322 + help
3323 + HIgh Performance Parallel Interface (HIPPI) is a 800Mbit/sec and
3324 + 1600Mbit/sec dual-simplex switched or point-to-point network. HIPPI
3325 + can run over copper (25m) or fiber (300m on multi-mode or 10km on
3326 + single-mode). HIPPI networks are commonly used for clusters and to
3327 + connect to super computers. If you are connected to a HIPPI network
3328 + and have a HIPPI network card in your computer that you want to use
3329 + under Linux, say Y here (you must also remember to enable the driver
3330 + for your HIPPI card below). Most people will say N here.
3331 +
3332 +config ROADRUNNER
3333 + tristate "Essential RoadRunner HIPPI PCI adapter support (EXPERIMENTAL)"
3334 + depends on HIPPI && PCI
3335 + help
3336 + Say Y here if this is your PCI HIPPI network card.
3337 +
3338 + To compile this driver as a module, choose M here: the module
3339 + will be called rrunner. If unsure, say N.
3340 +
3341 +config ROADRUNNER_LARGE_RINGS
3342 + bool "Use large TX/RX rings (EXPERIMENTAL)"
3343 + depends on ROADRUNNER
3344 + help
3345 + If you say Y here, the RoadRunner driver will preallocate up to 2 MB
3346 + of additional memory to allow for fastest operation, both for
3347 + transmitting and receiving. This memory cannot be used by any other
3348 + kernel code or by user space programs. Say Y here only if you have
3349 + the memory.
3350 +
3351 +config PLIP
3352 + tristate "PLIP (parallel port) support"
3353 + depends on PARPORT
3354 + ---help---
3355 + PLIP (Parallel Line Internet Protocol) is used to create a
3356 + reasonably fast mini network consisting of two (or, rarely, more)
3357 + local machines. A PLIP link from a Linux box is a popular means to
3358 + install a Linux distribution on a machine which doesn't have a
3359 + CD-ROM drive (a minimal system has to be transferred with floppies
3360 + first). The kernels on both machines need to have this PLIP option
3361 + enabled for this to work.
3362 +
3363 + The PLIP driver has two modes, mode 0 and mode 1. The parallel
3364 + ports (the connectors at the computers with 25 holes) are connected
3365 + with "null printer" or "Turbo Laplink" cables which can transmit 4
3366 + bits at a time (mode 0) or with special PLIP cables, to be used on
3367 + bidirectional parallel ports only, which can transmit 8 bits at a
3368 + time (mode 1); you can find the wiring of these cables in
3369 + <file:Documentation/networking/PLIP.txt>. The cables can be up to
3370 + 15m long. Mode 0 works also if one of the machines runs DOS/Windows
3371 + and has some PLIP software installed, e.g. the Crynwr PLIP packet
3372 + driver (<http://oak.oakland.edu/simtel.net/msdos/pktdrvr-pre.html>)
3373 + and winsock or NCSA's telnet.
3374 +
3375 + If you want to use PLIP, say Y and read the PLIP mini-HOWTO as well
3376 + as the NET-3-HOWTO, both available from
3377 + <http://www.tldp.org/docs.html#howto>. Note that the PLIP
3378 + protocol has been changed and this PLIP driver won't work together
3379 + with the PLIP support in Linux versions 1.0.x. This option enlarges
3380 + your kernel by about 8 KB.
3381 +
3382 + To compile this driver as a module, choose M here and read
3383 + <file:Documentation/networking/net-modules.txt>. The module will be
3384 + called plip. If unsure, say Y or M, in case you buy a laptop
3385 + later.
3386 +
3387 +config PPP
3388 + tristate "PPP (point-to-point protocol) support"
3389 + select SLHC
3390 + ---help---
3391 + PPP (Point to Point Protocol) is a newer and better SLIP. It serves
3392 + the same purpose: sending Internet traffic over telephone (and other
3393 + serial) lines. Ask your access provider if they support it, because
3394 + otherwise you can't use it; most Internet access providers these
3395 + days support PPP rather than SLIP.
3396 +
3397 + To use PPP, you need an additional program called pppd as described
3398 + in the PPP-HOWTO, available at
3399 + <http://www.tldp.org/docs.html#howto>. Make sure that you have
3400 + the version of pppd recommended in <file:Documentation/Changes>.
3401 + The PPP option enlarges your kernel by about 16 KB.
3402 +
3403 + There are actually two versions of PPP: the traditional PPP for
3404 + asynchronous lines, such as regular analog phone lines, and
3405 + synchronous PPP which can be used over digital ISDN lines for
3406 + example. If you want to use PPP over phone lines or other
3407 + asynchronous serial lines, you need to say Y (or M) here and also to
3408 + the next option, "PPP support for async serial ports". For PPP over
3409 + synchronous lines, you should say Y (or M) here and to "Support
3410 + synchronous PPP", below.
3411 +
3412 + If you said Y to "Version information on all symbols" above, then
3413 + you cannot compile the PPP driver into the kernel; you can then only
3414 + compile it as a module. To compile this driver as a module, choose M
3415 + here and read <file:Documentation/networking/net-modules.txt>.
3416 + The module will be called ppp_generic.
3417 +
3418 +config PPP_MULTILINK
3419 + bool "PPP multilink support (EXPERIMENTAL)"
3420 + depends on PPP && EXPERIMENTAL
3421 + help
3422 + PPP multilink is a protocol (defined in RFC 1990) which allows you
3423 + to combine several (logical or physical) lines into one logical PPP
3424 + connection, so that you can utilize your full bandwidth.
3425 +
3426 + This has to be supported at the other end as well and you need a
3427 + version of the pppd daemon which understands the multilink protocol.
3428 +
3429 + If unsure, say N.
3430 +
3431 +config PPP_FILTER
3432 + bool "PPP filtering"
3433 + depends on PPP
3434 + help
3435 + Say Y here if you want to be able to filter the packets passing over
3436 + PPP interfaces. This allows you to control which packets count as
3437 + activity (i.e. which packets will reset the idle timer or bring up
3438 + a demand-dialed link) and which packets are to be dropped entirely.
3439 + You need to say Y here if you wish to use the pass-filter and
3440 + active-filter options to pppd.
3441 +
3442 + If unsure, say N.
3443 +
3444 +config PPP_ASYNC
3445 + tristate "PPP support for async serial ports"
3446 + depends on PPP
3447 + select CRC_CCITT
3448 + ---help---
3449 + Say Y (or M) here if you want to be able to use PPP over standard
3450 + asynchronous serial ports, such as COM1 or COM2 on a PC. If you use
3451 + a modem (not a synchronous or ISDN modem) to contact your ISP, you
3452 + need this option.
3453 +
3454 + To compile this driver as a module, choose M here.
3455 +
3456 + If unsure, say Y.
3457 +
3458 +config PPP_SYNC_TTY
3459 + tristate "PPP support for sync tty ports"
3460 + depends on PPP
3461 + help
3462 + Say Y (or M) here if you want to be able to use PPP over synchronous
3463 + (HDLC) tty devices, such as the SyncLink adapter. These devices
3464 + are often used for high-speed leased lines like T1/E1.
3465 +
3466 + To compile this driver as a module, choose M here.
3467 +
3468 +config PPP_DEFLATE
3469 + tristate "PPP Deflate compression"
3470 + depends on PPP
3471 + select ZLIB_INFLATE
3472 + select ZLIB_DEFLATE
3473 + ---help---
3474 + Support for the Deflate compression method for PPP, which uses the
3475 + Deflate algorithm (the same algorithm that gzip uses) to compress
3476 + each PPP packet before it is sent over the wire. The machine at the
3477 + other end of the PPP link (usually your ISP) has to support the
3478 + Deflate compression method as well for this to be useful. Even if
3479 + they don't support it, it is safe to say Y here.
3480 +
3481 + To compile this driver as a module, choose M here.
3482 +
3483 +config PPP_BSDCOMP
3484 + tristate "PPP BSD-Compress compression"
3485 + depends on PPP
3486 + ---help---
3487 + Support for the BSD-Compress compression method for PPP, which uses
3488 + the LZW compression method to compress each PPP packet before it is
3489 + sent over the wire. The machine at the other end of the PPP link
3490 + (usually your ISP) has to support the BSD-Compress compression
3491 + method as well for this to be useful. Even if they don't support it,
3492 + it is safe to say Y here.
3493 +
3494 + The PPP Deflate compression method ("PPP Deflate compression",
3495 + above) is preferable to BSD-Compress, because it compresses better
3496 + and is patent-free.
3497 +
3498 + Note that the BSD compression code will always be compiled as a
3499 + module; it is called bsd_comp and will show up in the directory
3500 + modules once you have said "make modules". If unsure, say N.
3501 +
3502 +config PPP_MPPE
3503 + tristate "PPP MPPE compression (encryption) (EXPERIMENTAL)"
3504 + depends on PPP && EXPERIMENTAL
3505 + select CRYPTO
3506 + select CRYPTO_SHA1
3507 + select CRYPTO_ARC4
3508 + select CRYPTO_ECB
3509 + ---help---
3510 + Support for the MPPE Encryption protocol, as employed by the
3511 + Microsoft Point-to-Point Tunneling Protocol.
3512 +
3513 + See http://pptpclient.sourceforge.net/ for information on
3514 + configuring PPTP clients and servers to utilize this method.
3515 +
3516 +config PPPOE
3517 + tristate "PPP over Ethernet (EXPERIMENTAL)"
3518 + depends on EXPERIMENTAL && PPP
3519 + help
3520 + Support for PPP over Ethernet.
3521 +
3522 + This driver requires the latest version of pppd from the CVS
3523 + repository at cvs.samba.org. Alternatively, see the
3524 + RoaringPenguin package (<http://www.roaringpenguin.com/pppoe>)
3525 + which contains instruction on how to use this driver (under
3526 + the heading "Kernel mode PPPoE").
3527 +
3528 +config PPPOATM
3529 + tristate "PPP over ATM"
3530 + depends on ATM && PPP
3531 + help
3532 + Support PPP (Point to Point Protocol) encapsulated in ATM frames.
3533 + This implementation does not yet comply with section 8 of RFC2364,
3534 + which can lead to bad results if the ATM peer loses state and
3535 + changes its encapsulation unilaterally.
3536 +
3537 +config SLIP
3538 + tristate "SLIP (serial line) support"
3539 + ---help---
3540 + Say Y if you intend to use SLIP or CSLIP (compressed SLIP) to
3541 + connect to your Internet service provider or to connect to some
3542 + other local Unix box or if you want to configure your Linux box as a
3543 + Slip/CSlip server for other people to dial in. SLIP (Serial Line
3544 + Internet Protocol) is a protocol used to send Internet traffic over
3545 + serial connections such as telephone lines or null modem cables;
3546 + nowadays, the protocol PPP is more commonly used for this same
3547 + purpose.
3548 +
3549 + Normally, your access provider has to support SLIP in order for you
3550 + to be able to use it, but there is now a SLIP emulator called SLiRP
3551 + around (available from
3552 + <ftp://ibiblio.org/pub/Linux/system/network/serial/>) which
3553 + allows you to use SLIP over a regular dial up shell connection. If
3554 + you plan to use SLiRP, make sure to say Y to CSLIP, below. The
3555 + NET-3-HOWTO, available from
3556 + <http://www.tldp.org/docs.html#howto>, explains how to
3557 + configure SLIP. Note that you don't need this option if you just
3558 + want to run term (term is a program which gives you almost full
3559 + Internet connectivity if you have a regular dial up shell account on
3560 + some Internet connected Unix computer. Read
3561 + <http://www.bart.nl/~patrickr/term-howto/Term-HOWTO.html>). SLIP
3562 + support will enlarge your kernel by about 4 KB. If unsure, say N.
3563 +
3564 + To compile this driver as a module, choose M here and read
3565 + <file:Documentation/networking/net-modules.txt>. The module will be
3566 + called slip.
3567 +
3568 +config SLIP_COMPRESSED
3569 + bool "CSLIP compressed headers"
3570 + depends on SLIP
3571 + select SLHC
3572 + ---help---
3573 + This protocol is faster than SLIP because it uses compression on the
3574 + TCP/IP headers (not on the data itself), but it has to be supported
3575 + on both ends. Ask your access provider if you are not sure and
3576 + answer Y, just in case. You will still be able to use plain SLIP. If
3577 + you plan to use SLiRP, the SLIP emulator (available from
3578 + <ftp://ibiblio.org/pub/Linux/system/network/serial/>) which
3579 + allows you to use SLIP over a regular dial up shell connection, you
3580 + definitely want to say Y here. The NET-3-HOWTO, available from
3581 + <http://www.tldp.org/docs.html#howto>, explains how to configure
3582 + CSLIP. This won't enlarge your kernel.
3583 +
3584 +config SLHC
3585 + tristate
3586 + help
3587 + This option enables Van Jacobsen serial line header compression
3588 + routines.
3589 +
3590 +config SLIP_SMART
3591 + bool "Keepalive and linefill"
3592 + depends on SLIP
3593 + help
3594 + Adds additional capabilities to the SLIP driver to support the
3595 + RELCOM line fill and keepalive monitoring. Ideal on poor quality
3596 + analogue lines.
3597 +
3598 +config SLIP_MODE_SLIP6
3599 + bool "Six bit SLIP encapsulation"
3600 + depends on SLIP
3601 + help
3602 + Just occasionally you may need to run IP over hostile serial
3603 + networks that don't pass all control characters or are only seven
3604 + bit. Saying Y here adds an extra mode you can use with SLIP:
3605 + "slip6". In this mode, SLIP will only send normal ASCII symbols over
3606 + the serial device. Naturally, this has to be supported at the other
3607 + end of the link as well. It's good enough, for example, to run IP
3608 + over the async ports of a Camtec JNT Pad. If unsure, say N.
3609 +
3610 +config NET_FC
3611 + bool "Fibre Channel driver support"
3612 + depends on SCSI && PCI
3613 + help
3614 + Fibre Channel is a high speed serial protocol mainly used to connect
3615 + large storage devices to the computer; it is compatible with and
3616 + intended to replace SCSI.
3617 +
3618 + If you intend to use Fibre Channel, you need to have a Fibre channel
3619 + adaptor card in your computer; say Y here and to the driver for your
3620 + adaptor below. You also should have said Y to "SCSI support" and
3621 + "SCSI generic support".
3622 +
3623 +config SHAPER
3624 + tristate "Traffic Shaper (OBSOLETE)"
3625 + depends on EXPERIMENTAL
3626 + ---help---
3627 + The traffic shaper is a virtual network device that allows you to
3628 + limit the rate of outgoing data flow over some other network device.
3629 + The traffic that you want to slow down can then be routed through
3630 + these virtual devices. See
3631 + <file:Documentation/networking/shaper.txt> for more information.
3632 +
3633 + An alternative to this traffic shaper are traffic schedulers which
3634 + you'll get if you say Y to "QoS and/or fair queuing" in
3635 + "Networking options".
3636 +
3637 + To compile this driver as a module, choose M here: the module
3638 + will be called shaper. If unsure, say N.
3639 +
3640 +config NETCONSOLE
3641 + tristate "Network console logging support (EXPERIMENTAL)"
3642 + depends on EXPERIMENTAL
3643 + ---help---
3644 + If you want to log kernel messages over the network, enable this.
3645 + See <file:Documentation/networking/netconsole.txt> for details.
3646 +
3647 +endif #NETDEVICES
3648 +
3649 +config NETPOLL
3650 + def_bool NETCONSOLE
3651 +
3652 +config NETPOLL_RX
3653 + bool "Netpoll support for trapping incoming packets"
3654 + default n
3655 + depends on NETPOLL
3656 +
3657 +config NETPOLL_TRAP
3658 + bool "Netpoll traffic trapping"
3659 + default n
3660 + depends on NETPOLL
3661 +
3662 +config NET_POLL_CONTROLLER
3663 + def_bool NETPOLL
3664 +
3665 +endmenu
3666 diff -Nur linux-2.6.21.1/drivers/net/Makefile linux-2.6.21.1-owrt/drivers/net/Makefile
3667 --- linux-2.6.21.1/drivers/net/Makefile 2007-04-27 23:49:26.000000000 +0200
3668 +++ linux-2.6.21.1-owrt/drivers/net/Makefile 2007-05-23 23:37:01.000000000 +0200
3669 @@ -11,6 +11,7 @@
3670 obj-$(CONFIG_BONDING) += bonding/
3671 obj-$(CONFIG_ATL1) += atl1/
3672 obj-$(CONFIG_GIANFAR) += gianfar_driver.o
3673 +obj-$(CONFIG_AR2313) += ar2313/
3674
3675 gianfar_driver-objs := gianfar.o \
3676 gianfar_ethtool.o \
3677 @@ -38,6 +39,7 @@
3678 obj-$(CONFIG_MACE) += mace.o
3679 obj-$(CONFIG_BMAC) += bmac.o
3680
3681 +obj-$(CONFIG_IDT_RC32434_ETH) += rc32434_eth.o
3682 obj-$(CONFIG_DGRS) += dgrs.o
3683 obj-$(CONFIG_VORTEX) += 3c59x.o
3684 obj-$(CONFIG_TYPHOON) += typhoon.o
3685 diff -Nur linux-2.6.21.1/drivers/net/Makefile.orig linux-2.6.21.1-owrt/drivers/net/Makefile.orig
3686 --- linux-2.6.21.1/drivers/net/Makefile.orig 1970-01-01 01:00:00.000000000 +0100
3687 +++ linux-2.6.21.1-owrt/drivers/net/Makefile.orig 2007-05-23 23:34:01.000000000 +0200
3688 @@ -0,0 +1,221 @@
3689 +#
3690 +# Makefile for the Linux network (ethercard) device drivers.
3691 +#
3692 +
3693 +obj-$(CONFIG_E1000) += e1000/
3694 +obj-$(CONFIG_IBM_EMAC) += ibm_emac/
3695 +obj-$(CONFIG_IXGB) += ixgb/
3696 +obj-$(CONFIG_CHELSIO_T1) += chelsio/
3697 +obj-$(CONFIG_CHELSIO_T3) += cxgb3/
3698 +obj-$(CONFIG_EHEA) += ehea/
3699 +obj-$(CONFIG_BONDING) += bonding/
3700 +obj-$(CONFIG_ATL1) += atl1/
3701 +obj-$(CONFIG_GIANFAR) += gianfar_driver.o
3702 +
3703 +gianfar_driver-objs := gianfar.o \
3704 + gianfar_ethtool.o \
3705 + gianfar_mii.o \
3706 + gianfar_sysfs.o
3707 +
3708 +obj-$(CONFIG_UCC_GETH) += ucc_geth_driver.o
3709 +ucc_geth_driver-objs := ucc_geth.o ucc_geth_phy.o
3710 +
3711 +#
3712 +# link order important here
3713 +#
3714 +obj-$(CONFIG_PLIP) += plip.o
3715 +
3716 +obj-$(CONFIG_ROADRUNNER) += rrunner.o
3717 +
3718 +obj-$(CONFIG_HAPPYMEAL) += sunhme.o
3719 +obj-$(CONFIG_SUNLANCE) += sunlance.o
3720 +obj-$(CONFIG_SUNQE) += sunqe.o
3721 +obj-$(CONFIG_SUNBMAC) += sunbmac.o
3722 +obj-$(CONFIG_MYRI_SBUS) += myri_sbus.o
3723 +obj-$(CONFIG_SUNGEM) += sungem.o sungem_phy.o
3724 +obj-$(CONFIG_CASSINI) += cassini.o
3725 +
3726 +obj-$(CONFIG_MACE) += mace.o
3727 +obj-$(CONFIG_BMAC) += bmac.o
3728 +
3729 +obj-$(CONFIG_IDT_RC32434_ETH) += rc32434_eth.o
3730 +obj-$(CONFIG_DGRS) += dgrs.o
3731 +obj-$(CONFIG_VORTEX) += 3c59x.o
3732 +obj-$(CONFIG_TYPHOON) += typhoon.o
3733 +obj-$(CONFIG_NE2K_PCI) += ne2k-pci.o 8390.o
3734 +obj-$(CONFIG_PCNET32) += pcnet32.o
3735 +obj-$(CONFIG_EEPRO100) += eepro100.o
3736 +obj-$(CONFIG_E100) += e100.o
3737 +obj-$(CONFIG_TLAN) += tlan.o
3738 +obj-$(CONFIG_EPIC100) += epic100.o
3739 +obj-$(CONFIG_SIS190) += sis190.o
3740 +obj-$(CONFIG_SIS900) += sis900.o
3741 +obj-$(CONFIG_YELLOWFIN) += yellowfin.o
3742 +obj-$(CONFIG_ACENIC) += acenic.o
3743 +obj-$(CONFIG_ISERIES_VETH) += iseries_veth.o
3744 +obj-$(CONFIG_NATSEMI) += natsemi.o
3745 +obj-$(CONFIG_NS83820) += ns83820.o
3746 +obj-$(CONFIG_STNIC) += stnic.o 8390.o
3747 +obj-$(CONFIG_FEALNX) += fealnx.o
3748 +obj-$(CONFIG_TIGON3) += tg3.o
3749 +obj-$(CONFIG_BNX2) += bnx2.o
3750 +spidernet-y += spider_net.o spider_net_ethtool.o
3751 +obj-$(CONFIG_SPIDER_NET) += spidernet.o sungem_phy.o
3752 +obj-$(CONFIG_TC35815) += tc35815.o
3753 +obj-$(CONFIG_SKGE) += skge.o
3754 +obj-$(CONFIG_SKY2) += sky2.o
3755 +obj-$(CONFIG_SK98LIN) += sk98lin/
3756 +obj-$(CONFIG_SKFP) += skfp/
3757 +obj-$(CONFIG_VIA_RHINE) += via-rhine.o
3758 +obj-$(CONFIG_VIA_VELOCITY) += via-velocity.o
3759 +obj-$(CONFIG_ADAPTEC_STARFIRE) += starfire.o
3760 +obj-$(CONFIG_RIONET) += rionet.o
3761 +
3762 +#
3763 +# end link order section
3764 +#
3765 +
3766 +obj-$(CONFIG_MII) += mii.o
3767 +obj-$(CONFIG_PHYLIB) += phy/
3768 +
3769 +obj-$(CONFIG_SUNDANCE) += sundance.o
3770 +obj-$(CONFIG_HAMACHI) += hamachi.o
3771 +obj-$(CONFIG_NET) += Space.o loopback.o
3772 +obj-$(CONFIG_SEEQ8005) += seeq8005.o
3773 +obj-$(CONFIG_NET_SB1000) += sb1000.o
3774 +obj-$(CONFIG_MAC8390) += mac8390.o
3775 +obj-$(CONFIG_APNE) += apne.o 8390.o
3776 +obj-$(CONFIG_PCMCIA_PCNET) += 8390.o
3777 +obj-$(CONFIG_SHAPER) += shaper.o
3778 +obj-$(CONFIG_HP100) += hp100.o
3779 +obj-$(CONFIG_SMC9194) += smc9194.o
3780 +obj-$(CONFIG_FEC) += fec.o
3781 +obj-$(CONFIG_68360_ENET) += 68360enet.o
3782 +obj-$(CONFIG_WD80x3) += wd.o 8390.o
3783 +obj-$(CONFIG_EL2) += 3c503.o 8390.o
3784 +obj-$(CONFIG_NE2000) += ne.o 8390.o
3785 +obj-$(CONFIG_NE2_MCA) += ne2.o 8390.o
3786 +obj-$(CONFIG_HPLAN) += hp.o 8390.o
3787 +obj-$(CONFIG_HPLAN_PLUS) += hp-plus.o 8390.o
3788 +obj-$(CONFIG_ULTRA) += smc-ultra.o 8390.o
3789 +obj-$(CONFIG_ULTRAMCA) += smc-mca.o 8390.o
3790 +obj-$(CONFIG_ULTRA32) += smc-ultra32.o 8390.o
3791 +obj-$(CONFIG_E2100) += e2100.o 8390.o
3792 +obj-$(CONFIG_ES3210) += es3210.o 8390.o
3793 +obj-$(CONFIG_LNE390) += lne390.o 8390.o
3794 +obj-$(CONFIG_NE3210) += ne3210.o 8390.o
3795 +obj-$(CONFIG_NET_SB1250_MAC) += sb1250-mac.o
3796 +obj-$(CONFIG_B44) += b44.o
3797 +obj-$(CONFIG_FORCEDETH) += forcedeth.o
3798 +obj-$(CONFIG_NE_H8300) += ne-h8300.o
3799 +
3800 +obj-$(CONFIG_TSI108_ETH) += tsi108_eth.o
3801 +obj-$(CONFIG_MV643XX_ETH) += mv643xx_eth.o
3802 +obj-$(CONFIG_QLA3XXX) += qla3xxx.o
3803 +
3804 +obj-$(CONFIG_PPP) += ppp_generic.o
3805 +obj-$(CONFIG_PPP_ASYNC) += ppp_async.o
3806 +obj-$(CONFIG_PPP_SYNC_TTY) += ppp_synctty.o
3807 +obj-$(CONFIG_PPP_DEFLATE) += ppp_deflate.o
3808 +obj-$(CONFIG_PPP_BSDCOMP) += bsd_comp.o
3809 +obj-$(CONFIG_PPP_MPPE) += ppp_mppe.o
3810 +obj-$(CONFIG_PPPOE) += pppox.o pppoe.o
3811 +
3812 +obj-$(CONFIG_SLIP) += slip.o
3813 +obj-$(CONFIG_SLHC) += slhc.o
3814 +
3815 +obj-$(CONFIG_DUMMY) += dummy.o
3816 +obj-$(CONFIG_IFB) += ifb.o
3817 +obj-$(CONFIG_DE600) += de600.o
3818 +obj-$(CONFIG_DE620) += de620.o
3819 +obj-$(CONFIG_LANCE) += lance.o
3820 +obj-$(CONFIG_SUN3_82586) += sun3_82586.o
3821 +obj-$(CONFIG_SUN3LANCE) += sun3lance.o
3822 +obj-$(CONFIG_DEFXX) += defxx.o
3823 +obj-$(CONFIG_SGISEEQ) += sgiseeq.o
3824 +obj-$(CONFIG_SGI_O2MACE_ETH) += meth.o
3825 +obj-$(CONFIG_AT1700) += at1700.o
3826 +obj-$(CONFIG_EL1) += 3c501.o
3827 +obj-$(CONFIG_EL16) += 3c507.o
3828 +obj-$(CONFIG_ELMC) += 3c523.o
3829 +obj-$(CONFIG_IBMLANA) += ibmlana.o
3830 +obj-$(CONFIG_ELMC_II) += 3c527.o
3831 +obj-$(CONFIG_EL3) += 3c509.o
3832 +obj-$(CONFIG_3C515) += 3c515.o
3833 +obj-$(CONFIG_EEXPRESS) += eexpress.o
3834 +obj-$(CONFIG_EEXPRESS_PRO) += eepro.o
3835 +obj-$(CONFIG_8139CP) += 8139cp.o
3836 +obj-$(CONFIG_8139TOO) += 8139too.o
3837 +obj-$(CONFIG_ZNET) += znet.o
3838 +obj-$(CONFIG_LAN_SAA9730) += saa9730.o
3839 +obj-$(CONFIG_DEPCA) += depca.o
3840 +obj-$(CONFIG_EWRK3) += ewrk3.o
3841 +obj-$(CONFIG_ATP) += atp.o
3842 +obj-$(CONFIG_NI5010) += ni5010.o
3843 +obj-$(CONFIG_NI52) += ni52.o
3844 +obj-$(CONFIG_NI65) += ni65.o
3845 +obj-$(CONFIG_ELPLUS) += 3c505.o
3846 +obj-$(CONFIG_AC3200) += ac3200.o 8390.o
3847 +obj-$(CONFIG_APRICOT) += 82596.o
3848 +obj-$(CONFIG_LASI_82596) += lasi_82596.o
3849 +obj-$(CONFIG_MVME16x_NET) += 82596.o
3850 +obj-$(CONFIG_BVME6000_NET) += 82596.o
3851 +obj-$(CONFIG_SC92031) += sc92031.o
3852 +
3853 +# This is also a 82596 and should probably be merged
3854 +obj-$(CONFIG_LP486E) += lp486e.o
3855 +
3856 +obj-$(CONFIG_ETH16I) += eth16i.o
3857 +obj-$(CONFIG_ZORRO8390) += zorro8390.o
3858 +obj-$(CONFIG_HPLANCE) += hplance.o 7990.o
3859 +obj-$(CONFIG_MVME147_NET) += mvme147.o 7990.o
3860 +obj-$(CONFIG_EQUALIZER) += eql.o
3861 +obj-$(CONFIG_MIPS_JAZZ_SONIC) += jazzsonic.o
3862 +obj-$(CONFIG_MIPS_AU1X00_ENET) += au1000_eth.o
3863 +obj-$(CONFIG_MIPS_SIM_NET) += mipsnet.o
3864 +obj-$(CONFIG_SGI_IOC3_ETH) += ioc3-eth.o
3865 +obj-$(CONFIG_DECLANCE) += declance.o
3866 +obj-$(CONFIG_ATARILANCE) += atarilance.o
3867 +obj-$(CONFIG_ATARI_BIONET) += atari_bionet.o
3868 +obj-$(CONFIG_ATARI_PAMSNET) += atari_pamsnet.o
3869 +obj-$(CONFIG_A2065) += a2065.o
3870 +obj-$(CONFIG_HYDRA) += hydra.o
3871 +obj-$(CONFIG_ARIADNE) += ariadne.o
3872 +obj-$(CONFIG_CS89x0) += cs89x0.o
3873 +obj-$(CONFIG_MACSONIC) += macsonic.o
3874 +obj-$(CONFIG_MACMACE) += macmace.o
3875 +obj-$(CONFIG_MAC89x0) += mac89x0.o
3876 +obj-$(CONFIG_TUN) += tun.o
3877 +obj-$(CONFIG_NET_NETX) += netx-eth.o
3878 +obj-$(CONFIG_DL2K) += dl2k.o
3879 +obj-$(CONFIG_R8169) += r8169.o
3880 +obj-$(CONFIG_AMD8111_ETH) += amd8111e.o
3881 +obj-$(CONFIG_IBMVETH) += ibmveth.o
3882 +obj-$(CONFIG_S2IO) += s2io.o
3883 +obj-$(CONFIG_MYRI10GE) += myri10ge/
3884 +obj-$(CONFIG_SMC91X) += smc91x.o
3885 +obj-$(CONFIG_SMC911X) += smc911x.o
3886 +obj-$(CONFIG_DM9000) += dm9000.o
3887 +obj-$(CONFIG_FEC_8XX) += fec_8xx/
3888 +obj-$(CONFIG_PASEMI_MAC) += pasemi_mac.o
3889 +
3890 +obj-$(CONFIG_MACB) += macb.o
3891 +
3892 +obj-$(CONFIG_ARM) += arm/
3893 +obj-$(CONFIG_DEV_APPLETALK) += appletalk/
3894 +obj-$(CONFIG_TR) += tokenring/
3895 +obj-$(CONFIG_WAN) += wan/
3896 +obj-$(CONFIG_ARCNET) += arcnet/
3897 +obj-$(CONFIG_NET_PCMCIA) += pcmcia/
3898 +obj-$(CONFIG_NET_RADIO) += wireless/
3899 +obj-$(CONFIG_NET_TULIP) += tulip/
3900 +obj-$(CONFIG_HAMRADIO) += hamradio/
3901 +obj-$(CONFIG_IRDA) += irda/
3902 +obj-$(CONFIG_ETRAX_ETHERNET) += cris/
3903 +obj-$(CONFIG_ENP2611_MSF_NET) += ixp2000/
3904 +
3905 +obj-$(CONFIG_NETCONSOLE) += netconsole.o
3906 +
3907 +obj-$(CONFIG_FS_ENET) += fs_enet/
3908 +
3909 +obj-$(CONFIG_NETXEN_NIC) += netxen/
3910 diff -Nur linux-2.6.21.1/drivers/net/natsemi.c linux-2.6.21.1-owrt/drivers/net/natsemi.c
3911 --- linux-2.6.21.1/drivers/net/natsemi.c 2007-04-27 23:49:26.000000000 +0200
3912 +++ linux-2.6.21.1-owrt/drivers/net/natsemi.c 2007-05-23 23:34:01.000000000 +0200
3913 @@ -656,6 +656,49 @@
3914 static int netdev_get_eeprom(struct net_device *dev, u8 *buf);
3915 static const struct ethtool_ops ethtool_ops;
3916
3917 +#ifdef CONFIG_MACH_ARUBA
3918 +
3919 +#include <linux/ctype.h>
3920 +
3921 +#ifndef ERR
3922 +#define ERR(fmt, args...) printk("%s: " fmt, __func__, ##args)
3923 +#endif
3924 +
3925 +static int parse_mac_addr(struct net_device *dev, char* macstr)
3926 +{
3927 + int i, j;
3928 + unsigned char result, value;
3929 +
3930 + for (i=0; i<6; i++) {
3931 + result = 0;
3932 + if (i != 5 && *(macstr+2) != ':') {
3933 + ERR("invalid mac address format: %d %c\n",
3934 + i, *(macstr+2));
3935 + return -EINVAL;
3936 + }
3937 + for (j=0; j<2; j++) {
3938 + if (isxdigit(*macstr) && (value = isdigit(*macstr) ? *macstr-'0' :
3939 + toupper(*macstr)-'A'+10) < 16) {
3940 + result = result*16 + value;
3941 + macstr++;
3942 + }
3943 + else {
3944 + ERR("invalid mac address "
3945 + "character: %c\n", *macstr);
3946 + return -EINVAL;
3947 + }
3948 + }
3949 +
3950 + macstr++;
3951 + dev->dev_addr[i] = result;
3952 + }
3953 +
3954 + dev->dev_addr[5]++;
3955 + return 0;
3956 +}
3957 +
3958 +#endif
3959 +
3960 static inline void __iomem *ns_ioaddr(struct net_device *dev)
3961 {
3962 return (void __iomem *) dev->base_addr;
3963 @@ -794,6 +837,7 @@
3964 goto err_ioremap;
3965 }
3966
3967 +#ifndef CONFIG_MACH_ARUBA
3968 /* Work around the dropped serial bit. */
3969 prev_eedata = eeprom_read(ioaddr, 6);
3970 for (i = 0; i < 3; i++) {
3971 @@ -802,6 +846,19 @@
3972 dev->dev_addr[i*2+1] = eedata >> 7;
3973 prev_eedata = eedata;
3974 }
3975 +#else
3976 + {
3977 + char mac[32];
3978 + unsigned char def_mac[6] = {00, 0x0b, 0x86, 0xba, 0xdb, 0xad};
3979 + extern char *getenv(char *e);
3980 + memset(mac, 0, 32);
3981 + memcpy(mac, getenv("ethaddr"), 17);
3982 + if (parse_mac_addr(dev, mac)){
3983 + printk("%s: MAC address not found\n", __func__);
3984 + memcpy(dev->dev_addr, def_mac, 6);
3985 + }
3986 + }
3987 +#endif
3988
3989 dev->base_addr = (unsigned long __force) ioaddr;
3990 dev->irq = irq;
3991 diff -Nur linux-2.6.21.1/drivers/pci/access.c linux-2.6.21.1-owrt/drivers/pci/access.c
3992 --- linux-2.6.21.1/drivers/pci/access.c 2007-04-27 23:49:26.000000000 +0200
3993 +++ linux-2.6.21.1-owrt/drivers/pci/access.c 2007-05-23 23:36:48.000000000 +0200
3994 @@ -23,6 +23,7 @@
3995 #define PCI_word_BAD (pos & 1)
3996 #define PCI_dword_BAD (pos & 3)
3997
3998 +#ifdef __MIPSEB__
3999 #define PCI_OP_READ(size,type,len) \
4000 int pci_bus_read_config_##size \
4001 (struct pci_bus *bus, unsigned int devfn, int pos, type *value) \
4002 @@ -33,11 +34,32 @@
4003 if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
4004 spin_lock_irqsave(&pci_lock, flags); \
4005 res = bus->ops->read(bus, devfn, pos, len, &data); \
4006 + if (len == 1) \
4007 + *value = (type)((data >> 24) & 0xff); \
4008 + else if (len == 2) \
4009 + *value = (type)((data >> 16) & 0xffff); \
4010 + else \
4011 *value = (type)data; \
4012 spin_unlock_irqrestore(&pci_lock, flags); \
4013 return res; \
4014 }
4015 +#else
4016
4017 +#define PCI_OP_READ(size,type,len) \
4018 +int pci_bus_read_config_##size \
4019 + (struct pci_bus *bus, unsigned int devfn, int pos, type *value) \
4020 +{ \
4021 + int res; \
4022 + unsigned long flags; \
4023 + u32 data = 0; \
4024 + if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
4025 + spin_lock_irqsave(&pci_lock, flags); \
4026 + res = bus->ops->read(bus, devfn, pos, len, &data); \
4027 + *value = (type)data; \
4028 + spin_unlock_irqrestore(&pci_lock, flags); \
4029 + return res; \
4030 +}
4031 +#endif
4032 #define PCI_OP_WRITE(size,type,len) \
4033 int pci_bus_write_config_##size \
4034 (struct pci_bus *bus, unsigned int devfn, int pos, type value) \
4035 diff -Nur linux-2.6.21.1/drivers/pci/access.c.orig linux-2.6.21.1-owrt/drivers/pci/access.c.orig
4036 --- linux-2.6.21.1/drivers/pci/access.c.orig 1970-01-01 01:00:00.000000000 +0100
4037 +++ linux-2.6.21.1-owrt/drivers/pci/access.c.orig 2007-04-27 23:49:26.000000000 +0200
4038 @@ -0,0 +1,173 @@
4039 +#include <linux/pci.h>
4040 +#include <linux/module.h>
4041 +#include <linux/sched.h>
4042 +#include <linux/ioport.h>
4043 +#include <linux/wait.h>
4044 +
4045 +#include "pci.h"
4046 +
4047 +/*
4048 + * This interrupt-safe spinlock protects all accesses to PCI
4049 + * configuration space.
4050 + */
4051 +
4052 +static DEFINE_SPINLOCK(pci_lock);
4053 +
4054 +/*
4055 + * Wrappers for all PCI configuration access functions. They just check
4056 + * alignment, do locking and call the low-level functions pointed to
4057 + * by pci_dev->ops.
4058 + */
4059 +
4060 +#define PCI_byte_BAD 0
4061 +#define PCI_word_BAD (pos & 1)
4062 +#define PCI_dword_BAD (pos & 3)
4063 +
4064 +#define PCI_OP_READ(size,type,len) \
4065 +int pci_bus_read_config_##size \
4066 + (struct pci_bus *bus, unsigned int devfn, int pos, type *value) \
4067 +{ \
4068 + int res; \
4069 + unsigned long flags; \
4070 + u32 data = 0; \
4071 + if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
4072 + spin_lock_irqsave(&pci_lock, flags); \
4073 + res = bus->ops->read(bus, devfn, pos, len, &data); \
4074 + *value = (type)data; \
4075 + spin_unlock_irqrestore(&pci_lock, flags); \
4076 + return res; \
4077 +}
4078 +
4079 +#define PCI_OP_WRITE(size,type,len) \
4080 +int pci_bus_write_config_##size \
4081 + (struct pci_bus *bus, unsigned int devfn, int pos, type value) \
4082 +{ \
4083 + int res; \
4084 + unsigned long flags; \
4085 + if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
4086 + spin_lock_irqsave(&pci_lock, flags); \
4087 + res = bus->ops->write(bus, devfn, pos, len, value); \
4088 + spin_unlock_irqrestore(&pci_lock, flags); \
4089 + return res; \
4090 +}
4091 +
4092 +PCI_OP_READ(byte, u8, 1)
4093 +PCI_OP_READ(word, u16, 2)
4094 +PCI_OP_READ(dword, u32, 4)
4095 +PCI_OP_WRITE(byte, u8, 1)
4096 +PCI_OP_WRITE(word, u16, 2)
4097 +PCI_OP_WRITE(dword, u32, 4)
4098 +
4099 +EXPORT_SYMBOL(pci_bus_read_config_byte);
4100 +EXPORT_SYMBOL(pci_bus_read_config_word);
4101 +EXPORT_SYMBOL(pci_bus_read_config_dword);
4102 +EXPORT_SYMBOL(pci_bus_write_config_byte);
4103 +EXPORT_SYMBOL(pci_bus_write_config_word);
4104 +EXPORT_SYMBOL(pci_bus_write_config_dword);
4105 +
4106 +/*
4107 + * The following routines are to prevent the user from accessing PCI config
4108 + * space when it's unsafe to do so. Some devices require this during BIST and
4109 + * we're required to prevent it during D-state transitions.
4110 + *
4111 + * We have a bit per device to indicate it's blocked and a global wait queue
4112 + * for callers to sleep on until devices are unblocked.
4113 + */
4114 +static DECLARE_WAIT_QUEUE_HEAD(pci_ucfg_wait);
4115 +
4116 +static noinline void pci_wait_ucfg(struct pci_dev *dev)
4117 +{
4118 + DECLARE_WAITQUEUE(wait, current);
4119 +
4120 + __add_wait_queue(&pci_ucfg_wait, &wait);
4121 + do {
4122 + set_current_state(TASK_UNINTERRUPTIBLE);
4123 + spin_unlock_irq(&pci_lock);
4124 + schedule();
4125 + spin_lock_irq(&pci_lock);
4126 + } while (dev->block_ucfg_access);
4127 + __remove_wait_queue(&pci_ucfg_wait, &wait);
4128 +}
4129 +
4130 +#define PCI_USER_READ_CONFIG(size,type) \
4131 +int pci_user_read_config_##size \
4132 + (struct pci_dev *dev, int pos, type *val) \
4133 +{ \
4134 + int ret = 0; \
4135 + u32 data = -1; \
4136 + if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
4137 + spin_lock_irq(&pci_lock); \
4138 + if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev); \
4139 + ret = dev->bus->ops->read(dev->bus, dev->devfn, \
4140 + pos, sizeof(type), &data); \
4141 + spin_unlock_irq(&pci_lock); \
4142 + *val = (type)data; \
4143 + return ret; \
4144 +}
4145 +
4146 +#define PCI_USER_WRITE_CONFIG(size,type) \
4147 +int pci_user_write_config_##size \
4148 + (struct pci_dev *dev, int pos, type val) \
4149 +{ \
4150 + int ret = -EIO; \
4151 + if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
4152 + spin_lock_irq(&pci_lock); \
4153 + if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev); \
4154 + ret = dev->bus->ops->write(dev->bus, dev->devfn, \
4155 + pos, sizeof(type), val); \
4156 + spin_unlock_irq(&pci_lock); \
4157 + return ret; \
4158 +}
4159 +
4160 +PCI_USER_READ_CONFIG(byte, u8)
4161 +PCI_USER_READ_CONFIG(word, u16)
4162 +PCI_USER_READ_CONFIG(dword, u32)
4163 +PCI_USER_WRITE_CONFIG(byte, u8)
4164 +PCI_USER_WRITE_CONFIG(word, u16)
4165 +PCI_USER_WRITE_CONFIG(dword, u32)
4166 +
4167 +/**
4168 + * pci_block_user_cfg_access - Block userspace PCI config reads/writes
4169 + * @dev: pci device struct
4170 + *
4171 + * When user access is blocked, any reads or writes to config space will
4172 + * sleep until access is unblocked again. We don't allow nesting of
4173 + * block/unblock calls.
4174 + */
4175 +void pci_block_user_cfg_access(struct pci_dev *dev)
4176 +{
4177 + unsigned long flags;
4178 + int was_blocked;
4179 +
4180 + spin_lock_irqsave(&pci_lock, flags);
4181 + was_blocked = dev->block_ucfg_access;
4182 + dev->block_ucfg_access = 1;
4183 + spin_unlock_irqrestore(&pci_lock, flags);
4184 +
4185 + /* If we BUG() inside the pci_lock, we're guaranteed to hose
4186 + * the machine */
4187 + BUG_ON(was_blocked);
4188 +}
4189 +EXPORT_SYMBOL_GPL(pci_block_user_cfg_access);
4190 +
4191 +/**
4192 + * pci_unblock_user_cfg_access - Unblock userspace PCI config reads/writes
4193 + * @dev: pci device struct
4194 + *
4195 + * This function allows userspace PCI config accesses to resume.
4196 + */
4197 +void pci_unblock_user_cfg_access(struct pci_dev *dev)
4198 +{
4199 + unsigned long flags;
4200 +
4201 + spin_lock_irqsave(&pci_lock, flags);
4202 +
4203 + /* This indicates a problem in the caller, but we don't need
4204 + * to kill them, unlike a double-block above. */
4205 + WARN_ON(!dev->block_ucfg_access);
4206 +
4207 + dev->block_ucfg_access = 0;
4208 + wake_up_all(&pci_ucfg_wait);
4209 + spin_unlock_irqrestore(&pci_lock, flags);
4210 +}
4211 +EXPORT_SYMBOL_GPL(pci_unblock_user_cfg_access);
4212 diff -Nur linux-2.6.21.1/drivers/serial/8250.c linux-2.6.21.1-owrt/drivers/serial/8250.c
4213 --- linux-2.6.21.1/drivers/serial/8250.c 2007-04-27 23:49:26.000000000 +0200
4214 +++ linux-2.6.21.1-owrt/drivers/serial/8250.c 2007-05-23 23:37:11.000000000 +0200
4215 @@ -1635,7 +1635,7 @@
4216 {
4217 struct uart_8250_port *up = (struct uart_8250_port *)port;
4218 unsigned long flags;
4219 - unsigned char lsr, iir;
4220 +// unsigned char lsr, iir;
4221 int retval;
4222
4223 up->capabilities = uart_config[up->port.type].flags;
4224 @@ -1772,6 +1772,8 @@
4225
4226 serial8250_set_mctrl(&up->port, up->port.mctrl);
4227
4228 +// For some reason this test causes problems on the AP6x serial console
4229 +#if 0
4230 /*
4231 * Do a quick test to see if we receive an
4232 * interrupt when we enable the TX irq.
4233 @@ -1790,7 +1792,8 @@
4234 } else {
4235 up->bugs &= ~UART_BUG_TXEN;
4236 }
4237 -
4238 +#endif
4239 +
4240 spin_unlock_irqrestore(&up->port.lock, flags);
4241
4242 /*
4243 diff -Nur linux-2.6.21.1/drivers/serial/8250.c.orig linux-2.6.21.1-owrt/drivers/serial/8250.c.orig
4244 --- linux-2.6.21.1/drivers/serial/8250.c.orig 1970-01-01 01:00:00.000000000 +0100
4245 +++ linux-2.6.21.1-owrt/drivers/serial/8250.c.orig 2007-04-27 23:49:26.000000000 +0200
4246 @@ -0,0 +1,2817 @@
4247 +/*
4248 + * linux/drivers/char/8250.c
4249 + *
4250 + * Driver for 8250/16550-type serial ports
4251 + *
4252 + * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
4253 + *
4254 + * Copyright (C) 2001 Russell King.
4255 + *
4256 + * This program is free software; you can redistribute it and/or modify
4257 + * it under the terms of the GNU General Public License as published by
4258 + * the Free Software Foundation; either version 2 of the License, or
4259 + * (at your option) any later version.
4260 + *
4261 + * $Id: 8250.c,v 1.90 2002/07/28 10:03:27 rmk Exp $
4262 + *
4263 + * A note about mapbase / membase
4264 + *
4265 + * mapbase is the physical address of the IO port.
4266 + * membase is an 'ioremapped' cookie.
4267 + */
4268 +
4269 +#if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
4270 +#define SUPPORT_SYSRQ
4271 +#endif
4272 +
4273 +#include <linux/module.h>
4274 +#include <linux/moduleparam.h>
4275 +#include <linux/ioport.h>
4276 +#include <linux/init.h>
4277 +#include <linux/console.h>
4278 +#include <linux/sysrq.h>
4279 +#include <linux/delay.h>
4280 +#include <linux/platform_device.h>
4281 +#include <linux/tty.h>
4282 +#include <linux/tty_flip.h>
4283 +#include <linux/serial_reg.h>
4284 +#include <linux/serial_core.h>
4285 +#include <linux/serial.h>
4286 +#include <linux/serial_8250.h>
4287 +#include <linux/nmi.h>
4288 +#include <linux/mutex.h>
4289 +
4290 +#include <asm/io.h>
4291 +#include <asm/irq.h>
4292 +
4293 +#include "8250.h"
4294 +
4295 +/*
4296 + * Configuration:
4297 + * share_irqs - whether we pass IRQF_SHARED to request_irq(). This option
4298 + * is unsafe when used on edge-triggered interrupts.
4299 + */
4300 +static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
4301 +
4302 +static unsigned int nr_uarts = CONFIG_SERIAL_8250_RUNTIME_UARTS;
4303 +
4304 +/*
4305 + * Debugging.
4306 + */
4307 +#if 0
4308 +#define DEBUG_AUTOCONF(fmt...) printk(fmt)
4309 +#else
4310 +#define DEBUG_AUTOCONF(fmt...) do { } while (0)
4311 +#endif
4312 +
4313 +#if 0
4314 +#define DEBUG_INTR(fmt...) printk(fmt)
4315 +#else
4316 +#define DEBUG_INTR(fmt...) do { } while (0)
4317 +#endif
4318 +
4319 +#define PASS_LIMIT 256
4320 +
4321 +/*
4322 + * We default to IRQ0 for the "no irq" hack. Some
4323 + * machine types want others as well - they're free
4324 + * to redefine this in their header file.
4325 + */
4326 +#define is_real_interrupt(irq) ((irq) != 0)
4327 +
4328 +#ifdef CONFIG_SERIAL_8250_DETECT_IRQ
4329 +#define CONFIG_SERIAL_DETECT_IRQ 1
4330 +#endif
4331 +#ifdef CONFIG_SERIAL_8250_MANY_PORTS
4332 +#define CONFIG_SERIAL_MANY_PORTS 1
4333 +#endif
4334 +
4335 +/*
4336 + * HUB6 is always on. This will be removed once the header
4337 + * files have been cleaned.
4338 + */
4339 +#define CONFIG_HUB6 1
4340 +
4341 +#include <asm/serial.h>
4342 +
4343 +/*
4344 + * SERIAL_PORT_DFNS tells us about built-in ports that have no
4345 + * standard enumeration mechanism. Platforms that can find all
4346 + * serial ports via mechanisms like ACPI or PCI need not supply it.
4347 + */
4348 +#ifndef SERIAL_PORT_DFNS
4349 +#define SERIAL_PORT_DFNS
4350 +#endif
4351 +
4352 +static const struct old_serial_port old_serial_port[] = {
4353 + SERIAL_PORT_DFNS /* defined in asm/serial.h */
4354 +};
4355 +
4356 +#define UART_NR CONFIG_SERIAL_8250_NR_UARTS
4357 +
4358 +#ifdef CONFIG_SERIAL_8250_RSA
4359 +
4360 +#define PORT_RSA_MAX 4
4361 +static unsigned long probe_rsa[PORT_RSA_MAX];
4362 +static unsigned int probe_rsa_count;
4363 +#endif /* CONFIG_SERIAL_8250_RSA */
4364 +
4365 +struct uart_8250_port {
4366 + struct uart_port port;
4367 + struct timer_list timer; /* "no irq" timer */
4368 + struct list_head list; /* ports on this IRQ */
4369 + unsigned short capabilities; /* port capabilities */
4370 + unsigned short bugs; /* port bugs */
4371 + unsigned int tx_loadsz; /* transmit fifo load size */
4372 + unsigned char acr;
4373 + unsigned char ier;
4374 + unsigned char lcr;
4375 + unsigned char mcr;
4376 + unsigned char mcr_mask; /* mask of user bits */
4377 + unsigned char mcr_force; /* mask of forced bits */
4378 + unsigned char lsr_break_flag;
4379 +
4380 + /*
4381 + * We provide a per-port pm hook.
4382 + */
4383 + void (*pm)(struct uart_port *port,
4384 + unsigned int state, unsigned int old);
4385 +};
4386 +
4387 +struct irq_info {
4388 + spinlock_t lock;
4389 + struct list_head *head;
4390 +};
4391 +
4392 +static struct irq_info irq_lists[NR_IRQS];
4393 +
4394 +/*
4395 + * Here we define the default xmit fifo size used for each type of UART.
4396 + */
4397 +static const struct serial8250_config uart_config[] = {
4398 + [PORT_UNKNOWN] = {
4399 + .name = "unknown",
4400 + .fifo_size = 1,
4401 + .tx_loadsz = 1,
4402 + },
4403 + [PORT_8250] = {
4404 + .name = "8250",
4405 + .fifo_size = 1,
4406 + .tx_loadsz = 1,
4407 + },
4408 + [PORT_16450] = {
4409 + .name = "16450",
4410 + .fifo_size = 1,
4411 + .tx_loadsz = 1,
4412 + },
4413 + [PORT_16550] = {
4414 + .name = "16550",
4415 + .fifo_size = 1,
4416 + .tx_loadsz = 1,
4417 + },
4418 + [PORT_16550A] = {
4419 + .name = "16550A",
4420 + .fifo_size = 16,
4421 + .tx_loadsz = 16,
4422 + .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
4423 + .flags = UART_CAP_FIFO,
4424 + },
4425 + [PORT_CIRRUS] = {
4426 + .name = "Cirrus",
4427 + .fifo_size = 1,
4428 + .tx_loadsz = 1,
4429 + },
4430 + [PORT_16650] = {
4431 + .name = "ST16650",
4432 + .fifo_size = 1,
4433 + .tx_loadsz = 1,
4434 + .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
4435 + },
4436 + [PORT_16650V2] = {
4437 + .name = "ST16650V2",
4438 + .fifo_size = 32,
4439 + .tx_loadsz = 16,
4440 + .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
4441 + UART_FCR_T_TRIG_00,
4442 + .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
4443 + },
4444 + [PORT_16750] = {
4445 + .name = "TI16750",
4446 + .fifo_size = 64,
4447 + .tx_loadsz = 64,
4448 + .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
4449 + UART_FCR7_64BYTE,
4450 + .flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,
4451 + },
4452 + [PORT_STARTECH] = {
4453 + .name = "Startech",
4454 + .fifo_size = 1,
4455 + .tx_loadsz = 1,
4456 + },
4457 + [PORT_16C950] = {
4458 + .name = "16C950/954",
4459 + .fifo_size = 128,
4460 + .tx_loadsz = 128,
4461 + .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
4462 + .flags = UART_CAP_FIFO,
4463 + },
4464 + [PORT_16654] = {
4465 + .name = "ST16654",
4466 + .fifo_size = 64,
4467 + .tx_loadsz = 32,
4468 + .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
4469 + UART_FCR_T_TRIG_10,
4470 + .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
4471 + },
4472 + [PORT_16850] = {
4473 + .name = "XR16850",
4474 + .fifo_size = 128,
4475 + .tx_loadsz = 128,
4476 + .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
4477 + .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
4478 + },
4479 + [PORT_RSA] = {
4480 + .name = "RSA",
4481 + .fifo_size = 2048,
4482 + .tx_loadsz = 2048,
4483 + .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,
4484 + .flags = UART_CAP_FIFO,
4485 + },
4486 + [PORT_NS16550A] = {
4487 + .name = "NS16550A",
4488 + .fifo_size = 16,
4489 + .tx_loadsz = 16,
4490 + .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
4491 + .flags = UART_CAP_FIFO | UART_NATSEMI,
4492 + },
4493 + [PORT_XSCALE] = {
4494 + .name = "XScale",
4495 + .fifo_size = 32,
4496 + .tx_loadsz = 32,
4497 + .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
4498 + .flags = UART_CAP_FIFO | UART_CAP_UUE,
4499 + },
4500 +};
4501 +
4502 +#ifdef CONFIG_SERIAL_8250_AU1X00
4503 +
4504 +/* Au1x00 UART hardware has a weird register layout */
4505 +static const u8 au_io_in_map[] = {
4506 + [UART_RX] = 0,
4507 + [UART_IER] = 2,
4508 + [UART_IIR] = 3,
4509 + [UART_LCR] = 5,
4510 + [UART_MCR] = 6,
4511 + [UART_LSR] = 7,
4512 + [UART_MSR] = 8,
4513 +};
4514 +
4515 +static const u8 au_io_out_map[] = {
4516 + [UART_TX] = 1,
4517 + [UART_IER] = 2,
4518 + [UART_FCR] = 4,
4519 + [UART_LCR] = 5,
4520 + [UART_MCR] = 6,
4521 +};
4522 +
4523 +/* sane hardware needs no mapping */
4524 +static inline int map_8250_in_reg(struct uart_8250_port *up, int offset)
4525 +{
4526 + if (up->port.iotype != UPIO_AU)
4527 + return offset;
4528 + return au_io_in_map[offset];
4529 +}
4530 +
4531 +static inline int map_8250_out_reg(struct uart_8250_port *up, int offset)
4532 +{
4533 + if (up->port.iotype != UPIO_AU)
4534 + return offset;
4535 + return au_io_out_map[offset];
4536 +}
4537 +
4538 +#else
4539 +
4540 +/* sane hardware needs no mapping */
4541 +#define map_8250_in_reg(up, offset) (offset)
4542 +#define map_8250_out_reg(up, offset) (offset)
4543 +
4544 +#endif
4545 +
4546 +static unsigned int serial_in(struct uart_8250_port *up, int offset)
4547 +{
4548 + unsigned int tmp;
4549 + offset = map_8250_in_reg(up, offset) << up->port.regshift;
4550 +
4551 + switch (up->port.iotype) {
4552 + case UPIO_HUB6:
4553 + outb(up->port.hub6 - 1 + offset, up->port.iobase);
4554 + return inb(up->port.iobase + 1);
4555 +
4556 + case UPIO_MEM:
4557 + return readb(up->port.membase + offset);
4558 +
4559 + case UPIO_MEM32:
4560 + return readl(up->port.membase + offset);
4561 +
4562 +#ifdef CONFIG_SERIAL_8250_AU1X00
4563 + case UPIO_AU:
4564 + return __raw_readl(up->port.membase + offset);
4565 +#endif
4566 +
4567 + case UPIO_TSI:
4568 + if (offset == UART_IIR) {
4569 + tmp = readl(up->port.membase + (UART_IIR & ~3));
4570 + return (tmp >> 16) & 0xff; /* UART_IIR % 4 == 2 */
4571 + } else
4572 + return readb(up->port.membase + offset);
4573 +
4574 + default:
4575 + return inb(up->port.iobase + offset);
4576 + }
4577 +}
4578 +
4579 +static void
4580 +serial_out(struct uart_8250_port *up, int offset, int value)
4581 +{
4582 + offset = map_8250_out_reg(up, offset) << up->port.regshift;
4583 +
4584 + switch (up->port.iotype) {
4585 + case UPIO_HUB6:
4586 + outb(up->port.hub6 - 1 + offset, up->port.iobase);
4587 + outb(value, up->port.iobase + 1);
4588 + break;
4589 +
4590 + case UPIO_MEM:
4591 + writeb(value, up->port.membase + offset);
4592 + break;
4593 +
4594 + case UPIO_MEM32:
4595 + writel(value, up->port.membase + offset);
4596 + break;
4597 +
4598 +#ifdef CONFIG_SERIAL_8250_AU1X00
4599 + case UPIO_AU:
4600 + __raw_writel(value, up->port.membase + offset);
4601 + break;
4602 +#endif
4603 + case UPIO_TSI:
4604 + if (!((offset == UART_IER) && (value & UART_IER_UUE)))
4605 + writeb(value, up->port.membase + offset);
4606 + break;
4607 +
4608 + default:
4609 + outb(value, up->port.iobase + offset);
4610 + }
4611 +}
4612 +
4613 +static void
4614 +serial_out_sync(struct uart_8250_port *up, int offset, int value)
4615 +{
4616 + switch (up->port.iotype) {
4617 + case UPIO_MEM:
4618 + case UPIO_MEM32:
4619 +#ifdef CONFIG_SERIAL_8250_AU1X00
4620 + case UPIO_AU:
4621 +#endif
4622 + serial_out(up, offset, value);
4623 + serial_in(up, UART_LCR); /* safe, no side-effects */
4624 + break;
4625 + default:
4626 + serial_out(up, offset, value);
4627 + }
4628 +}
4629 +
4630 +/*
4631 + * We used to support using pause I/O for certain machines. We
4632 + * haven't supported this for a while, but just in case it's badly
4633 + * needed for certain old 386 machines, I've left these #define's
4634 + * in....
4635 + */
4636 +#define serial_inp(up, offset) serial_in(up, offset)
4637 +#define serial_outp(up, offset, value) serial_out(up, offset, value)
4638 +
4639 +/* Uart divisor latch read */
4640 +static inline int _serial_dl_read(struct uart_8250_port *up)
4641 +{
4642 + return serial_inp(up, UART_DLL) | serial_inp(up, UART_DLM) << 8;
4643 +}
4644 +
4645 +/* Uart divisor latch write */
4646 +static inline void _serial_dl_write(struct uart_8250_port *up, int value)
4647 +{
4648 + serial_outp(up, UART_DLL, value & 0xff);
4649 + serial_outp(up, UART_DLM, value >> 8 & 0xff);
4650 +}
4651 +
4652 +#ifdef CONFIG_SERIAL_8250_AU1X00
4653 +/* Au1x00 haven't got a standard divisor latch */
4654 +static int serial_dl_read(struct uart_8250_port *up)
4655 +{
4656 + if (up->port.iotype == UPIO_AU)
4657 + return __raw_readl(up->port.membase + 0x28);
4658 + else
4659 + return _serial_dl_read(up);
4660 +}
4661 +
4662 +static void serial_dl_write(struct uart_8250_port *up, int value)
4663 +{
4664 + if (up->port.iotype == UPIO_AU)
4665 + __raw_writel(value, up->port.membase + 0x28);
4666 + else
4667 + _serial_dl_write(up, value);
4668 +}
4669 +#else
4670 +#define serial_dl_read(up) _serial_dl_read(up)
4671 +#define serial_dl_write(up, value) _serial_dl_write(up, value)
4672 +#endif
4673 +
4674 +/*
4675 + * For the 16C950
4676 + */
4677 +static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
4678 +{
4679 + serial_out(up, UART_SCR, offset);
4680 + serial_out(up, UART_ICR, value);
4681 +}
4682 +
4683 +static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
4684 +{
4685 + unsigned int value;
4686 +
4687 + serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
4688 + serial_out(up, UART_SCR, offset);
4689 + value = serial_in(up, UART_ICR);
4690 + serial_icr_write(up, UART_ACR, up->acr);
4691 +
4692 + return value;
4693 +}
4694 +
4695 +/*
4696 + * FIFO support.
4697 + */
4698 +static inline void serial8250_clear_fifos(struct uart_8250_port *p)
4699 +{
4700 + if (p->capabilities & UART_CAP_FIFO) {
4701 + serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO);
4702 + serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO |
4703 + UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
4704 + serial_outp(p, UART_FCR, 0);
4705 + }
4706 +}
4707 +
4708 +/*
4709 + * IER sleep support. UARTs which have EFRs need the "extended
4710 + * capability" bit enabled. Note that on XR16C850s, we need to
4711 + * reset LCR to write to IER.
4712 + */
4713 +static inline void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
4714 +{
4715 + if (p->capabilities & UART_CAP_SLEEP) {
4716 + if (p->capabilities & UART_CAP_EFR) {
4717 + serial_outp(p, UART_LCR, 0xBF);
4718 + serial_outp(p, UART_EFR, UART_EFR_ECB);
4719 + serial_outp(p, UART_LCR, 0);
4720 + }
4721 + serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
4722 + if (p->capabilities & UART_CAP_EFR) {
4723 + serial_outp(p, UART_LCR, 0xBF);
4724 + serial_outp(p, UART_EFR, 0);
4725 + serial_outp(p, UART_LCR, 0);
4726 + }
4727 + }
4728 +}
4729 +
4730 +#ifdef CONFIG_SERIAL_8250_RSA
4731 +/*
4732 + * Attempts to turn on the RSA FIFO. Returns zero on failure.
4733 + * We set the port uart clock rate if we succeed.
4734 + */
4735 +static int __enable_rsa(struct uart_8250_port *up)
4736 +{
4737 + unsigned char mode;
4738 + int result;
4739 +
4740 + mode = serial_inp(up, UART_RSA_MSR);
4741 + result = mode & UART_RSA_MSR_FIFO;
4742 +
4743 + if (!result) {
4744 + serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
4745 + mode = serial_inp(up, UART_RSA_MSR);
4746 + result = mode & UART_RSA_MSR_FIFO;
4747 + }
4748 +
4749 + if (result)
4750 + up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
4751 +
4752 + return result;
4753 +}
4754 +
4755 +static void enable_rsa(struct uart_8250_port *up)
4756 +{
4757 + if (up->port.type == PORT_RSA) {
4758 + if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
4759 + spin_lock_irq(&up->port.lock);
4760 + __enable_rsa(up);
4761 + spin_unlock_irq(&up->port.lock);
4762 + }
4763 + if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
4764 + serial_outp(up, UART_RSA_FRR, 0);
4765 + }
4766 +}
4767 +
4768 +/*
4769 + * Attempts to turn off the RSA FIFO. Returns zero on failure.
4770 + * It is unknown why interrupts were disabled in here. However,
4771 + * the caller is expected to preserve this behaviour by grabbing
4772 + * the spinlock before calling this function.
4773 + */
4774 +static void disable_rsa(struct uart_8250_port *up)
4775 +{
4776 + unsigned char mode;
4777 + int result;
4778 +
4779 + if (up->port.type == PORT_RSA &&
4780 + up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
4781 + spin_lock_irq(&up->port.lock);
4782 +
4783 + mode = serial_inp(up, UART_RSA_MSR);
4784 + result = !(mode & UART_RSA_MSR_FIFO);
4785 +
4786 + if (!result) {
4787 + serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
4788 + mode = serial_inp(up, UART_RSA_MSR);
4789 + result = !(mode & UART_RSA_MSR_FIFO);
4790 + }
4791 +
4792 + if (result)
4793 + up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
4794 + spin_unlock_irq(&up->port.lock);
4795 + }
4796 +}
4797 +#endif /* CONFIG_SERIAL_8250_RSA */
4798 +
4799 +/*
4800 + * This is a quickie test to see how big the FIFO is.
4801 + * It doesn't work at all the time, more's the pity.
4802 + */
4803 +static int size_fifo(struct uart_8250_port *up)
4804 +{
4805 + unsigned char old_fcr, old_mcr, old_lcr;
4806 + unsigned short old_dl;
4807 + int count;
4808 +
4809 + old_lcr = serial_inp(up, UART_LCR);
4810 + serial_outp(up, UART_LCR, 0);
4811 + old_fcr = serial_inp(up, UART_FCR);
4812 + old_mcr = serial_inp(up, UART_MCR);
4813 + serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
4814 + UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
4815 + serial_outp(up, UART_MCR, UART_MCR_LOOP);
4816 + serial_outp(up, UART_LCR, UART_LCR_DLAB);
4817 + old_dl = serial_dl_read(up);
4818 + serial_dl_write(up, 0x0001);
4819 + serial_outp(up, UART_LCR, 0x03);
4820 + for (count = 0; count < 256; count++)
4821 + serial_outp(up, UART_TX, count);
4822 + mdelay(20);/* FIXME - schedule_timeout */
4823 + for (count = 0; (serial_inp(up, UART_LSR) & UART_LSR_DR) &&
4824 + (count < 256); count++)
4825 + serial_inp(up, UART_RX);
4826 + serial_outp(up, UART_FCR, old_fcr);
4827 + serial_outp(up, UART_MCR, old_mcr);
4828 + serial_outp(up, UART_LCR, UART_LCR_DLAB);
4829 + serial_dl_write(up, old_dl);
4830 + serial_outp(up, UART_LCR, old_lcr);
4831 +
4832 + return count;
4833 +}
4834 +
4835 +/*
4836 + * Read UART ID using the divisor method - set DLL and DLM to zero
4837 + * and the revision will be in DLL and device type in DLM. We
4838 + * preserve the device state across this.
4839 + */
4840 +static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
4841 +{
4842 + unsigned char old_dll, old_dlm, old_lcr;
4843 + unsigned int id;
4844 +
4845 + old_lcr = serial_inp(p, UART_LCR);
4846 + serial_outp(p, UART_LCR, UART_LCR_DLAB);
4847 +
4848 + old_dll = serial_inp(p, UART_DLL);
4849 + old_dlm = serial_inp(p, UART_DLM);
4850 +
4851 + serial_outp(p, UART_DLL, 0);
4852 + serial_outp(p, UART_DLM, 0);
4853 +
4854 + id = serial_inp(p, UART_DLL) | serial_inp(p, UART_DLM) << 8;
4855 +
4856 + serial_outp(p, UART_DLL, old_dll);
4857 + serial_outp(p, UART_DLM, old_dlm);
4858 + serial_outp(p, UART_LCR, old_lcr);
4859 +
4860 + return id;
4861 +}
4862 +
4863 +/*
4864 + * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
4865 + * When this function is called we know it is at least a StarTech
4866 + * 16650 V2, but it might be one of several StarTech UARTs, or one of
4867 + * its clones. (We treat the broken original StarTech 16650 V1 as a
4868 + * 16550, and why not? Startech doesn't seem to even acknowledge its
4869 + * existence.)
4870 + *
4871 + * What evil have men's minds wrought...
4872 + */
4873 +static void autoconfig_has_efr(struct uart_8250_port *up)
4874 +{
4875 + unsigned int id1, id2, id3, rev;
4876 +
4877 + /*
4878 + * Everything with an EFR has SLEEP
4879 + */
4880 + up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
4881 +
4882 + /*
4883 + * First we check to see if it's an Oxford Semiconductor UART.
4884 + *
4885 + * If we have to do this here because some non-National
4886 + * Semiconductor clone chips lock up if you try writing to the
4887 + * LSR register (which serial_icr_read does)
4888 + */
4889 +
4890 + /*
4891 + * Check for Oxford Semiconductor 16C950.
4892 + *
4893 + * EFR [4] must be set else this test fails.
4894 + *
4895 + * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
4896 + * claims that it's needed for 952 dual UART's (which are not
4897 + * recommended for new designs).
4898 + */
4899 + up->acr = 0;
4900 + serial_out(up, UART_LCR, 0xBF);
4901 + serial_out(up, UART_EFR, UART_EFR_ECB);
4902 + serial_out(up, UART_LCR, 0x00);
4903 + id1 = serial_icr_read(up, UART_ID1);
4904 + id2 = serial_icr_read(up, UART_ID2);
4905 + id3 = serial_icr_read(up, UART_ID3);
4906 + rev = serial_icr_read(up, UART_REV);
4907 +
4908 + DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);
4909 +
4910 + if (id1 == 0x16 && id2 == 0xC9 &&
4911 + (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
4912 + up->port.type = PORT_16C950;
4913 +
4914 + /*
4915 + * Enable work around for the Oxford Semiconductor 952 rev B
4916 + * chip which causes it to seriously miscalculate baud rates
4917 + * when DLL is 0.
4918 + */
4919 + if (id3 == 0x52 && rev == 0x01)
4920 + up->bugs |= UART_BUG_QUOT;
4921 + return;
4922 + }
4923 +
4924 + /*
4925 + * We check for a XR16C850 by setting DLL and DLM to 0, and then
4926 + * reading back DLL and DLM. The chip type depends on the DLM
4927 + * value read back:
4928 + * 0x10 - XR16C850 and the DLL contains the chip revision.
4929 + * 0x12 - XR16C2850.
4930 + * 0x14 - XR16C854.
4931 + */
4932 + id1 = autoconfig_read_divisor_id(up);
4933 + DEBUG_AUTOCONF("850id=%04x ", id1);
4934 +
4935 + id2 = id1 >> 8;
4936 + if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {
4937 + up->port.type = PORT_16850;
4938 + return;
4939 + }
4940 +
4941 + /*
4942 + * It wasn't an XR16C850.
4943 + *
4944 + * We distinguish between the '654 and the '650 by counting
4945 + * how many bytes are in the FIFO. I'm using this for now,
4946 + * since that's the technique that was sent to me in the
4947 + * serial driver update, but I'm not convinced this works.
4948 + * I've had problems doing this in the past. -TYT
4949 + */
4950 + if (size_fifo(up) == 64)
4951 + up->port.type = PORT_16654;
4952 + else
4953 + up->port.type = PORT_16650V2;
4954 +}
4955 +
4956 +/*
4957 + * We detected a chip without a FIFO. Only two fall into
4958 + * this category - the original 8250 and the 16450. The
4959 + * 16450 has a scratch register (accessible with LCR=0)
4960 + */
4961 +static void autoconfig_8250(struct uart_8250_port *up)
4962 +{
4963 + unsigned char scratch, status1, status2;
4964 +
4965 + up->port.type = PORT_8250;
4966 +
4967 + scratch = serial_in(up, UART_SCR);
4968 + serial_outp(up, UART_SCR, 0xa5);
4969 + status1 = serial_in(up, UART_SCR);
4970 + serial_outp(up, UART_SCR, 0x5a);
4971 + status2 = serial_in(up, UART_SCR);
4972 + serial_outp(up, UART_SCR, scratch);
4973 +
4974 + if (status1 == 0xa5 && status2 == 0x5a)
4975 + up->port.type = PORT_16450;
4976 +}
4977 +
4978 +static int broken_efr(struct uart_8250_port *up)
4979 +{
4980 + /*
4981 + * Exar ST16C2550 "A2" devices incorrectly detect as
4982 + * having an EFR, and report an ID of 0x0201. See
4983 + * http://www.exar.com/info.php?pdf=dan180_oct2004.pdf
4984 + */
4985 + if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)
4986 + return 1;
4987 +
4988 + return 0;
4989 +}
4990 +
4991 +/*
4992 + * We know that the chip has FIFOs. Does it have an EFR? The
4993 + * EFR is located in the same register position as the IIR and
4994 + * we know the top two bits of the IIR are currently set. The
4995 + * EFR should contain zero. Try to read the EFR.
4996 + */
4997 +static void autoconfig_16550a(struct uart_8250_port *up)
4998 +{
4999 + unsigned char status1, status2;
5000 + unsigned int iersave;
5001 +
5002 + up->port.type = PORT_16550A;
5003 + up->capabilities |= UART_CAP_FIFO;
5004 +
5005 + /*
5006 + * Check for presence of the EFR when DLAB is set.
5007 + * Only ST16C650V1 UARTs pass this test.
5008 + */
5009 + serial_outp(up, UART_LCR, UART_LCR_DLAB);
5010 + if (serial_in(up, UART_EFR) == 0) {
5011 + serial_outp(up, UART_EFR, 0xA8);
5012 + if (serial_in(up, UART_EFR) != 0) {
5013 + DEBUG_AUTOCONF("EFRv1 ");
5014 + up->port.type = PORT_16650;
5015 + up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
5016 + } else {
5017 + DEBUG_AUTOCONF("Motorola 8xxx DUART ");
5018 + }
5019 + serial_outp(up, UART_EFR, 0);
5020 + return;
5021 + }
5022 +
5023 + /*
5024 + * Maybe it requires 0xbf to be written to the LCR.
5025 + * (other ST16C650V2 UARTs, TI16C752A, etc)
5026 + */
5027 + serial_outp(up, UART_LCR, 0xBF);
5028 + if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
5029 + DEBUG_AUTOCONF("EFRv2 ");
5030 + autoconfig_has_efr(up);
5031 + return;
5032 + }
5033 +
5034 + /*
5035 + * Check for a National Semiconductor SuperIO chip.
5036 + * Attempt to switch to bank 2, read the value of the LOOP bit
5037 + * from EXCR1. Switch back to bank 0, change it in MCR. Then
5038 + * switch back to bank 2, read it from EXCR1 again and check
5039 + * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
5040 + */
5041 + serial_outp(up, UART_LCR, 0);
5042 + status1 = serial_in(up, UART_MCR);
5043 + serial_outp(up, UART_LCR, 0xE0);
5044 + status2 = serial_in(up, 0x02); /* EXCR1 */
5045 +
5046 + if (!((status2 ^ status1) & UART_MCR_LOOP)) {
5047 + serial_outp(up, UART_LCR, 0);
5048 + serial_outp(up, UART_MCR, status1 ^ UART_MCR_LOOP);
5049 + serial_outp(up, UART_LCR, 0xE0);
5050 + status2 = serial_in(up, 0x02); /* EXCR1 */
5051 + serial_outp(up, UART_LCR, 0);
5052 + serial_outp(up, UART_MCR, status1);
5053 +
5054 + if ((status2 ^ status1) & UART_MCR_LOOP) {
5055 + unsigned short quot;
5056 +
5057 + serial_outp(up, UART_LCR, 0xE0);
5058 +
5059 + quot = serial_dl_read(up);
5060 + quot <<= 3;
5061 +
5062 + status1 = serial_in(up, 0x04); /* EXCR1 */
5063 + status1 &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
5064 + status1 |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
5065 + serial_outp(up, 0x04, status1);
5066 +
5067 + serial_dl_write(up, quot);
5068 +
5069 + serial_outp(up, UART_LCR, 0);
5070 +
5071 + up->port.uartclk = 921600*16;
5072 + up->port.type = PORT_NS16550A;
5073 + up->capabilities |= UART_NATSEMI;
5074 + return;
5075 + }
5076 + }
5077 +
5078 + /*
5079 + * No EFR. Try to detect a TI16750, which only sets bit 5 of
5080 + * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
5081 + * Try setting it with and without DLAB set. Cheap clones
5082 + * set bit 5 without DLAB set.
5083 + */
5084 + serial_outp(up, UART_LCR, 0);
5085 + serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
5086 + status1 = serial_in(up, UART_IIR) >> 5;
5087 + serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
5088 + serial_outp(up, UART_LCR, UART_LCR_DLAB);
5089 + serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
5090 + status2 = serial_in(up, UART_IIR) >> 5;
5091 + serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
5092 + serial_outp(up, UART_LCR, 0);
5093 +
5094 + DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
5095 +
5096 + if (status1 == 6 && status2 == 7) {
5097 + up->port.type = PORT_16750;
5098 + up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;
5099 + return;
5100 + }
5101 +
5102 + /*
5103 + * Try writing and reading the UART_IER_UUE bit (b6).
5104 + * If it works, this is probably one of the Xscale platform's
5105 + * internal UARTs.
5106 + * We're going to explicitly set the UUE bit to 0 before
5107 + * trying to write and read a 1 just to make sure it's not
5108 + * already a 1 and maybe locked there before we even start start.
5109 + */
5110 + iersave = serial_in(up, UART_IER);
5111 + serial_outp(up, UART_IER, iersave & ~UART_IER_UUE);
5112 + if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
5113 + /*
5114 + * OK it's in a known zero state, try writing and reading
5115 + * without disturbing the current state of the other bits.
5116 + */
5117 + serial_outp(up, UART_IER, iersave | UART_IER_UUE);
5118 + if (serial_in(up, UART_IER) & UART_IER_UUE) {
5119 + /*
5120 + * It's an Xscale.
5121 + * We'll leave the UART_IER_UUE bit set to 1 (enabled).
5122 + */
5123 + DEBUG_AUTOCONF("Xscale ");
5124 + up->port.type = PORT_XSCALE;
5125 + up->capabilities |= UART_CAP_UUE;
5126 + return;
5127 + }
5128 + } else {
5129 + /*
5130 + * If we got here we couldn't force the IER_UUE bit to 0.
5131 + * Log it and continue.
5132 + */
5133 + DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
5134 + }
5135 + serial_outp(up, UART_IER, iersave);
5136 +}
5137 +
5138 +/*
5139 + * This routine is called by rs_init() to initialize a specific serial
5140 + * port. It determines what type of UART chip this serial port is
5141 + * using: 8250, 16450, 16550, 16550A. The important question is
5142 + * whether or not this UART is a 16550A or not, since this will
5143 + * determine whether or not we can use its FIFO features or not.
5144 + */
5145 +static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
5146 +{
5147 + unsigned char status1, scratch, scratch2, scratch3;
5148 + unsigned char save_lcr, save_mcr;
5149 + unsigned long flags;
5150 +
5151 + if (!up->port.iobase && !up->port.mapbase && !up->port.membase)
5152 + return;
5153 +
5154 + DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04x, 0x%p): ",
5155 + up->port.line, up->port.iobase, up->port.membase);
5156 +
5157 + /*
5158 + * We really do need global IRQs disabled here - we're going to
5159 + * be frobbing the chips IRQ enable register to see if it exists.
5160 + */
5161 + spin_lock_irqsave(&up->port.lock, flags);
5162 +// save_flags(flags); cli();
5163 +
5164 + up->capabilities = 0;
5165 + up->bugs = 0;
5166 +
5167 + if (!(up->port.flags & UPF_BUGGY_UART)) {
5168 + /*
5169 + * Do a simple existence test first; if we fail this,
5170 + * there's no point trying anything else.
5171 + *
5172 + * 0x80 is used as a nonsense port to prevent against
5173 + * false positives due to ISA bus float. The
5174 + * assumption is that 0x80 is a non-existent port;
5175 + * which should be safe since include/asm/io.h also
5176 + * makes this assumption.
5177 + *
5178 + * Note: this is safe as long as MCR bit 4 is clear
5179 + * and the device is in "PC" mode.
5180 + */
5181 + scratch = serial_inp(up, UART_IER);
5182 + serial_outp(up, UART_IER, 0);
5183 +#ifdef __i386__
5184 + outb(0xff, 0x080);
5185 +#endif
5186 + /*
5187 + * Mask out IER[7:4] bits for test as some UARTs (e.g. TL
5188 + * 16C754B) allow only to modify them if an EFR bit is set.
5189 + */
5190 + scratch2 = serial_inp(up, UART_IER) & 0x0f;
5191 + serial_outp(up, UART_IER, 0x0F);
5192 +#ifdef __i386__
5193 + outb(0, 0x080);
5194 +#endif
5195 + scratch3 = serial_inp(up, UART_IER) & 0x0f;
5196 + serial_outp(up, UART_IER, scratch);
5197 + if (scratch2 != 0 || scratch3 != 0x0F) {
5198 + /*
5199 + * We failed; there's nothing here
5200 + */
5201 + DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
5202 + scratch2, scratch3);
5203 + goto out;
5204 + }
5205 + }
5206 +
5207 + save_mcr = serial_in(up, UART_MCR);
5208 + save_lcr = serial_in(up, UART_LCR);
5209 +
5210 + /*
5211 + * Check to see if a UART is really there. Certain broken
5212 + * internal modems based on the Rockwell chipset fail this
5213 + * test, because they apparently don't implement the loopback
5214 + * test mode. So this test is skipped on the COM 1 through
5215 + * COM 4 ports. This *should* be safe, since no board
5216 + * manufacturer would be stupid enough to design a board
5217 + * that conflicts with COM 1-4 --- we hope!
5218 + */
5219 + if (!(up->port.flags & UPF_SKIP_TEST)) {
5220 + serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
5221 + status1 = serial_inp(up, UART_MSR) & 0xF0;
5222 + serial_outp(up, UART_MCR, save_mcr);
5223 + if (status1 != 0x90) {
5224 + DEBUG_AUTOCONF("LOOP test failed (%02x) ",
5225 + status1);
5226 + goto out;
5227 + }
5228 + }
5229 +
5230 + /*
5231 + * We're pretty sure there's a port here. Lets find out what
5232 + * type of port it is. The IIR top two bits allows us to find
5233 + * out if it's 8250 or 16450, 16550, 16550A or later. This
5234 + * determines what we test for next.
5235 + *
5236 + * We also initialise the EFR (if any) to zero for later. The
5237 + * EFR occupies the same register location as the FCR and IIR.
5238 + */
5239 + serial_outp(up, UART_LCR, 0xBF);
5240 + serial_outp(up, UART_EFR, 0);
5241 + serial_outp(up, UART_LCR, 0);
5242 +
5243 + serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
5244 + scratch = serial_in(up, UART_IIR) >> 6;
5245 +
5246 + DEBUG_AUTOCONF("iir=%d ", scratch);
5247 +
5248 + switch (scratch) {
5249 + case 0:
5250 + autoconfig_8250(up);
5251 + break;
5252 + case 1:
5253 + up->port.type = PORT_UNKNOWN;
5254 + break;
5255 + case 2:
5256 + up->port.type = PORT_16550;
5257 + break;
5258 + case 3:
5259 + autoconfig_16550a(up);
5260 + break;
5261 + }
5262 +
5263 +#ifdef CONFIG_SERIAL_8250_RSA
5264 + /*
5265 + * Only probe for RSA ports if we got the region.
5266 + */
5267 + if (up->port.type == PORT_16550A && probeflags & PROBE_RSA) {
5268 + int i;
5269 +
5270 + for (i = 0 ; i < probe_rsa_count; ++i) {
5271 + if (probe_rsa[i] == up->port.iobase &&
5272 + __enable_rsa(up)) {
5273 + up->port.type = PORT_RSA;
5274 + break;
5275 + }
5276 + }
5277 + }
5278 +#endif
5279 +
5280 +#ifdef CONFIG_SERIAL_8250_AU1X00
5281 + /* if access method is AU, it is a 16550 with a quirk */
5282 + if (up->port.type == PORT_16550A && up->port.iotype == UPIO_AU)
5283 + up->bugs |= UART_BUG_NOMSR;
5284 +#endif
5285 +
5286 + serial_outp(up, UART_LCR, save_lcr);
5287 +
5288 + if (up->capabilities != uart_config[up->port.type].flags) {
5289 + printk(KERN_WARNING
5290 + "ttyS%d: detected caps %08x should be %08x\n",
5291 + up->port.line, up->capabilities,
5292 + uart_config[up->port.type].flags);
5293 + }
5294 +
5295 + up->port.fifosize = uart_config[up->port.type].fifo_size;
5296 + up->capabilities = uart_config[up->port.type].flags;
5297 + up->tx_loadsz = uart_config[up->port.type].tx_loadsz;
5298 +
5299 + if (up->port.type == PORT_UNKNOWN)
5300 + goto out;
5301 +
5302 + /*
5303 + * Reset the UART.
5304 + */
5305 +#ifdef CONFIG_SERIAL_8250_RSA
5306 + if (up->port.type == PORT_RSA)
5307 + serial_outp(up, UART_RSA_FRR, 0);
5308 +#endif
5309 + serial_outp(up, UART_MCR, save_mcr);
5310 + serial8250_clear_fifos(up);
5311 + serial_in(up, UART_RX);
5312 + if (up->capabilities & UART_CAP_UUE)
5313 + serial_outp(up, UART_IER, UART_IER_UUE);
5314 + else
5315 + serial_outp(up, UART_IER, 0);
5316 +
5317 + out:
5318 + spin_unlock_irqrestore(&up->port.lock, flags);
5319 +// restore_flags(flags);
5320 + DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name);
5321 +}
5322 +
5323 +static void autoconfig_irq(struct uart_8250_port *up)
5324 +{
5325 + unsigned char save_mcr, save_ier;
5326 + unsigned char save_ICP = 0;
5327 + unsigned int ICP = 0;
5328 + unsigned long irqs;
5329 + int irq;
5330 +
5331 + if (up->port.flags & UPF_FOURPORT) {
5332 + ICP = (up->port.iobase & 0xfe0) | 0x1f;
5333 + save_ICP = inb_p(ICP);
5334 + outb_p(0x80, ICP);
5335 + (void) inb_p(ICP);
5336 + }
5337 +
5338 + /* forget possible initially masked and pending IRQ */
5339 + probe_irq_off(probe_irq_on());
5340 + save_mcr = serial_inp(up, UART_MCR);
5341 + save_ier = serial_inp(up, UART_IER);
5342 + serial_outp(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
5343 +
5344 + irqs = probe_irq_on();
5345 + serial_outp(up, UART_MCR, 0);
5346 + udelay (10);
5347 + if (up->port.flags & UPF_FOURPORT) {
5348 + serial_outp(up, UART_MCR,
5349 + UART_MCR_DTR | UART_MCR_RTS);
5350 + } else {
5351 + serial_outp(up, UART_MCR,
5352 + UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
5353 + }
5354 + serial_outp(up, UART_IER, 0x0f); /* enable all intrs */
5355 + (void)serial_inp(up, UART_LSR);
5356 + (void)serial_inp(up, UART_RX);
5357 + (void)serial_inp(up, UART_IIR);
5358 + (void)serial_inp(up, UART_MSR);
5359 + serial_outp(up, UART_TX, 0xFF);
5360 + udelay (20);
5361 + irq = probe_irq_off(irqs);
5362 +
5363 + serial_outp(up, UART_MCR, save_mcr);
5364 + serial_outp(up, UART_IER, save_ier);
5365 +
5366 + if (up->port.flags & UPF_FOURPORT)
5367 + outb_p(save_ICP, ICP);
5368 +
5369 + up->port.irq = (irq > 0) ? irq : 0;
5370 +}
5371 +
5372 +static inline void __stop_tx(struct uart_8250_port *p)
5373 +{
5374 + if (p->ier & UART_IER_THRI) {
5375 + p->ier &= ~UART_IER_THRI;
5376 + serial_out(p, UART_IER, p->ier);
5377 + }
5378 +}
5379 +
5380 +static void serial8250_stop_tx(struct uart_port *port)
5381 +{
5382 + struct uart_8250_port *up = (struct uart_8250_port *)port;
5383 +
5384 + __stop_tx(up);
5385 +
5386 + /*
5387 + * We really want to stop the transmitter from sending.
5388 + */
5389 + if (up->port.type == PORT_16C950) {
5390 + up->acr |= UART_ACR_TXDIS;
5391 + serial_icr_write(up, UART_ACR, up->acr);
5392 + }
5393 +}
5394 +
5395 +static void transmit_chars(struct uart_8250_port *up);
5396 +
5397 +static void serial8250_start_tx(struct uart_port *port)
5398 +{
5399 + struct uart_8250_port *up = (struct uart_8250_port *)port;
5400 +
5401 + if (!(up->ier & UART_IER_THRI)) {
5402 + up->ier |= UART_IER_THRI;
5403 + serial_out(up, UART_IER, up->ier);
5404 +
5405 + if (up->bugs & UART_BUG_TXEN) {
5406 + unsigned char lsr, iir;
5407 + lsr = serial_in(up, UART_LSR);
5408 + iir = serial_in(up, UART_IIR);
5409 + if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT)
5410 + transmit_chars(up);
5411 + }
5412 + }
5413 +
5414 + /*
5415 + * Re-enable the transmitter if we disabled it.
5416 + */
5417 + if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
5418 + up->acr &= ~UART_ACR_TXDIS;
5419 + serial_icr_write(up, UART_ACR, up->acr);
5420 + }
5421 +}
5422 +
5423 +static void serial8250_stop_rx(struct uart_port *port)
5424 +{
5425 + struct uart_8250_port *up = (struct uart_8250_port *)port;
5426 +
5427 + up->ier &= ~UART_IER_RLSI;
5428 + up->port.read_status_mask &= ~UART_LSR_DR;
5429 + serial_out(up, UART_IER, up->ier);
5430 +}
5431 +
5432 +static void serial8250_enable_ms(struct uart_port *port)
5433 +{
5434 + struct uart_8250_port *up = (struct uart_8250_port *)port;
5435 +
5436 + /* no MSR capabilities */
5437 + if (up->bugs & UART_BUG_NOMSR)
5438 + return;
5439 +
5440 + up->ier |= UART_IER_MSI;
5441 + serial_out(up, UART_IER, up->ier);
5442 +}
5443 +
5444 +static void
5445 +receive_chars(struct uart_8250_port *up, unsigned int *status)
5446 +{
5447 + struct tty_struct *tty = up->port.info->tty;
5448 + unsigned char ch, lsr = *status;
5449 + int max_count = 256;
5450 + char flag;
5451 +
5452 + do {
5453 + ch = serial_inp(up, UART_RX);
5454 + flag = TTY_NORMAL;
5455 + up->port.icount.rx++;
5456 +
5457 +#ifdef CONFIG_SERIAL_8250_CONSOLE
5458 + /*
5459 + * Recover the break flag from console xmit
5460 + */
5461 + if (up->port.line == up->port.cons->index) {
5462 + lsr |= up->lsr_break_flag;
5463 + up->lsr_break_flag = 0;
5464 + }
5465 +#endif
5466 +
5467 + if (unlikely(lsr & (UART_LSR_BI | UART_LSR_PE |
5468 + UART_LSR_FE | UART_LSR_OE))) {
5469 + /*
5470 + * For statistics only
5471 + */
5472 + if (lsr & UART_LSR_BI) {
5473 + lsr &= ~(UART_LSR_FE | UART_LSR_PE);
5474 + up->port.icount.brk++;
5475 + /*
5476 + * We do the SysRQ and SAK checking
5477 + * here because otherwise the break
5478 + * may get masked by ignore_status_mask
5479 + * or read_status_mask.
5480 + */
5481 + if (uart_handle_break(&up->port))
5482 + goto ignore_char;
5483 + } else if (lsr & UART_LSR_PE)
5484 + up->port.icount.parity++;
5485 + else if (lsr & UART_LSR_FE)
5486 + up->port.icount.frame++;
5487 + if (lsr & UART_LSR_OE)
5488 + up->port.icount.overrun++;
5489 +
5490 + /*
5491 + * Mask off conditions which should be ignored.
5492 + */
5493 + lsr &= up->port.read_status_mask;
5494 +
5495 + if (lsr & UART_LSR_BI) {
5496 + DEBUG_INTR("handling break....");
5497 + flag = TTY_BREAK;
5498 + } else if (lsr & UART_LSR_PE)
5499 + flag = TTY_PARITY;
5500 + else if (lsr & UART_LSR_FE)
5501 + flag = TTY_FRAME;
5502 + }
5503 + if (uart_handle_sysrq_char(&up->port, ch))
5504 + goto ignore_char;
5505 +
5506 + uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
5507 +
5508 + ignore_char:
5509 + lsr = serial_inp(up, UART_LSR);
5510 + } while ((lsr & UART_LSR_DR) && (max_count-- > 0));
5511 + spin_unlock(&up->port.lock);
5512 + tty_flip_buffer_push(tty);
5513 + spin_lock(&up->port.lock);
5514 + *status = lsr;
5515 +}
5516 +
5517 +static void transmit_chars(struct uart_8250_port *up)
5518 +{
5519 + struct circ_buf *xmit = &up->port.info->xmit;
5520 + int count;
5521 +
5522 + if (up->port.x_char) {
5523 + serial_outp(up, UART_TX, up->port.x_char);
5524 + up->port.icount.tx++;
5525 + up->port.x_char = 0;
5526 + return;
5527 + }
5528 + if (uart_tx_stopped(&up->port)) {
5529 + serial8250_stop_tx(&up->port);
5530 + return;
5531 + }
5532 + if (uart_circ_empty(xmit)) {
5533 + __stop_tx(up);
5534 + return;
5535 + }
5536 +
5537 + count = up->tx_loadsz;
5538 + do {
5539 + serial_out(up, UART_TX, xmit->buf[xmit->tail]);
5540 + xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
5541 + up->port.icount.tx++;
5542 + if (uart_circ_empty(xmit))
5543 + break;
5544 + } while (--count > 0);
5545 +
5546 + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
5547 + uart_write_wakeup(&up->port);
5548 +
5549 + DEBUG_INTR("THRE...");
5550 +
5551 + if (uart_circ_empty(xmit))
5552 + __stop_tx(up);
5553 +}
5554 +
5555 +static unsigned int check_modem_status(struct uart_8250_port *up)
5556 +{
5557 + unsigned int status = serial_in(up, UART_MSR);
5558 +
5559 + if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
5560 + up->port.info != NULL) {
5561 + if (status & UART_MSR_TERI)
5562 + up->port.icount.rng++;
5563 + if (status & UART_MSR_DDSR)
5564 + up->port.icount.dsr++;
5565 + if (status & UART_MSR_DDCD)
5566 + uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
5567 + if (status & UART_MSR_DCTS)
5568 + uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
5569 +
5570 + wake_up_interruptible(&up->port.info->delta_msr_wait);
5571 + }
5572 +
5573 + return status;
5574 +}
5575 +
5576 +/*
5577 + * This handles the interrupt from one port.
5578 + */
5579 +static inline void
5580 +serial8250_handle_port(struct uart_8250_port *up)
5581 +{
5582 + unsigned int status;
5583 + unsigned long flags;
5584 +
5585 + spin_lock_irqsave(&up->port.lock, flags);
5586 +
5587 + status = serial_inp(up, UART_LSR);
5588 +
5589 + DEBUG_INTR("status = %x...", status);
5590 +
5591 + if (status & UART_LSR_DR)
5592 + receive_chars(up, &status);
5593 + check_modem_status(up);
5594 + if (status & UART_LSR_THRE)
5595 + transmit_chars(up);
5596 +
5597 + spin_unlock_irqrestore(&up->port.lock, flags);
5598 +}
5599 +
5600 +/*
5601 + * This is the serial driver's interrupt routine.
5602 + *
5603 + * Arjan thinks the old way was overly complex, so it got simplified.
5604 + * Alan disagrees, saying that need the complexity to handle the weird
5605 + * nature of ISA shared interrupts. (This is a special exception.)
5606 + *
5607 + * In order to handle ISA shared interrupts properly, we need to check
5608 + * that all ports have been serviced, and therefore the ISA interrupt
5609 + * line has been de-asserted.
5610 + *
5611 + * This means we need to loop through all ports. checking that they
5612 + * don't have an interrupt pending.
5613 + */
5614 +static irqreturn_t serial8250_interrupt(int irq, void *dev_id)
5615 +{
5616 + struct irq_info *i = dev_id;
5617 + struct list_head *l, *end = NULL;
5618 + int pass_counter = 0, handled = 0;
5619 +
5620 + DEBUG_INTR("serial8250_interrupt(%d)...", irq);
5621 +
5622 + spin_lock(&i->lock);
5623 +
5624 + l = i->head;
5625 + do {
5626 + struct uart_8250_port *up;
5627 + unsigned int iir;
5628 +
5629 + up = list_entry(l, struct uart_8250_port, list);
5630 +
5631 + iir = serial_in(up, UART_IIR);
5632 + if (!(iir & UART_IIR_NO_INT)) {
5633 + serial8250_handle_port(up);
5634 +
5635 + handled = 1;
5636 +
5637 + end = NULL;
5638 + } else if (end == NULL)
5639 + end = l;
5640 +
5641 + l = l->next;
5642 +
5643 + if (l == i->head && pass_counter++ > PASS_LIMIT) {
5644 + /* If we hit this, we're dead. */
5645 + printk(KERN_ERR "serial8250: too much work for "
5646 + "irq%d\n", irq);
5647 + break;
5648 + }
5649 + } while (l != end);
5650 +
5651 + spin_unlock(&i->lock);
5652 +
5653 + DEBUG_INTR("end.\n");
5654 +
5655 + return IRQ_RETVAL(handled);
5656 +}
5657 +
5658 +/*
5659 + * To support ISA shared interrupts, we need to have one interrupt
5660 + * handler that ensures that the IRQ line has been deasserted
5661 + * before returning. Failing to do this will result in the IRQ
5662 + * line being stuck active, and, since ISA irqs are edge triggered,
5663 + * no more IRQs will be seen.
5664 + */
5665 +static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
5666 +{
5667 + spin_lock_irq(&i->lock);
5668 +
5669 + if (!list_empty(i->head)) {
5670 + if (i->head == &up->list)
5671 + i->head = i->head->next;
5672 + list_del(&up->list);
5673 + } else {
5674 + BUG_ON(i->head != &up->list);
5675 + i->head = NULL;
5676 + }
5677 +
5678 + spin_unlock_irq(&i->lock);
5679 +}
5680 +
5681 +static int serial_link_irq_chain(struct uart_8250_port *up)
5682 +{
5683 + struct irq_info *i = irq_lists + up->port.irq;
5684 + int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? IRQF_SHARED : 0;
5685 +
5686 + spin_lock_irq(&i->lock);
5687 +
5688 + if (i->head) {
5689 + list_add(&up->list, i->head);
5690 + spin_unlock_irq(&i->lock);
5691 +
5692 + ret = 0;
5693 + } else {
5694 + INIT_LIST_HEAD(&up->list);
5695 + i->head = &up->list;
5696 + spin_unlock_irq(&i->lock);
5697 +
5698 + ret = request_irq(up->port.irq, serial8250_interrupt,
5699 + irq_flags, "serial", i);
5700 + if (ret < 0)
5701 + serial_do_unlink(i, up);
5702 + }
5703 +
5704 + return ret;
5705 +}
5706 +
5707 +static void serial_unlink_irq_chain(struct uart_8250_port *up)
5708 +{
5709 + struct irq_info *i = irq_lists + up->port.irq;
5710 +
5711 + BUG_ON(i->head == NULL);
5712 +
5713 + if (list_empty(i->head))
5714 + free_irq(up->port.irq, i);
5715 +
5716 + serial_do_unlink(i, up);
5717 +}
5718 +
5719 +/* Base timer interval for polling */
5720 +static inline int poll_timeout(int timeout)
5721 +{
5722 + return timeout > 6 ? (timeout / 2 - 2) : 1;
5723 +}
5724 +
5725 +/*
5726 + * This function is used to handle ports that do not have an
5727 + * interrupt. This doesn't work very well for 16450's, but gives
5728 + * barely passable results for a 16550A. (Although at the expense
5729 + * of much CPU overhead).
5730 + */
5731 +static void serial8250_timeout(unsigned long data)
5732 +{
5733 + struct uart_8250_port *up = (struct uart_8250_port *)data;
5734 + unsigned int iir;
5735 +
5736 + iir = serial_in(up, UART_IIR);
5737 + if (!(iir & UART_IIR_NO_INT))
5738 + serial8250_handle_port(up);
5739 + mod_timer(&up->timer, jiffies + poll_timeout(up->port.timeout));
5740 +}
5741 +
5742 +static void serial8250_backup_timeout(unsigned long data)
5743 +{
5744 + struct uart_8250_port *up = (struct uart_8250_port *)data;
5745 + unsigned int iir, ier = 0;
5746 +
5747 + /*
5748 + * Must disable interrupts or else we risk racing with the interrupt
5749 + * based handler.
5750 + */
5751 + if (is_real_interrupt(up->port.irq)) {
5752 + ier = serial_in(up, UART_IER);
5753 + serial_out(up, UART_IER, 0);
5754 + }
5755 +
5756 + iir = serial_in(up, UART_IIR);
5757 +
5758 + /*
5759 + * This should be a safe test for anyone who doesn't trust the
5760 + * IIR bits on their UART, but it's specifically designed for
5761 + * the "Diva" UART used on the management processor on many HP
5762 + * ia64 and parisc boxes.
5763 + */
5764 + if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) &&
5765 + (!uart_circ_empty(&up->port.info->xmit) || up->port.x_char) &&
5766 + (serial_in(up, UART_LSR) & UART_LSR_THRE)) {
5767 + iir &= ~(UART_IIR_ID | UART_IIR_NO_INT);
5768 + iir |= UART_IIR_THRI;
5769 + }
5770 +
5771 + if (!(iir & UART_IIR_NO_INT))
5772 + serial8250_handle_port(up);
5773 +
5774 + if (is_real_interrupt(up->port.irq))
5775 + serial_out(up, UART_IER, ier);
5776 +
5777 + /* Standard timer interval plus 0.2s to keep the port running */
5778 + mod_timer(&up->timer, jiffies + poll_timeout(up->port.timeout) + HZ/5);
5779 +}
5780 +
5781 +static unsigned int serial8250_tx_empty(struct uart_port *port)
5782 +{
5783 + struct uart_8250_port *up = (struct uart_8250_port *)port;
5784 + unsigned long flags;
5785 + unsigned int ret;
5786 +
5787 + spin_lock_irqsave(&up->port.lock, flags);
5788 + ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
5789 + spin_unlock_irqrestore(&up->port.lock, flags);
5790 +
5791 + return ret;
5792 +}
5793 +
5794 +static unsigned int serial8250_get_mctrl(struct uart_port *port)
5795 +{
5796 + struct uart_8250_port *up = (struct uart_8250_port *)port;
5797 + unsigned int status;
5798 + unsigned int ret;
5799 +
5800 + status = check_modem_status(up);
5801 +
5802 + ret = 0;
5803 + if (status & UART_MSR_DCD)
5804 + ret |= TIOCM_CAR;
5805 + if (status & UART_MSR_RI)
5806 + ret |= TIOCM_RNG;
5807 + if (status & UART_MSR_DSR)
5808 + ret |= TIOCM_DSR;
5809 + if (status & UART_MSR_CTS)
5810 + ret |= TIOCM_CTS;
5811 + return ret;
5812 +}
5813 +
5814 +static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
5815 +{
5816 + struct uart_8250_port *up = (struct uart_8250_port *)port;
5817 + unsigned char mcr = 0;
5818 +
5819 + if (mctrl & TIOCM_RTS)
5820 + mcr |= UART_MCR_RTS;
5821 + if (mctrl & TIOCM_DTR)
5822 + mcr |= UART_MCR_DTR;
5823 + if (mctrl & TIOCM_OUT1)
5824 + mcr |= UART_MCR_OUT1;
5825 + if (mctrl & TIOCM_OUT2)
5826 + mcr |= UART_MCR_OUT2;
5827 + if (mctrl & TIOCM_LOOP)
5828 + mcr |= UART_MCR_LOOP;
5829 +
5830 + mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
5831 +
5832 + serial_out(up, UART_MCR, mcr);
5833 +}
5834 +
5835 +static void serial8250_break_ctl(struct uart_port *port, int break_state)
5836 +{
5837 + struct uart_8250_port *up = (struct uart_8250_port *)port;
5838 + unsigned long flags;
5839 +
5840 + spin_lock_irqsave(&up->port.lock, flags);
5841 + if (break_state == -1)
5842 + up->lcr |= UART_LCR_SBC;
5843 + else
5844 + up->lcr &= ~UART_LCR_SBC;
5845 + serial_out(up, UART_LCR, up->lcr);
5846 + spin_unlock_irqrestore(&up->port.lock, flags);
5847 +}
5848 +
5849 +#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
5850 +
5851 +/*
5852 + * Wait for transmitter & holding register to empty
5853 + */
5854 +static inline void wait_for_xmitr(struct uart_8250_port *up, int bits)
5855 +{
5856 + unsigned int status, tmout = 10000;
5857 +
5858 + /* Wait up to 10ms for the character(s) to be sent. */
5859 + do {
5860 + status = serial_in(up, UART_LSR);
5861 +
5862 + if (status & UART_LSR_BI)
5863 + up->lsr_break_flag = UART_LSR_BI;
5864 +
5865 + if (--tmout == 0)
5866 + break;
5867 + udelay(1);
5868 + } while ((status & bits) != bits);
5869 +
5870 + /* Wait up to 1s for flow control if necessary */
5871 + if (up->port.flags & UPF_CONS_FLOW) {
5872 + tmout = 1000000;
5873 + while (!(serial_in(up, UART_MSR) & UART_MSR_CTS) && --tmout) {
5874 + udelay(1);
5875 + touch_nmi_watchdog();
5876 + }
5877 + }
5878 +}
5879 +
5880 +static int serial8250_startup(struct uart_port *port)
5881 +{
5882 + struct uart_8250_port *up = (struct uart_8250_port *)port;
5883 + unsigned long flags;
5884 + unsigned char lsr, iir;
5885 + int retval;
5886 +
5887 + up->capabilities = uart_config[up->port.type].flags;
5888 + up->mcr = 0;
5889 +
5890 + if (up->port.type == PORT_16C950) {
5891 + /* Wake up and initialize UART */
5892 + up->acr = 0;
5893 + serial_outp(up, UART_LCR, 0xBF);
5894 + serial_outp(up, UART_EFR, UART_EFR_ECB);
5895 + serial_outp(up, UART_IER, 0);
5896 + serial_outp(up, UART_LCR, 0);
5897 + serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
5898 + serial_outp(up, UART_LCR, 0xBF);
5899 + serial_outp(up, UART_EFR, UART_EFR_ECB);
5900 + serial_outp(up, UART_LCR, 0);
5901 + }
5902 +
5903 +#ifdef CONFIG_SERIAL_8250_RSA
5904 + /*
5905 + * If this is an RSA port, see if we can kick it up to the
5906 + * higher speed clock.
5907 + */
5908 + enable_rsa(up);
5909 +#endif
5910 +
5911 + /*
5912 + * Clear the FIFO buffers and disable them.
5913 + * (they will be reenabled in set_termios())
5914 + */
5915 + serial8250_clear_fifos(up);
5916 +
5917 + /*
5918 + * Clear the interrupt registers.
5919 + */
5920 + (void) serial_inp(up, UART_LSR);
5921 + (void) serial_inp(up, UART_RX);
5922 + (void) serial_inp(up, UART_IIR);
5923 + (void) serial_inp(up, UART_MSR);
5924 +
5925 + /*
5926 + * At this point, there's no way the LSR could still be 0xff;
5927 + * if it is, then bail out, because there's likely no UART
5928 + * here.
5929 + */
5930 + if (!(up->port.flags & UPF_BUGGY_UART) &&
5931 + (serial_inp(up, UART_LSR) == 0xff)) {
5932 + printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
5933 + return -ENODEV;
5934 + }
5935 +
5936 + /*
5937 + * For a XR16C850, we need to set the trigger levels
5938 + */
5939 + if (up->port.type == PORT_16850) {
5940 + unsigned char fctr;
5941 +
5942 + serial_outp(up, UART_LCR, 0xbf);
5943 +
5944 + fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
5945 + serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX);
5946 + serial_outp(up, UART_TRG, UART_TRG_96);
5947 + serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_TX);
5948 + serial_outp(up, UART_TRG, UART_TRG_96);
5949 +
5950 + serial_outp(up, UART_LCR, 0);
5951 + }
5952 +
5953 + if (is_real_interrupt(up->port.irq)) {
5954 + /*
5955 + * Test for UARTs that do not reassert THRE when the
5956 + * transmitter is idle and the interrupt has already
5957 + * been cleared. Real 16550s should always reassert
5958 + * this interrupt whenever the transmitter is idle and
5959 + * the interrupt is enabled. Delays are necessary to
5960 + * allow register changes to become visible.
5961 + */
5962 + spin_lock_irqsave(&up->port.lock, flags);
5963 +
5964 + wait_for_xmitr(up, UART_LSR_THRE);
5965 + serial_out_sync(up, UART_IER, UART_IER_THRI);
5966 + udelay(1); /* allow THRE to set */
5967 + serial_in(up, UART_IIR);
5968 + serial_out(up, UART_IER, 0);
5969 + serial_out_sync(up, UART_IER, UART_IER_THRI);
5970 + udelay(1); /* allow a working UART time to re-assert THRE */
5971 + iir = serial_in(up, UART_IIR);
5972 + serial_out(up, UART_IER, 0);
5973 +
5974 + spin_unlock_irqrestore(&up->port.lock, flags);
5975 +
5976 + /*
5977 + * If the interrupt is not reasserted, setup a timer to
5978 + * kick the UART on a regular basis.
5979 + */
5980 + if (iir & UART_IIR_NO_INT) {
5981 + pr_debug("ttyS%d - using backup timer\n", port->line);
5982 + up->timer.function = serial8250_backup_timeout;
5983 + up->timer.data = (unsigned long)up;
5984 + mod_timer(&up->timer, jiffies +
5985 + poll_timeout(up->port.timeout) + HZ/5);
5986 + }
5987 + }
5988 +
5989 + /*
5990 + * If the "interrupt" for this port doesn't correspond with any
5991 + * hardware interrupt, we use a timer-based system. The original
5992 + * driver used to do this with IRQ0.
5993 + */
5994 + if (!is_real_interrupt(up->port.irq)) {
5995 + up->timer.data = (unsigned long)up;
5996 + mod_timer(&up->timer, jiffies + poll_timeout(up->port.timeout));
5997 + } else {
5998 + retval = serial_link_irq_chain(up);
5999 + if (retval)
6000 + return retval;
6001 + }
6002 +
6003 + /*
6004 + * Now, initialize the UART
6005 + */
6006 + serial_outp(up, UART_LCR, UART_LCR_WLEN8);
6007 +
6008 + spin_lock_irqsave(&up->port.lock, flags);
6009 + if (up->port.flags & UPF_FOURPORT) {
6010 + if (!is_real_interrupt(up->port.irq))
6011 + up->port.mctrl |= TIOCM_OUT1;
6012 + } else
6013 + /*
6014 + * Most PC uarts need OUT2 raised to enable interrupts.
6015 + */
6016 + if (is_real_interrupt(up->port.irq))
6017 + up->port.mctrl |= TIOCM_OUT2;
6018 +
6019 + serial8250_set_mctrl(&up->port, up->port.mctrl);
6020 +
6021 + /*
6022 + * Do a quick test to see if we receive an
6023 + * interrupt when we enable the TX irq.
6024 + */
6025 + serial_outp(up, UART_IER, UART_IER_THRI);
6026 + lsr = serial_in(up, UART_LSR);
6027 + iir = serial_in(up, UART_IIR);
6028 + serial_outp(up, UART_IER, 0);
6029 +
6030 + if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
6031 + if (!(up->bugs & UART_BUG_TXEN)) {
6032 + up->bugs |= UART_BUG_TXEN;
6033 + pr_debug("ttyS%d - enabling bad tx status workarounds\n",
6034 + port->line);
6035 + }
6036 + } else {
6037 + up->bugs &= ~UART_BUG_TXEN;
6038 + }
6039 +
6040 + spin_unlock_irqrestore(&up->port.lock, flags);
6041 +
6042 + /*
6043 + * Finally, enable interrupts. Note: Modem status interrupts
6044 + * are set via set_termios(), which will be occurring imminently
6045 + * anyway, so we don't enable them here.
6046 + */
6047 + up->ier = UART_IER_RLSI | UART_IER_RDI;
6048 + serial_outp(up, UART_IER, up->ier);
6049 +
6050 + if (up->port.flags & UPF_FOURPORT) {
6051 + unsigned int icp;
6052 + /*
6053 + * Enable interrupts on the AST Fourport board
6054 + */
6055 + icp = (up->port.iobase & 0xfe0) | 0x01f;
6056 + outb_p(0x80, icp);
6057 + (void) inb_p(icp);
6058 + }
6059 +
6060 + /*
6061 + * And clear the interrupt registers again for luck.
6062 + */
6063 + (void) serial_inp(up, UART_LSR);
6064 + (void) serial_inp(up, UART_RX);
6065 + (void) serial_inp(up, UART_IIR);
6066 + (void) serial_inp(up, UART_MSR);
6067 +
6068 + return 0;
6069 +}
6070 +
6071 +static void serial8250_shutdown(struct uart_port *port)
6072 +{
6073 + struct uart_8250_port *up = (struct uart_8250_port *)port;
6074 + unsigned long flags;
6075 +
6076 + /*
6077 + * Disable interrupts from this port
6078 + */
6079 + up->ier = 0;
6080 + serial_outp(up, UART_IER, 0);
6081 +
6082 + spin_lock_irqsave(&up->port.lock, flags);
6083 + if (up->port.flags & UPF_FOURPORT) {
6084 + /* reset interrupts on the AST Fourport board */
6085 + inb((up->port.iobase & 0xfe0) | 0x1f);
6086 + up->port.mctrl |= TIOCM_OUT1;
6087 + } else
6088 + up->port.mctrl &= ~TIOCM_OUT2;
6089 +
6090 + serial8250_set_mctrl(&up->port, up->port.mctrl);
6091 + spin_unlock_irqrestore(&up->port.lock, flags);
6092 +
6093 + /*
6094 + * Disable break condition and FIFOs
6095 + */
6096 + serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
6097 + serial8250_clear_fifos(up);
6098 +
6099 +#ifdef CONFIG_SERIAL_8250_RSA
6100 + /*
6101 + * Reset the RSA board back to 115kbps compat mode.
6102 + */
6103 + disable_rsa(up);
6104 +#endif
6105 +
6106 + /*
6107 + * Read data port to reset things, and then unlink from
6108 + * the IRQ chain.
6109 + */
6110 + (void) serial_in(up, UART_RX);
6111 +
6112 + del_timer_sync(&up->timer);
6113 + up->timer.function = serial8250_timeout;
6114 + if (is_real_interrupt(up->port.irq))
6115 + serial_unlink_irq_chain(up);
6116 +}
6117 +
6118 +static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)
6119 +{
6120 + unsigned int quot;
6121 +
6122 + /*
6123 + * Handle magic divisors for baud rates above baud_base on
6124 + * SMSC SuperIO chips.
6125 + */
6126 + if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
6127 + baud == (port->uartclk/4))
6128 + quot = 0x8001;
6129 + else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
6130 + baud == (port->uartclk/8))
6131 + quot = 0x8002;
6132 + else
6133 + quot = uart_get_divisor(port, baud);
6134 +
6135 + return quot;
6136 +}
6137 +
6138 +static void
6139 +serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
6140 + struct ktermios *old)
6141 +{
6142 + struct uart_8250_port *up = (struct uart_8250_port *)port;
6143 + unsigned char cval, fcr = 0;
6144 + unsigned long flags;
6145 + unsigned int baud, quot;
6146 +
6147 + switch (termios->c_cflag & CSIZE) {
6148 + case CS5:
6149 + cval = UART_LCR_WLEN5;
6150 + break;
6151 + case CS6:
6152 + cval = UART_LCR_WLEN6;
6153 + break;
6154 + case CS7:
6155 + cval = UART_LCR_WLEN7;
6156 + break;
6157 + default:
6158 + case CS8:
6159 + cval = UART_LCR_WLEN8;
6160 + break;
6161 + }
6162 +
6163 + if (termios->c_cflag & CSTOPB)
6164 + cval |= UART_LCR_STOP;
6165 + if (termios->c_cflag & PARENB)
6166 + cval |= UART_LCR_PARITY;
6167 + if (!(termios->c_cflag & PARODD))
6168 + cval |= UART_LCR_EPAR;
6169 +#ifdef CMSPAR
6170 + if (termios->c_cflag & CMSPAR)
6171 + cval |= UART_LCR_SPAR;
6172 +#endif
6173 +
6174 + /*
6175 + * Ask the core to calculate the divisor for us.
6176 + */
6177 + baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
6178 + quot = serial8250_get_divisor(port, baud);
6179 +
6180 + /*
6181 + * Oxford Semi 952 rev B workaround
6182 + */
6183 + if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)
6184 + quot ++;
6185 +
6186 + if (up->capabilities & UART_CAP_FIFO && up->port.fifosize > 1) {
6187 + if (baud < 2400)
6188 + fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
6189 + else
6190 + fcr = uart_config[up->port.type].fcr;
6191 + }
6192 +
6193 + /*
6194 + * MCR-based auto flow control. When AFE is enabled, RTS will be
6195 + * deasserted when the receive FIFO contains more characters than
6196 + * the trigger, or the MCR RTS bit is cleared. In the case where
6197 + * the remote UART is not using CTS auto flow control, we must
6198 + * have sufficient FIFO entries for the latency of the remote
6199 + * UART to respond. IOW, at least 32 bytes of FIFO.
6200 + */
6201 + if (up->capabilities & UART_CAP_AFE && up->port.fifosize >= 32) {
6202 + up->mcr &= ~UART_MCR_AFE;
6203 + if (termios->c_cflag & CRTSCTS)
6204 + up->mcr |= UART_MCR_AFE;
6205 + }
6206 +
6207 + /*
6208 + * Ok, we're now changing the port state. Do it with
6209 + * interrupts disabled.
6210 + */
6211 + spin_lock_irqsave(&up->port.lock, flags);
6212 +
6213 + /*
6214 + * Update the per-port timeout.
6215 + */
6216 + uart_update_timeout(port, termios->c_cflag, baud);
6217 +
6218 + up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
6219 + if (termios->c_iflag & INPCK)
6220 + up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
6221 + if (termios->c_iflag & (BRKINT | PARMRK))
6222 + up->port.read_status_mask |= UART_LSR_BI;
6223 +
6224 + /*
6225 + * Characteres to ignore
6226 + */
6227 + up->port.ignore_status_mask = 0;
6228 + if (termios->c_iflag & IGNPAR)
6229 + up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
6230 + if (termios->c_iflag & IGNBRK) {
6231 + up->port.ignore_status_mask |= UART_LSR_BI;
6232 + /*
6233 + * If we're ignoring parity and break indicators,
6234 + * ignore overruns too (for real raw support).
6235 + */
6236 + if (termios->c_iflag & IGNPAR)
6237 + up->port.ignore_status_mask |= UART_LSR_OE;
6238 + }
6239 +
6240 + /*
6241 + * ignore all characters if CREAD is not set
6242 + */
6243 + if ((termios->c_cflag & CREAD) == 0)
6244 + up->port.ignore_status_mask |= UART_LSR_DR;
6245 +
6246 + /*
6247 + * CTS flow control flag and modem status interrupts
6248 + */
6249 + up->ier &= ~UART_IER_MSI;
6250 + if (!(up->bugs & UART_BUG_NOMSR) &&
6251 + UART_ENABLE_MS(&up->port, termios->c_cflag))
6252 + up->ier |= UART_IER_MSI;
6253 + if (up->capabilities & UART_CAP_UUE)
6254 + up->ier |= UART_IER_UUE | UART_IER_RTOIE;
6255 +
6256 + serial_out(up, UART_IER, up->ier);
6257 +
6258 + if (up->capabilities & UART_CAP_EFR) {
6259 + unsigned char efr = 0;
6260 + /*
6261 + * TI16C752/Startech hardware flow control. FIXME:
6262 + * - TI16C752 requires control thresholds to be set.
6263 + * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
6264 + */
6265 + if (termios->c_cflag & CRTSCTS)
6266 + efr |= UART_EFR_CTS;
6267 +
6268 + serial_outp(up, UART_LCR, 0xBF);
6269 + serial_outp(up, UART_EFR, efr);
6270 + }
6271 +
6272 +#ifdef CONFIG_ARCH_OMAP15XX
6273 + /* Workaround to enable 115200 baud on OMAP1510 internal ports */
6274 + if (cpu_is_omap1510() && is_omap_port((unsigned int)up->port.membase)) {
6275 + if (baud == 115200) {
6276 + quot = 1;
6277 + serial_out(up, UART_OMAP_OSC_12M_SEL, 1);
6278 + } else
6279 + serial_out(up, UART_OMAP_OSC_12M_SEL, 0);
6280 + }
6281 +#endif
6282 +
6283 + if (up->capabilities & UART_NATSEMI) {
6284 + /* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */
6285 + serial_outp(up, UART_LCR, 0xe0);
6286 + } else {
6287 + serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
6288 + }
6289 +
6290 + serial_dl_write(up, quot);
6291 +
6292 + /*
6293 + * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
6294 + * is written without DLAB set, this mode will be disabled.
6295 + */
6296 + if (up->port.type == PORT_16750)
6297 + serial_outp(up, UART_FCR, fcr);
6298 +
6299 + serial_outp(up, UART_LCR, cval); /* reset DLAB */
6300 + up->lcr = cval; /* Save LCR */
6301 + if (up->port.type != PORT_16750) {
6302 + if (fcr & UART_FCR_ENABLE_FIFO) {
6303 + /* emulated UARTs (Lucent Venus 167x) need two steps */
6304 + serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
6305 + }
6306 + serial_outp(up, UART_FCR, fcr); /* set fcr */
6307 + }
6308 + serial8250_set_mctrl(&up->port, up->port.mctrl);
6309 + spin_unlock_irqrestore(&up->port.lock, flags);
6310 +}
6311 +
6312 +static void
6313 +serial8250_pm(struct uart_port *port, unsigned int state,
6314 + unsigned int oldstate)
6315 +{
6316 + struct uart_8250_port *p = (struct uart_8250_port *)port;
6317 +
6318 + serial8250_set_sleep(p, state != 0);
6319 +
6320 + if (p->pm)
6321 + p->pm(port, state, oldstate);
6322 +}
6323 +
6324 +/*
6325 + * Resource handling.
6326 + */
6327 +static int serial8250_request_std_resource(struct uart_8250_port *up)
6328 +{
6329 + unsigned int size = 8 << up->port.regshift;
6330 + int ret = 0;
6331 +
6332 + switch (up->port.iotype) {
6333 + case UPIO_AU:
6334 + size = 0x100000;
6335 + /* fall thru */
6336 + case UPIO_TSI:
6337 + case UPIO_MEM32:
6338 + case UPIO_MEM:
6339 + if (!up->port.mapbase)
6340 + break;
6341 +
6342 + if (!request_mem_region(up->port.mapbase, size, "serial")) {
6343 + ret = -EBUSY;
6344 + break;
6345 + }
6346 +
6347 + if (up->port.flags & UPF_IOREMAP) {
6348 + up->port.membase = ioremap(up->port.mapbase, size);
6349 + if (!up->port.membase) {
6350 + release_mem_region(up->port.mapbase, size);
6351 + ret = -ENOMEM;
6352 + }
6353 + }
6354 + break;
6355 +
6356 + case UPIO_HUB6:
6357 + case UPIO_PORT:
6358 + if (!request_region(up->port.iobase, size, "serial"))
6359 + ret = -EBUSY;
6360 + break;
6361 + }
6362 + return ret;
6363 +}
6364 +
6365 +static void serial8250_release_std_resource(struct uart_8250_port *up)
6366 +{
6367 + unsigned int size = 8 << up->port.regshift;
6368 +
6369 + switch (up->port.iotype) {
6370 + case UPIO_AU:
6371 + size = 0x100000;
6372 + /* fall thru */
6373 + case UPIO_TSI:
6374 + case UPIO_MEM32:
6375 + case UPIO_MEM:
6376 + if (!up->port.mapbase)
6377 + break;
6378 +
6379 + if (up->port.flags & UPF_IOREMAP) {
6380 + iounmap(up->port.membase);
6381 + up->port.membase = NULL;
6382 + }
6383 +
6384 + release_mem_region(up->port.mapbase, size);
6385 + break;
6386 +
6387 + case UPIO_HUB6:
6388 + case UPIO_PORT:
6389 + release_region(up->port.iobase, size);
6390 + break;
6391 + }
6392 +}
6393 +
6394 +static int serial8250_request_rsa_resource(struct uart_8250_port *up)
6395 +{
6396 + unsigned long start = UART_RSA_BASE << up->port.regshift;
6397 + unsigned int size = 8 << up->port.regshift;
6398 + int ret = -EINVAL;
6399 +
6400 + switch (up->port.iotype) {
6401 + case UPIO_HUB6:
6402 + case UPIO_PORT:
6403 + start += up->port.iobase;
6404 + if (request_region(start, size, "serial-rsa"))
6405 + ret = 0;
6406 + else
6407 + ret = -EBUSY;
6408 + break;
6409 + }
6410 +
6411 + return ret;
6412 +}
6413 +
6414 +static void serial8250_release_rsa_resource(struct uart_8250_port *up)
6415 +{
6416 + unsigned long offset = UART_RSA_BASE << up->port.regshift;
6417 + unsigned int size = 8 << up->port.regshift;
6418 +
6419 + switch (up->port.iotype) {
6420 + case UPIO_HUB6:
6421 + case UPIO_PORT:
6422 + release_region(up->port.iobase + offset, size);
6423 + break;
6424 + }
6425 +}
6426 +
6427 +static void serial8250_release_port(struct uart_port *port)
6428 +{
6429 + struct uart_8250_port *up = (struct uart_8250_port *)port;
6430 +
6431 + serial8250_release_std_resource(up);
6432 + if (up->port.type == PORT_RSA)
6433 + serial8250_release_rsa_resource(up);
6434 +}
6435 +
6436 +static int serial8250_request_port(struct uart_port *port)
6437 +{
6438 + struct uart_8250_port *up = (struct uart_8250_port *)port;
6439 + int ret = 0;
6440 +
6441 + ret = serial8250_request_std_resource(up);
6442 + if (ret == 0 && up->port.type == PORT_RSA) {
6443 + ret = serial8250_request_rsa_resource(up);
6444 + if (ret < 0)
6445 + serial8250_release_std_resource(up);
6446 + }
6447 +
6448 + return ret;
6449 +}
6450 +
6451 +static void serial8250_config_port(struct uart_port *port, int flags)
6452 +{
6453 + struct uart_8250_port *up = (struct uart_8250_port *)port;
6454 + int probeflags = PROBE_ANY;
6455 + int ret;
6456 +
6457 + /*
6458 + * Find the region that we can probe for. This in turn
6459 + * tells us whether we can probe for the type of port.
6460 + */
6461 + ret = serial8250_request_std_resource(up);
6462 + if (ret < 0)
6463 + return;
6464 +
6465 + ret = serial8250_request_rsa_resource(up);
6466 + if (ret < 0)
6467 + probeflags &= ~PROBE_RSA;
6468 +
6469 + if (flags & UART_CONFIG_TYPE)
6470 + autoconfig(up, probeflags);
6471 + if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
6472 + autoconfig_irq(up);
6473 +
6474 + if (up->port.type != PORT_RSA && probeflags & PROBE_RSA)
6475 + serial8250_release_rsa_resource(up);
6476 + if (up->port.type == PORT_UNKNOWN)
6477 + serial8250_release_std_resource(up);
6478 +}
6479 +
6480 +static int
6481 +serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
6482 +{
6483 + if (ser->irq >= NR_IRQS || ser->irq < 0 ||
6484 + ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
6485 + ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||
6486 + ser->type == PORT_STARTECH)
6487 + return -EINVAL;
6488 + return 0;
6489 +}
6490 +
6491 +static const char *
6492 +serial8250_type(struct uart_port *port)
6493 +{
6494 + int type = port->type;
6495 +
6496 + if (type >= ARRAY_SIZE(uart_config))
6497 + type = 0;
6498 + return uart_config[type].name;
6499 +}
6500 +
6501 +static struct uart_ops serial8250_pops = {
6502 + .tx_empty = serial8250_tx_empty,
6503 + .set_mctrl = serial8250_set_mctrl,
6504 + .get_mctrl = serial8250_get_mctrl,
6505 + .stop_tx = serial8250_stop_tx,
6506 + .start_tx = serial8250_start_tx,
6507 + .stop_rx = serial8250_stop_rx,
6508 + .enable_ms = serial8250_enable_ms,
6509 + .break_ctl = serial8250_break_ctl,
6510 + .startup = serial8250_startup,
6511 + .shutdown = serial8250_shutdown,
6512 + .set_termios = serial8250_set_termios,
6513 + .pm = serial8250_pm,
6514 + .type = serial8250_type,
6515 + .release_port = serial8250_release_port,
6516 + .request_port = serial8250_request_port,
6517 + .config_port = serial8250_config_port,
6518 + .verify_port = serial8250_verify_port,
6519 +};
6520 +
6521 +static struct uart_8250_port serial8250_ports[UART_NR];
6522 +
6523 +static void __init serial8250_isa_init_ports(void)
6524 +{
6525 + struct uart_8250_port *up;
6526 + static int first = 1;
6527 + int i;
6528 +
6529 + if (!first)
6530 + return;
6531 + first = 0;
6532 +
6533 + for (i = 0; i < nr_uarts; i++) {
6534 + struct uart_8250_port *up = &serial8250_ports[i];
6535 +
6536 + up->port.line = i;
6537 + spin_lock_init(&up->port.lock);
6538 +
6539 + init_timer(&up->timer);
6540 + up->timer.function = serial8250_timeout;
6541 +
6542 + /*
6543 + * ALPHA_KLUDGE_MCR needs to be killed.
6544 + */
6545 + up->mcr_mask = ~ALPHA_KLUDGE_MCR;
6546 + up->mcr_force = ALPHA_KLUDGE_MCR;
6547 +
6548 + up->port.ops = &serial8250_pops;
6549 + }
6550 +
6551 + for (i = 0, up = serial8250_ports;
6552 + i < ARRAY_SIZE(old_serial_port) && i < nr_uarts;
6553 + i++, up++) {
6554 + up->port.iobase = old_serial_port[i].port;
6555 + up->port.irq = irq_canonicalize(old_serial_port[i].irq);
6556 + up->port.uartclk = old_serial_port[i].baud_base * 16;
6557 + up->port.flags = old_serial_port[i].flags;
6558 + up->port.hub6 = old_serial_port[i].hub6;
6559 + up->port.membase = old_serial_port[i].iomem_base;
6560 + up->port.iotype = old_serial_port[i].io_type;
6561 + up->port.regshift = old_serial_port[i].iomem_reg_shift;
6562 + if (share_irqs)
6563 + up->port.flags |= UPF_SHARE_IRQ;
6564 + }
6565 +}
6566 +
6567 +static void __init
6568 +serial8250_register_ports(struct uart_driver *drv, struct device *dev)
6569 +{
6570 + int i;
6571 +
6572 + serial8250_isa_init_ports();
6573 +
6574 + for (i = 0; i < nr_uarts; i++) {
6575 + struct uart_8250_port *up = &serial8250_ports[i];
6576 +
6577 + up->port.dev = dev;
6578 + uart_add_one_port(drv, &up->port);
6579 + }
6580 +}
6581 +
6582 +#ifdef CONFIG_SERIAL_8250_CONSOLE
6583 +
6584 +static void serial8250_console_putchar(struct uart_port *port, int ch)
6585 +{
6586 + struct uart_8250_port *up = (struct uart_8250_port *)port;
6587 +
6588 + wait_for_xmitr(up, UART_LSR_THRE);
6589 + serial_out(up, UART_TX, ch);
6590 +}
6591 +
6592 +/*
6593 + * Print a string to the serial port trying not to disturb
6594 + * any possible real use of the port...
6595 + *
6596 + * The console_lock must be held when we get here.
6597 + */
6598 +static void
6599 +serial8250_console_write(struct console *co, const char *s, unsigned int count)
6600 +{
6601 + struct uart_8250_port *up = &serial8250_ports[co->index];
6602 + unsigned long flags;
6603 + unsigned int ier;
6604 + int locked = 1;
6605 +
6606 + touch_nmi_watchdog();
6607 +
6608 + local_irq_save(flags);
6609 + if (up->port.sysrq) {
6610 + /* serial8250_handle_port() already took the lock */
6611 + locked = 0;
6612 + } else if (oops_in_progress) {
6613 + locked = spin_trylock(&up->port.lock);
6614 + } else
6615 + spin_lock(&up->port.lock);
6616 +
6617 + /*
6618 + * First save the IER then disable the interrupts
6619 + */
6620 + ier = serial_in(up, UART_IER);
6621 +
6622 + if (up->capabilities & UART_CAP_UUE)
6623 + serial_out(up, UART_IER, UART_IER_UUE);
6624 + else
6625 + serial_out(up, UART_IER, 0);
6626 +
6627 + uart_console_write(&up->port, s, count, serial8250_console_putchar);
6628 +
6629 + /*
6630 + * Finally, wait for transmitter to become empty
6631 + * and restore the IER
6632 + */
6633 + wait_for_xmitr(up, BOTH_EMPTY);
6634 + serial_out(up, UART_IER, ier);
6635 +
6636 + if (locked)
6637 + spin_unlock(&up->port.lock);
6638 + local_irq_restore(flags);
6639 +}
6640 +
6641 +static int __init serial8250_console_setup(struct console *co, char *options)
6642 +{
6643 + struct uart_port *port;
6644 + int baud = 9600;
6645 + int bits = 8;
6646 + int parity = 'n';
6647 + int flow = 'n';
6648 +
6649 + /*
6650 + * Check whether an invalid uart number has been specified, and
6651 + * if so, search for the first available port that does have
6652 + * console support.
6653 + */
6654 + if (co->index >= nr_uarts)
6655 + co->index = 0;
6656 + port = &serial8250_ports[co->index].port;
6657 + if (!port->iobase && !port->membase)
6658 + return -ENODEV;
6659 +
6660 + if (options)
6661 + uart_parse_options(options, &baud, &parity, &bits, &flow);
6662 +
6663 + return uart_set_options(port, co, baud, parity, bits, flow);
6664 +}
6665 +
6666 +static struct uart_driver serial8250_reg;
6667 +static struct console serial8250_console = {
6668 + .name = "ttyS",
6669 + .write = serial8250_console_write,
6670 + .device = uart_console_device,
6671 + .setup = serial8250_console_setup,
6672 + .flags = CON_PRINTBUFFER,
6673 + .index = -1,
6674 + .data = &serial8250_reg,
6675 +};
6676 +
6677 +static int __init serial8250_console_init(void)
6678 +{
6679 + serial8250_isa_init_ports();
6680 + register_console(&serial8250_console);
6681 + return 0;
6682 +}
6683 +console_initcall(serial8250_console_init);
6684 +
6685 +static int __init find_port(struct uart_port *p)
6686 +{
6687 + int line;
6688 + struct uart_port *port;
6689 +
6690 + for (line = 0; line < nr_uarts; line++) {
6691 + port = &serial8250_ports[line].port;
6692 + if (uart_match_port(p, port))
6693 + return line;
6694 + }
6695 + return -ENODEV;
6696 +}
6697 +
6698 +int __init serial8250_start_console(struct uart_port *port, char *options)
6699 +{
6700 + int line;
6701 +
6702 + line = find_port(port);
6703 + if (line < 0)
6704 + return -ENODEV;
6705 +
6706 + add_preferred_console("ttyS", line, options);
6707 + printk("Adding console on ttyS%d at %s 0x%lx (options '%s')\n",
6708 + line, port->iotype == UPIO_MEM ? "MMIO" : "I/O port",
6709 + port->iotype == UPIO_MEM ? (unsigned long) port->mapbase :
6710 + (unsigned long) port->iobase, options);
6711 + if (!(serial8250_console.flags & CON_ENABLED)) {
6712 + serial8250_console.flags &= ~CON_PRINTBUFFER;
6713 + register_console(&serial8250_console);
6714 + }
6715 + return line;
6716 +}
6717 +
6718 +#define SERIAL8250_CONSOLE &serial8250_console
6719 +#else
6720 +#define SERIAL8250_CONSOLE NULL
6721 +#endif
6722 +
6723 +static struct uart_driver serial8250_reg = {
6724 + .owner = THIS_MODULE,
6725 + .driver_name = "serial",
6726 + .dev_name = "ttyS",
6727 + .major = TTY_MAJOR,
6728 + .minor = 64,
6729 + .nr = UART_NR,
6730 + .cons = SERIAL8250_CONSOLE,
6731 +};
6732 +
6733 +/*
6734 + * early_serial_setup - early registration for 8250 ports
6735 + *
6736 + * Setup an 8250 port structure prior to console initialisation. Use
6737 + * after console initialisation will cause undefined behaviour.
6738 + */
6739 +int __init early_serial_setup(struct uart_port *port)
6740 +{
6741 + if (port->line >= ARRAY_SIZE(serial8250_ports))
6742 + return -ENODEV;
6743 +
6744 + serial8250_isa_init_ports();
6745 + serial8250_ports[port->line].port = *port;
6746 + serial8250_ports[port->line].port.ops = &serial8250_pops;
6747 + return 0;
6748 +}
6749 +
6750 +/**
6751 + * serial8250_suspend_port - suspend one serial port
6752 + * @line: serial line number
6753 + *
6754 + * Suspend one serial port.
6755 + */
6756 +void serial8250_suspend_port(int line)
6757 +{
6758 + uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port);
6759 +}
6760 +
6761 +/**
6762 + * serial8250_resume_port - resume one serial port
6763 + * @line: serial line number
6764 + *
6765 + * Resume one serial port.
6766 + */
6767 +void serial8250_resume_port(int line)
6768 +{
6769 + uart_resume_port(&serial8250_reg, &serial8250_ports[line].port);
6770 +}
6771 +
6772 +/*
6773 + * Register a set of serial devices attached to a platform device. The
6774 + * list is terminated with a zero flags entry, which means we expect
6775 + * all entries to have at least UPF_BOOT_AUTOCONF set.
6776 + */
6777 +static int __devinit serial8250_probe(struct platform_device *dev)
6778 +{
6779 + struct plat_serial8250_port *p = dev->dev.platform_data;
6780 + struct uart_port port;
6781 + int ret, i;
6782 +
6783 + memset(&port, 0, sizeof(struct uart_port));
6784 +
6785 + for (i = 0; p && p->flags != 0; p++, i++) {
6786 + port.iobase = p->iobase;
6787 + port.membase = p->membase;
6788 + port.irq = p->irq;
6789 + port.uartclk = p->uartclk;
6790 + port.regshift = p->regshift;
6791 + port.iotype = p->iotype;
6792 + port.flags = p->flags;
6793 + port.mapbase = p->mapbase;
6794 + port.hub6 = p->hub6;
6795 + port.dev = &dev->dev;
6796 + if (share_irqs)
6797 + port.flags |= UPF_SHARE_IRQ;
6798 + ret = serial8250_register_port(&port);
6799 + if (ret < 0) {
6800 + dev_err(&dev->dev, "unable to register port at index %d "
6801 + "(IO%lx MEM%lx IRQ%d): %d\n", i,
6802 + p->iobase, p->mapbase, p->irq, ret);
6803 + }
6804 + }
6805 + return 0;
6806 +}
6807 +
6808 +/*
6809 + * Remove serial ports registered against a platform device.
6810 + */
6811 +static int __devexit serial8250_remove(struct platform_device *dev)
6812 +{
6813 + int i;
6814 +
6815 + for (i = 0; i < nr_uarts; i++) {
6816 + struct uart_8250_port *up = &serial8250_ports[i];
6817 +
6818 + if (up->port.dev == &dev->dev)
6819 + serial8250_unregister_port(i);
6820 + }
6821 + return 0;
6822 +}
6823 +
6824 +static int serial8250_suspend(struct platform_device *dev, pm_message_t state)
6825 +{
6826 + int i;
6827 +
6828 + for (i = 0; i < UART_NR; i++) {
6829 + struct uart_8250_port *up = &serial8250_ports[i];
6830 +
6831 + if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
6832 + uart_suspend_port(&serial8250_reg, &up->port);
6833 + }
6834 +
6835 + return 0;
6836 +}
6837 +
6838 +static int serial8250_resume(struct platform_device *dev)
6839 +{
6840 + int i;
6841 +
6842 + for (i = 0; i < UART_NR; i++) {
6843 + struct uart_8250_port *up = &serial8250_ports[i];
6844 +
6845 + if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
6846 + uart_resume_port(&serial8250_reg, &up->port);
6847 + }
6848 +
6849 + return 0;
6850 +}
6851 +
6852 +static struct platform_driver serial8250_isa_driver = {
6853 + .probe = serial8250_probe,
6854 + .remove = __devexit_p(serial8250_remove),
6855 + .suspend = serial8250_suspend,
6856 + .resume = serial8250_resume,
6857 + .driver = {
6858 + .name = "serial8250",
6859 + .owner = THIS_MODULE,
6860 + },
6861 +};
6862 +
6863 +/*
6864 + * This "device" covers _all_ ISA 8250-compatible serial devices listed
6865 + * in the table in include/asm/serial.h
6866 + */
6867 +static struct platform_device *serial8250_isa_devs;
6868 +
6869 +/*
6870 + * serial8250_register_port and serial8250_unregister_port allows for
6871 + * 16x50 serial ports to be configured at run-time, to support PCMCIA
6872 + * modems and PCI multiport cards.
6873 + */
6874 +static DEFINE_MUTEX(serial_mutex);
6875 +
6876 +static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)
6877 +{
6878 + int i;
6879 +
6880 + /*
6881 + * First, find a port entry which matches.
6882 + */
6883 + for (i = 0; i < nr_uarts; i++)
6884 + if (uart_match_port(&serial8250_ports[i].port, port))
6885 + return &serial8250_ports[i];
6886 +
6887 + /*
6888 + * We didn't find a matching entry, so look for the first
6889 + * free entry. We look for one which hasn't been previously
6890 + * used (indicated by zero iobase).
6891 + */
6892 + for (i = 0; i < nr_uarts; i++)
6893 + if (serial8250_ports[i].port.type == PORT_UNKNOWN &&
6894 + serial8250_ports[i].port.iobase == 0)
6895 + return &serial8250_ports[i];
6896 +
6897 + /*
6898 + * That also failed. Last resort is to find any entry which
6899 + * doesn't have a real port associated with it.
6900 + */
6901 + for (i = 0; i < nr_uarts; i++)
6902 + if (serial8250_ports[i].port.type == PORT_UNKNOWN)
6903 + return &serial8250_ports[i];
6904 +
6905 + return NULL;
6906 +}
6907 +
6908 +/**
6909 + * serial8250_register_port - register a serial port
6910 + * @port: serial port template
6911 + *
6912 + * Configure the serial port specified by the request. If the
6913 + * port exists and is in use, it is hung up and unregistered
6914 + * first.
6915 + *
6916 + * The port is then probed and if necessary the IRQ is autodetected
6917 + * If this fails an error is returned.
6918 + *
6919 + * On success the port is ready to use and the line number is returned.
6920 + */
6921 +int serial8250_register_port(struct uart_port *port)
6922 +{
6923 + struct uart_8250_port *uart;
6924 + int ret = -ENOSPC;
6925 +
6926 + if (port->uartclk == 0)
6927 + return -EINVAL;
6928 +
6929 + mutex_lock(&serial_mutex);
6930 +
6931 + uart = serial8250_find_match_or_unused(port);
6932 + if (uart) {
6933 + uart_remove_one_port(&serial8250_reg, &uart->port);
6934 +
6935 + uart->port.iobase = port->iobase;
6936 + uart->port.membase = port->membase;
6937 + uart->port.irq = port->irq;
6938 + uart->port.uartclk = port->uartclk;
6939 + uart->port.fifosize = port->fifosize;
6940 + uart->port.regshift = port->regshift;
6941 + uart->port.iotype = port->iotype;
6942 + uart->port.flags = port->flags | UPF_BOOT_AUTOCONF;
6943 + uart->port.mapbase = port->mapbase;
6944 + if (port->dev)
6945 + uart->port.dev = port->dev;
6946 +
6947 + ret = uart_add_one_port(&serial8250_reg, &uart->port);
6948 + if (ret == 0)
6949 + ret = uart->port.line;
6950 + }
6951 + mutex_unlock(&serial_mutex);
6952 +
6953 + return ret;
6954 +}
6955 +EXPORT_SYMBOL(serial8250_register_port);
6956 +
6957 +/**
6958 + * serial8250_unregister_port - remove a 16x50 serial port at runtime
6959 + * @line: serial line number
6960 + *
6961 + * Remove one serial port. This may not be called from interrupt
6962 + * context. We hand the port back to the our control.
6963 + */
6964 +void serial8250_unregister_port(int line)
6965 +{
6966 + struct uart_8250_port *uart = &serial8250_ports[line];
6967 +
6968 + mutex_lock(&serial_mutex);
6969 + uart_remove_one_port(&serial8250_reg, &uart->port);
6970 + if (serial8250_isa_devs) {
6971 + uart->port.flags &= ~UPF_BOOT_AUTOCONF;
6972 + uart->port.type = PORT_UNKNOWN;
6973 + uart->port.dev = &serial8250_isa_devs->dev;
6974 + uart_add_one_port(&serial8250_reg, &uart->port);
6975 + } else {
6976 + uart->port.dev = NULL;
6977 + }
6978 + mutex_unlock(&serial_mutex);
6979 +}
6980 +EXPORT_SYMBOL(serial8250_unregister_port);
6981 +
6982 +static int __init serial8250_init(void)
6983 +{
6984 + int ret, i;
6985 +
6986 + if (nr_uarts > UART_NR)
6987 + nr_uarts = UART_NR;
6988 +
6989 + printk(KERN_INFO "Serial: 8250/16550 driver $Revision: 1.90 $ "
6990 + "%d ports, IRQ sharing %sabled\n", nr_uarts,
6991 + share_irqs ? "en" : "dis");
6992 +
6993 + for (i = 0; i < NR_IRQS; i++)
6994 + spin_lock_init(&irq_lists[i].lock);
6995 +
6996 + ret = uart_register_driver(&serial8250_reg);
6997 + if (ret)
6998 + goto out;
6999 +
7000 + serial8250_isa_devs = platform_device_alloc("serial8250",
7001 + PLAT8250_DEV_LEGACY);
7002 + if (!serial8250_isa_devs) {
7003 + ret = -ENOMEM;
7004 + goto unreg_uart_drv;
7005 + }
7006 +
7007 + ret = platform_device_add(serial8250_isa_devs);
7008 + if (ret)
7009 + goto put_dev;
7010 +
7011 + serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);
7012 +
7013 + ret = platform_driver_register(&serial8250_isa_driver);
7014 + if (ret == 0)
7015 + goto out;
7016 +
7017 + platform_device_del(serial8250_isa_devs);
7018 + put_dev:
7019 + platform_device_put(serial8250_isa_devs);
7020 + unreg_uart_drv:
7021 + uart_unregister_driver(&serial8250_reg);
7022 + out:
7023 + return ret;
7024 +}
7025 +
7026 +static void __exit serial8250_exit(void)
7027 +{
7028 + struct platform_device *isa_dev = serial8250_isa_devs;
7029 +
7030 + /*
7031 + * This tells serial8250_unregister_port() not to re-register
7032 + * the ports (thereby making serial8250_isa_driver permanently
7033 + * in use.)
7034 + */
7035 + serial8250_isa_devs = NULL;
7036 +
7037 + platform_driver_unregister(&serial8250_isa_driver);
7038 + platform_device_unregister(isa_dev);
7039 +
7040 + uart_unregister_driver(&serial8250_reg);
7041 +}
7042 +
7043 +module_init(serial8250_init);
7044 +module_exit(serial8250_exit);
7045 +
7046 +EXPORT_SYMBOL(serial8250_suspend_port);
7047 +EXPORT_SYMBOL(serial8250_resume_port);
7048 +
7049 +MODULE_LICENSE("GPL");
7050 +MODULE_DESCRIPTION("Generic 8250/16x50 serial driver $Revision: 1.90 $");
7051 +
7052 +module_param(share_irqs, uint, 0644);
7053 +MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"
7054 + " (unsafe)");
7055 +
7056 +module_param(nr_uarts, uint, 0644);
7057 +MODULE_PARM_DESC(nr_uarts, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS) ")");
7058 +
7059 +#ifdef CONFIG_SERIAL_8250_RSA
7060 +module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);
7061 +MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");
7062 +#endif
7063 +MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);
7064 diff -Nur linux-2.6.21.1/drivers/usb/host/ehci.h linux-2.6.21.1-owrt/drivers/usb/host/ehci.h
7065 --- linux-2.6.21.1/drivers/usb/host/ehci.h 2007-04-27 23:49:26.000000000 +0200
7066 +++ linux-2.6.21.1-owrt/drivers/usb/host/ehci.h 2007-05-23 23:37:18.000000000 +0200
7067 @@ -87,6 +87,7 @@
7068 struct dma_pool *sitd_pool; /* sitd per split iso urb */
7069
7070 struct timer_list watchdog;
7071 + struct timer_list softirq;
7072 unsigned long actions;
7073 unsigned stamp;
7074 unsigned long next_statechange;
7075 diff -Nur linux-2.6.21.1/drivers/usb/host/ehci-hcd.c linux-2.6.21.1-owrt/drivers/usb/host/ehci-hcd.c
7076 --- linux-2.6.21.1/drivers/usb/host/ehci-hcd.c 2007-04-27 23:49:26.000000000 +0200
7077 +++ linux-2.6.21.1-owrt/drivers/usb/host/ehci-hcd.c 2007-05-23 23:37:18.000000000 +0200
7078 @@ -118,6 +118,7 @@
7079 #define EHCI_IO_JIFFIES (HZ/10) /* io watchdog > irq_thresh */
7080 #define EHCI_ASYNC_JIFFIES (HZ/20) /* async idle timeout */
7081 #define EHCI_SHRINK_JIFFIES (HZ/200) /* async qh unlink delay */
7082 +#define EHCI_SOFTIRQ (HZ/400)
7083
7084 /* Initial IRQ latency: faster than hw default */
7085 static int log2_irq_thresh = 0; // 0 to 6
7086 @@ -273,6 +274,16 @@
7087 #include "ehci-sched.c"
7088
7089 /*-------------------------------------------------------------------------*/
7090 +static irqreturn_t ehci_irq (struct usb_hcd *hcd);
7091 +
7092 +static void ehci_softirq (unsigned long param)
7093 +{
7094 + struct ehci_hcd *ehci = (struct ehci_hcd *) param;
7095 +
7096 + if (ehci_irq(ehci_to_hcd(ehci)) != IRQ_NONE)
7097 + set_bit(HCD_FLAG_SAW_IRQ, &(ehci_to_hcd(ehci))->flags);
7098 + mod_timer (&ehci->softirq, jiffies + EHCI_SOFTIRQ);
7099 +}
7100
7101 static void ehci_watchdog (unsigned long param)
7102 {
7103 @@ -289,6 +300,10 @@
7104 COUNT (ehci->stats.lost_iaa);
7105 ehci_writel(ehci, STS_IAA, &ehci->regs->status);
7106 ehci->reclaim_ready = 1;
7107 + if (!timer_pending(&ehci->softirq)) {
7108 + ehci_info(ehci, "switching to softirq\n");
7109 + mod_timer (&ehci->softirq, jiffies + EHCI_SOFTIRQ);
7110 + }
7111 }
7112 }
7113
7114 @@ -396,6 +411,7 @@
7115
7116 /* no more interrupts ... */
7117 del_timer_sync (&ehci->watchdog);
7118 + del_timer_sync (&ehci->softirq);
7119
7120 spin_lock_irq(&ehci->lock);
7121 if (HC_IS_RUNNING (hcd->state))
7122 @@ -444,6 +460,10 @@
7123 ehci->watchdog.function = ehci_watchdog;
7124 ehci->watchdog.data = (unsigned long) ehci;
7125
7126 + init_timer(&ehci->softirq);
7127 + ehci->softirq.function = ehci_softirq;
7128 + ehci->softirq.data = (unsigned long) ehci;
7129 +
7130 /*
7131 * hw default: 1K periodic list heads, one per frame.
7132 * periodic_size can shrink by USBCMD update if hcc_params allows.
7133 diff -Nur linux-2.6.21.1/drivers/usb/host/ehci-hcd.c.orig linux-2.6.21.1-owrt/drivers/usb/host/ehci-hcd.c.orig
7134 --- linux-2.6.21.1/drivers/usb/host/ehci-hcd.c.orig 1970-01-01 01:00:00.000000000 +0100
7135 +++ linux-2.6.21.1-owrt/drivers/usb/host/ehci-hcd.c.orig 2007-04-27 23:49:26.000000000 +0200
7136 @@ -0,0 +1,1008 @@
7137 +/*
7138 + * Copyright (c) 2000-2004 by David Brownell
7139 + *
7140 + * This program is free software; you can redistribute it and/or modify it
7141 + * under the terms of the GNU General Public License as published by the
7142 + * Free Software Foundation; either version 2 of the License, or (at your
7143 + * option) any later version.
7144 + *
7145 + * This program is distributed in the hope that it will be useful, but
7146 + * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
7147 + * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
7148 + * for more details.
7149 + *
7150 + * You should have received a copy of the GNU General Public License
7151 + * along with this program; if not, write to the Free Software Foundation,
7152 + * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
7153 + */
7154 +
7155 +#include <linux/module.h>
7156 +#include <linux/pci.h>
7157 +#include <linux/dmapool.h>
7158 +#include <linux/kernel.h>
7159 +#include <linux/delay.h>
7160 +#include <linux/ioport.h>
7161 +#include <linux/sched.h>
7162 +#include <linux/slab.h>
7163 +#include <linux/smp_lock.h>
7164 +#include <linux/errno.h>
7165 +#include <linux/init.h>
7166 +#include <linux/timer.h>
7167 +#include <linux/list.h>
7168 +#include <linux/interrupt.h>
7169 +#include <linux/reboot.h>
7170 +#include <linux/usb.h>
7171 +#include <linux/moduleparam.h>
7172 +#include <linux/dma-mapping.h>
7173 +
7174 +#include "../core/hcd.h"
7175 +
7176 +#include <asm/byteorder.h>
7177 +#include <asm/io.h>
7178 +#include <asm/irq.h>
7179 +#include <asm/system.h>
7180 +#include <asm/unaligned.h>
7181 +#ifdef CONFIG_PPC_PS3
7182 +#include <asm/firmware.h>
7183 +#endif
7184 +
7185 +
7186 +/*-------------------------------------------------------------------------*/
7187 +
7188 +/*
7189 + * EHCI hc_driver implementation ... experimental, incomplete.
7190 + * Based on the final 1.0 register interface specification.
7191 + *
7192 + * USB 2.0 shows up in upcoming www.pcmcia.org technology.
7193 + * First was PCMCIA, like ISA; then CardBus, which is PCI.
7194 + * Next comes "CardBay", using USB 2.0 signals.
7195 + *
7196 + * Contains additional contributions by Brad Hards, Rory Bolt, and others.
7197 + * Special thanks to Intel and VIA for providing host controllers to
7198 + * test this driver on, and Cypress (including In-System Design) for
7199 + * providing early devices for those host controllers to talk to!
7200 + *
7201 + * HISTORY:
7202 + *
7203 + * 2004-05-10 Root hub and PCI suspend/resume support; remote wakeup. (db)
7204 + * 2004-02-24 Replace pci_* with generic dma_* API calls (dsaxena@plexity.net)
7205 + * 2003-12-29 Rewritten high speed iso transfer support (by Michal Sojka,
7206 + * <sojkam@centrum.cz>, updates by DB).
7207 + *
7208 + * 2002-11-29 Correct handling for hw async_next register.
7209 + * 2002-08-06 Handling for bulk and interrupt transfers is mostly shared;
7210 + * only scheduling is different, no arbitrary limitations.
7211 + * 2002-07-25 Sanity check PCI reads, mostly for better cardbus support,
7212 + * clean up HC run state handshaking.
7213 + * 2002-05-24 Preliminary FS/LS interrupts, using scheduling shortcuts
7214 + * 2002-05-11 Clear TT errors for FS/LS ctrl/bulk. Fill in some other
7215 + * missing pieces: enabling 64bit dma, handoff from BIOS/SMM.
7216 + * 2002-05-07 Some error path cleanups to report better errors; wmb();
7217 + * use non-CVS version id; better iso bandwidth claim.
7218 + * 2002-04-19 Control/bulk/interrupt submit no longer uses giveback() on
7219 + * errors in submit path. Bugfixes to interrupt scheduling/processing.
7220 + * 2002-03-05 Initial high-speed ISO support; reduce ITD memory; shift
7221 + * more checking to generic hcd framework (db). Make it work with
7222 + * Philips EHCI; reduce PCI traffic; shorten IRQ path (Rory Bolt).
7223 + * 2002-01-14 Minor cleanup; version synch.
7224 + * 2002-01-08 Fix roothub handoff of FS/LS to companion controllers.
7225 + * 2002-01-04 Control/Bulk queuing behaves.
7226 + *
7227 + * 2001-12-12 Initial patch version for Linux 2.5.1 kernel.
7228 + * 2001-June Works with usb-storage and NEC EHCI on 2.4
7229 + */
7230 +
7231 +#define DRIVER_VERSION "10 Dec 2004"
7232 +#define DRIVER_AUTHOR "David Brownell"
7233 +#define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
7234 +
7235 +static const char hcd_name [] = "ehci_hcd";
7236 +
7237 +
7238 +#undef EHCI_VERBOSE_DEBUG
7239 +#undef EHCI_URB_TRACE
7240 +
7241 +#ifdef DEBUG
7242 +#define EHCI_STATS
7243 +#endif
7244 +
7245 +/* magic numbers that can affect system performance */
7246 +#define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
7247 +#define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
7248 +#define EHCI_TUNE_RL_TT 0
7249 +#define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
7250 +#define EHCI_TUNE_MULT_TT 1
7251 +#define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */
7252 +
7253 +#define EHCI_IAA_JIFFIES (HZ/100) /* arbitrary; ~10 msec */
7254 +#define EHCI_IO_JIFFIES (HZ/10) /* io watchdog > irq_thresh */
7255 +#define EHCI_ASYNC_JIFFIES (HZ/20) /* async idle timeout */
7256 +#define EHCI_SHRINK_JIFFIES (HZ/200) /* async qh unlink delay */
7257 +
7258 +/* Initial IRQ latency: faster than hw default */
7259 +static int log2_irq_thresh = 0; // 0 to 6
7260 +module_param (log2_irq_thresh, int, S_IRUGO);
7261 +MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
7262 +
7263 +/* initial park setting: slower than hw default */
7264 +static unsigned park = 0;
7265 +module_param (park, uint, S_IRUGO);
7266 +MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
7267 +
7268 +/* for flakey hardware, ignore overcurrent indicators */
7269 +static int ignore_oc = 0;
7270 +module_param (ignore_oc, bool, S_IRUGO);
7271 +MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
7272 +
7273 +#define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
7274 +
7275 +/*-------------------------------------------------------------------------*/
7276 +
7277 +#include "ehci.h"
7278 +#include "ehci-dbg.c"
7279 +
7280 +/*-------------------------------------------------------------------------*/
7281 +
7282 +/*
7283 + * handshake - spin reading hc until handshake completes or fails
7284 + * @ptr: address of hc register to be read
7285 + * @mask: bits to look at in result of read
7286 + * @done: value of those bits when handshake succeeds
7287 + * @usec: timeout in microseconds
7288 + *
7289 + * Returns negative errno, or zero on success
7290 + *
7291 + * Success happens when the "mask" bits have the specified value (hardware
7292 + * handshake done). There are two failure modes: "usec" have passed (major
7293 + * hardware flakeout), or the register reads as all-ones (hardware removed).
7294 + *
7295 + * That last failure should_only happen in cases like physical cardbus eject
7296 + * before driver shutdown. But it also seems to be caused by bugs in cardbus
7297 + * bridge shutdown: shutting down the bridge before the devices using it.
7298 + */
7299 +static int handshake (struct ehci_hcd *ehci, void __iomem *ptr,
7300 + u32 mask, u32 done, int usec)
7301 +{
7302 + u32 result;
7303 +
7304 + do {
7305 + result = ehci_readl(ehci, ptr);
7306 + if (result == ~(u32)0) /* card removed */
7307 + return -ENODEV;
7308 + result &= mask;
7309 + if (result == done)
7310 + return 0;
7311 + udelay (1);
7312 + usec--;
7313 + } while (usec > 0);
7314 + return -ETIMEDOUT;
7315 +}
7316 +
7317 +/* force HC to halt state from unknown (EHCI spec section 2.3) */
7318 +static int ehci_halt (struct ehci_hcd *ehci)
7319 +{
7320 + u32 temp = ehci_readl(ehci, &ehci->regs->status);
7321 +
7322 + /* disable any irqs left enabled by previous code */
7323 + ehci_writel(ehci, 0, &ehci->regs->intr_enable);
7324 +
7325 + if ((temp & STS_HALT) != 0)
7326 + return 0;
7327 +
7328 + temp = ehci_readl(ehci, &ehci->regs->command);
7329 + temp &= ~CMD_RUN;
7330 + ehci_writel(ehci, temp, &ehci->regs->command);
7331 + return handshake (ehci, &ehci->regs->status,
7332 + STS_HALT, STS_HALT, 16 * 125);
7333 +}
7334 +
7335 +/* put TDI/ARC silicon into EHCI mode */
7336 +static void tdi_reset (struct ehci_hcd *ehci)
7337 +{
7338 + u32 __iomem *reg_ptr;
7339 + u32 tmp;
7340 +
7341 + reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + 0x68);
7342 + tmp = ehci_readl(ehci, reg_ptr);
7343 + tmp |= 0x3;
7344 + ehci_writel(ehci, tmp, reg_ptr);
7345 +}
7346 +
7347 +/* reset a non-running (STS_HALT == 1) controller */
7348 +static int ehci_reset (struct ehci_hcd *ehci)
7349 +{
7350 + int retval;
7351 + u32 command = ehci_readl(ehci, &ehci->regs->command);
7352 +
7353 + command |= CMD_RESET;
7354 + dbg_cmd (ehci, "reset", command);
7355 + ehci_writel(ehci, command, &ehci->regs->command);
7356 + ehci_to_hcd(ehci)->state = HC_STATE_HALT;
7357 + ehci->next_statechange = jiffies;
7358 + retval = handshake (ehci, &ehci->regs->command,
7359 + CMD_RESET, 0, 250 * 1000);
7360 +
7361 + if (retval)
7362 + return retval;
7363 +
7364 + if (ehci_is_TDI(ehci))
7365 + tdi_reset (ehci);
7366 +
7367 + return retval;
7368 +}
7369 +
7370 +/* idle the controller (from running) */
7371 +static void ehci_quiesce (struct ehci_hcd *ehci)
7372 +{
7373 + u32 temp;
7374 +
7375 +#ifdef DEBUG
7376 + if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
7377 + BUG ();
7378 +#endif
7379 +
7380 + /* wait for any schedule enables/disables to take effect */
7381 + temp = ehci_readl(ehci, &ehci->regs->command) << 10;
7382 + temp &= STS_ASS | STS_PSS;
7383 + if (handshake (ehci, &ehci->regs->status, STS_ASS | STS_PSS,
7384 + temp, 16 * 125) != 0) {
7385 + ehci_to_hcd(ehci)->state = HC_STATE_HALT;
7386 + return;
7387 + }
7388 +
7389 + /* then disable anything that's still active */
7390 + temp = ehci_readl(ehci, &ehci->regs->command);
7391 + temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
7392 + ehci_writel(ehci, temp, &ehci->regs->command);
7393 +
7394 + /* hardware can take 16 microframes to turn off ... */
7395 + if (handshake (ehci, &ehci->regs->status, STS_ASS | STS_PSS,
7396 + 0, 16 * 125) != 0) {
7397 + ehci_to_hcd(ehci)->state = HC_STATE_HALT;
7398 + return;
7399 + }
7400 +}
7401 +
7402 +/*-------------------------------------------------------------------------*/
7403 +
7404 +static void ehci_work(struct ehci_hcd *ehci);
7405 +
7406 +#include "ehci-hub.c"
7407 +#include "ehci-mem.c"
7408 +#include "ehci-q.c"
7409 +#include "ehci-sched.c"
7410 +
7411 +/*-------------------------------------------------------------------------*/
7412 +
7413 +static void ehci_watchdog (unsigned long param)
7414 +{
7415 + struct ehci_hcd *ehci = (struct ehci_hcd *) param;
7416 + unsigned long flags;
7417 +
7418 + spin_lock_irqsave (&ehci->lock, flags);
7419 +
7420 + /* lost IAA irqs wedge things badly; seen with a vt8235 */
7421 + if (ehci->reclaim) {
7422 + u32 status = ehci_readl(ehci, &ehci->regs->status);
7423 + if (status & STS_IAA) {
7424 + ehci_vdbg (ehci, "lost IAA\n");
7425 + COUNT (ehci->stats.lost_iaa);
7426 + ehci_writel(ehci, STS_IAA, &ehci->regs->status);
7427 + ehci->reclaim_ready = 1;
7428 + }
7429 + }
7430 +
7431 + /* stop async processing after it's idled a bit */
7432 + if (test_bit (TIMER_ASYNC_OFF, &ehci->actions))
7433 + start_unlink_async (ehci, ehci->async);
7434 +
7435 + /* ehci could run by timer, without IRQs ... */
7436 + ehci_work (ehci);
7437 +
7438 + spin_unlock_irqrestore (&ehci->lock, flags);
7439 +}
7440 +
7441 +/* On some systems, leaving remote wakeup enabled prevents system shutdown.
7442 + * The firmware seems to think that powering off is a wakeup event!
7443 + * This routine turns off remote wakeup and everything else, on all ports.
7444 + */
7445 +static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
7446 +{
7447 + int port = HCS_N_PORTS(ehci->hcs_params);
7448 +
7449 + while (port--)
7450 + ehci_writel(ehci, PORT_RWC_BITS,
7451 + &ehci->regs->port_status[port]);
7452 +}
7453 +
7454 +/* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
7455 + * This forcibly disables dma and IRQs, helping kexec and other cases
7456 + * where the next system software may expect clean state.
7457 + */
7458 +static void
7459 +ehci_shutdown (struct usb_hcd *hcd)
7460 +{
7461 + struct ehci_hcd *ehci;
7462 +
7463 + ehci = hcd_to_ehci (hcd);
7464 + (void) ehci_halt (ehci);
7465 + ehci_turn_off_all_ports(ehci);
7466 +
7467 + /* make BIOS/etc use companion controller during reboot */
7468 + ehci_writel(ehci, 0, &ehci->regs->configured_flag);
7469 +
7470 + /* unblock posted writes */
7471 + ehci_readl(ehci, &ehci->regs->configured_flag);
7472 +}
7473 +
7474 +static void ehci_port_power (struct ehci_hcd *ehci, int is_on)
7475 +{
7476 + unsigned port;
7477 +
7478 + if (!HCS_PPC (ehci->hcs_params))
7479 + return;
7480 +
7481 + ehci_dbg (ehci, "...power%s ports...\n", is_on ? "up" : "down");
7482 + for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; )
7483 + (void) ehci_hub_control(ehci_to_hcd(ehci),
7484 + is_on ? SetPortFeature : ClearPortFeature,
7485 + USB_PORT_FEAT_POWER,
7486 + port--, NULL, 0);
7487 + msleep(20);
7488 +}
7489 +
7490 +/*-------------------------------------------------------------------------*/
7491 +
7492 +/*
7493 + * ehci_work is called from some interrupts, timers, and so on.
7494 + * it calls driver completion functions, after dropping ehci->lock.
7495 + */
7496 +static void ehci_work (struct ehci_hcd *ehci)
7497 +{
7498 + timer_action_done (ehci, TIMER_IO_WATCHDOG);
7499 + if (ehci->reclaim_ready)
7500 + end_unlink_async (ehci);
7501 +
7502 + /* another CPU may drop ehci->lock during a schedule scan while
7503 + * it reports urb completions. this flag guards against bogus
7504 + * attempts at re-entrant schedule scanning.
7505 + */
7506 + if (ehci->scanning)
7507 + return;
7508 + ehci->scanning = 1;
7509 + scan_async (ehci);
7510 + if (ehci->next_uframe != -1)
7511 + scan_periodic (ehci);
7512 + ehci->scanning = 0;
7513 +
7514 + /* the IO watchdog guards against hardware or driver bugs that
7515 + * misplace IRQs, and should let us run completely without IRQs.
7516 + * such lossage has been observed on both VT6202 and VT8235.
7517 + */
7518 + if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state) &&
7519 + (ehci->async->qh_next.ptr != NULL ||
7520 + ehci->periodic_sched != 0))
7521 + timer_action (ehci, TIMER_IO_WATCHDOG);
7522 +}
7523 +
7524 +static void ehci_stop (struct usb_hcd *hcd)
7525 +{
7526 + struct ehci_hcd *ehci = hcd_to_ehci (hcd);
7527 +
7528 + ehci_dbg (ehci, "stop\n");
7529 +
7530 + /* Turn off port power on all root hub ports. */
7531 + ehci_port_power (ehci, 0);
7532 +
7533 + /* no more interrupts ... */
7534 + del_timer_sync (&ehci->watchdog);
7535 +
7536 + spin_lock_irq(&ehci->lock);
7537 + if (HC_IS_RUNNING (hcd->state))
7538 + ehci_quiesce (ehci);
7539 +
7540 + ehci_reset (ehci);
7541 + ehci_writel(ehci, 0, &ehci->regs->intr_enable);
7542 + spin_unlock_irq(&ehci->lock);
7543 +
7544 + /* let companion controllers work when we aren't */
7545 + ehci_writel(ehci, 0, &ehci->regs->configured_flag);
7546 +
7547 + remove_companion_file(ehci);
7548 + remove_debug_files (ehci);
7549 +
7550 + /* root hub is shut down separately (first, when possible) */
7551 + spin_lock_irq (&ehci->lock);
7552 + if (ehci->async)
7553 + ehci_work (ehci);
7554 + spin_unlock_irq (&ehci->lock);
7555 + ehci_mem_cleanup (ehci);
7556 +
7557 +#ifdef EHCI_STATS
7558 + ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
7559 + ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
7560 + ehci->stats.lost_iaa);
7561 + ehci_dbg (ehci, "complete %ld unlink %ld\n",
7562 + ehci->stats.complete, ehci->stats.unlink);
7563 +#endif
7564 +
7565 + dbg_status (ehci, "ehci_stop completed",
7566 + ehci_readl(ehci, &ehci->regs->status));
7567 +}
7568 +
7569 +/* one-time init, only for memory state */
7570 +static int ehci_init(struct usb_hcd *hcd)
7571 +{
7572 + struct ehci_hcd *ehci = hcd_to_ehci(hcd);
7573 + u32 temp;
7574 + int retval;
7575 + u32 hcc_params;
7576 +
7577 + spin_lock_init(&ehci->lock);
7578 +
7579 + init_timer(&ehci->watchdog);
7580 + ehci->watchdog.function = ehci_watchdog;
7581 + ehci->watchdog.data = (unsigned long) ehci;
7582 +
7583 + /*
7584 + * hw default: 1K periodic list heads, one per frame.
7585 + * periodic_size can shrink by USBCMD update if hcc_params allows.
7586 + */
7587 + ehci->periodic_size = DEFAULT_I_TDPS;
7588 + if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
7589 + return retval;
7590 +
7591 + /* controllers may cache some of the periodic schedule ... */
7592 + hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
7593 + if (HCC_ISOC_CACHE(hcc_params)) // full frame cache
7594 + ehci->i_thresh = 8;
7595 + else // N microframes cached
7596 + ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
7597 +
7598 + ehci->reclaim = NULL;
7599 + ehci->reclaim_ready = 0;
7600 + ehci->next_uframe = -1;
7601 +
7602 + /*
7603 + * dedicate a qh for the async ring head, since we couldn't unlink
7604 + * a 'real' qh without stopping the async schedule [4.8]. use it
7605 + * as the 'reclamation list head' too.
7606 + * its dummy is used in hw_alt_next of many tds, to prevent the qh
7607 + * from automatically advancing to the next td after short reads.
7608 + */
7609 + ehci->async->qh_next.qh = NULL;
7610 + ehci->async->hw_next = QH_NEXT(ehci->async->qh_dma);
7611 + ehci->async->hw_info1 = cpu_to_le32(QH_HEAD);
7612 + ehci->async->hw_token = cpu_to_le32(QTD_STS_HALT);
7613 + ehci->async->hw_qtd_next = EHCI_LIST_END;
7614 + ehci->async->qh_state = QH_STATE_LINKED;
7615 + ehci->async->hw_alt_next = QTD_NEXT(ehci->async->dummy->qtd_dma);
7616 +
7617 + /* clear interrupt enables, set irq latency */
7618 + if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
7619 + log2_irq_thresh = 0;
7620 + temp = 1 << (16 + log2_irq_thresh);
7621 + if (HCC_CANPARK(hcc_params)) {
7622 + /* HW default park == 3, on hardware that supports it (like
7623 + * NVidia and ALI silicon), maximizes throughput on the async
7624 + * schedule by avoiding QH fetches between transfers.
7625 + *
7626 + * With fast usb storage devices and NForce2, "park" seems to
7627 + * make problems: throughput reduction (!), data errors...
7628 + */
7629 + if (park) {
7630 + park = min(park, (unsigned) 3);
7631 + temp |= CMD_PARK;
7632 + temp |= park << 8;
7633 + }
7634 + ehci_dbg(ehci, "park %d\n", park);
7635 + }
7636 + if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
7637 + /* periodic schedule size can be smaller than default */
7638 + temp &= ~(3 << 2);
7639 + temp |= (EHCI_TUNE_FLS << 2);
7640 + switch (EHCI_TUNE_FLS) {
7641 + case 0: ehci->periodic_size = 1024; break;
7642 + case 1: ehci->periodic_size = 512; break;
7643 + case 2: ehci->periodic_size = 256; break;
7644 + default: BUG();
7645 + }
7646 + }
7647 + ehci->command = temp;
7648 +
7649 + return 0;
7650 +}
7651 +
7652 +/* start HC running; it's halted, ehci_init() has been run (once) */
7653 +static int ehci_run (struct usb_hcd *hcd)
7654 +{
7655 + struct ehci_hcd *ehci = hcd_to_ehci (hcd);
7656 + int retval;
7657 + u32 temp;
7658 + u32 hcc_params;
7659 +
7660 + hcd->uses_new_polling = 1;
7661 + hcd->poll_rh = 0;
7662 +
7663 + /* EHCI spec section 4.1 */
7664 + if ((retval = ehci_reset(ehci)) != 0) {
7665 + ehci_mem_cleanup(ehci);
7666 + return retval;
7667 + }
7668 + ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
7669 + ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
7670 +
7671 + /*
7672 + * hcc_params controls whether ehci->regs->segment must (!!!)
7673 + * be used; it constrains QH/ITD/SITD and QTD locations.
7674 + * pci_pool consistent memory always uses segment zero.
7675 + * streaming mappings for I/O buffers, like pci_map_single(),
7676 + * can return segments above 4GB, if the device allows.
7677 + *
7678 + * NOTE: the dma mask is visible through dma_supported(), so
7679 + * drivers can pass this info along ... like NETIF_F_HIGHDMA,
7680 + * Scsi_Host.highmem_io, and so forth. It's readonly to all
7681 + * host side drivers though.
7682 + */
7683 + hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
7684 + if (HCC_64BIT_ADDR(hcc_params)) {
7685 + ehci_writel(ehci, 0, &ehci->regs->segment);
7686 +#if 0
7687 +// this is deeply broken on almost all architectures
7688 + if (!dma_set_mask(hcd->self.controller, DMA_64BIT_MASK))
7689 + ehci_info(ehci, "enabled 64bit DMA\n");
7690 +#endif
7691 + }
7692 +
7693 +
7694 + // Philips, Intel, and maybe others need CMD_RUN before the
7695 + // root hub will detect new devices (why?); NEC doesn't
7696 + ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
7697 + ehci->command |= CMD_RUN;
7698 + ehci_writel(ehci, ehci->command, &ehci->regs->command);
7699 + dbg_cmd (ehci, "init", ehci->command);
7700 +
7701 + /*
7702 + * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
7703 + * are explicitly handed to companion controller(s), so no TT is
7704 + * involved with the root hub. (Except where one is integrated,
7705 + * and there's no companion controller unless maybe for USB OTG.)
7706 + */
7707 + hcd->state = HC_STATE_RUNNING;
7708 + ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
7709 + ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
7710 +
7711 + temp = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase));
7712 + ehci_info (ehci,
7713 + "USB %x.%x started, EHCI %x.%02x, driver %s%s\n",
7714 + ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
7715 + temp >> 8, temp & 0xff, DRIVER_VERSION,
7716 + ignore_oc ? ", overcurrent ignored" : "");
7717 +
7718 + ehci_writel(ehci, INTR_MASK,
7719 + &ehci->regs->intr_enable); /* Turn On Interrupts */
7720 +
7721 + /* GRR this is run-once init(), being done every time the HC starts.
7722 + * So long as they're part of class devices, we can't do it init()
7723 + * since the class device isn't created that early.
7724 + */
7725 + create_debug_files(ehci);
7726 + create_companion_file(ehci);
7727 +
7728 + return 0;
7729 +}
7730 +
7731 +/*-------------------------------------------------------------------------*/
7732 +
7733 +static irqreturn_t ehci_irq (struct usb_hcd *hcd)
7734 +{
7735 + struct ehci_hcd *ehci = hcd_to_ehci (hcd);
7736 + u32 status, pcd_status = 0;
7737 + int bh;
7738 +
7739 + spin_lock (&ehci->lock);
7740 +
7741 + status = ehci_readl(ehci, &ehci->regs->status);
7742 +
7743 + /* e.g. cardbus physical eject */
7744 + if (status == ~(u32) 0) {
7745 + ehci_dbg (ehci, "device removed\n");
7746 + goto dead;
7747 + }
7748 +
7749 + status &= INTR_MASK;
7750 + if (!status) { /* irq sharing? */
7751 + spin_unlock(&ehci->lock);
7752 + return IRQ_NONE;
7753 + }
7754 +
7755 + /* clear (just) interrupts */
7756 + ehci_writel(ehci, status, &ehci->regs->status);
7757 + ehci_readl(ehci, &ehci->regs->command); /* unblock posted write */
7758 + bh = 0;
7759 +
7760 +#ifdef EHCI_VERBOSE_DEBUG
7761 + /* unrequested/ignored: Frame List Rollover */
7762 + dbg_status (ehci, "irq", status);
7763 +#endif
7764 +
7765 + /* INT, ERR, and IAA interrupt rates can be throttled */
7766 +
7767 + /* normal [4.15.1.2] or error [4.15.1.1] completion */
7768 + if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
7769 + if (likely ((status & STS_ERR) == 0))
7770 + COUNT (ehci->stats.normal);
7771 + else
7772 + COUNT (ehci->stats.error);
7773 + bh = 1;
7774 + }
7775 +
7776 + /* complete the unlinking of some qh [4.15.2.3] */
7777 + if (status & STS_IAA) {
7778 + COUNT (ehci->stats.reclaim);
7779 + ehci->reclaim_ready = 1;
7780 + bh = 1;
7781 + }
7782 +
7783 + /* remote wakeup [4.3.1] */
7784 + if (status & STS_PCD) {
7785 + unsigned i = HCS_N_PORTS (ehci->hcs_params);
7786 + pcd_status = status;
7787 +
7788 + /* resume root hub? */
7789 + if (!(ehci_readl(ehci, &ehci->regs->command) & CMD_RUN))
7790 + usb_hcd_resume_root_hub(hcd);
7791 +
7792 + while (i--) {
7793 + int pstatus = ehci_readl(ehci,
7794 + &ehci->regs->port_status [i]);
7795 +
7796 + if (pstatus & PORT_OWNER)
7797 + continue;
7798 + if (!(pstatus & PORT_RESUME)
7799 + || ehci->reset_done [i] != 0)
7800 + continue;
7801 +
7802 + /* start 20 msec resume signaling from this port,
7803 + * and make khubd collect PORT_STAT_C_SUSPEND to
7804 + * stop that signaling.
7805 + */
7806 + ehci->reset_done [i] = jiffies + msecs_to_jiffies (20);
7807 + ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
7808 + mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
7809 + }
7810 + }
7811 +
7812 + /* PCI errors [4.15.2.4] */
7813 + if (unlikely ((status & STS_FATAL) != 0)) {
7814 + /* bogus "fatal" IRQs appear on some chips... why? */
7815 + status = ehci_readl(ehci, &ehci->regs->status);
7816 + dbg_cmd (ehci, "fatal", ehci_readl(ehci,
7817 + &ehci->regs->command));
7818 + dbg_status (ehci, "fatal", status);
7819 + if (status & STS_HALT) {
7820 + ehci_err (ehci, "fatal error\n");
7821 +dead:
7822 + ehci_reset (ehci);
7823 + ehci_writel(ehci, 0, &ehci->regs->configured_flag);
7824 + /* generic layer kills/unlinks all urbs, then
7825 + * uses ehci_stop to clean up the rest
7826 + */
7827 + bh = 1;
7828 + }
7829 + }
7830 +
7831 + if (bh)
7832 + ehci_work (ehci);
7833 + spin_unlock (&ehci->lock);
7834 + if (pcd_status & STS_PCD)
7835 + usb_hcd_poll_rh_status(hcd);
7836 + return IRQ_HANDLED;
7837 +}
7838 +
7839 +/*-------------------------------------------------------------------------*/
7840 +
7841 +/*
7842 + * non-error returns are a promise to giveback() the urb later
7843 + * we drop ownership so next owner (or urb unlink) can get it
7844 + *
7845 + * urb + dev is in hcd.self.controller.urb_list
7846 + * we're queueing TDs onto software and hardware lists
7847 + *
7848 + * hcd-specific init for hcpriv hasn't been done yet
7849 + *
7850 + * NOTE: control, bulk, and interrupt share the same code to append TDs
7851 + * to a (possibly active) QH, and the same QH scanning code.
7852 + */
7853 +static int ehci_urb_enqueue (
7854 + struct usb_hcd *hcd,
7855 + struct usb_host_endpoint *ep,
7856 + struct urb *urb,
7857 + gfp_t mem_flags
7858 +) {
7859 + struct ehci_hcd *ehci = hcd_to_ehci (hcd);
7860 + struct list_head qtd_list;
7861 +
7862 + INIT_LIST_HEAD (&qtd_list);
7863 +
7864 + switch (usb_pipetype (urb->pipe)) {
7865 + // case PIPE_CONTROL:
7866 + // case PIPE_BULK:
7867 + default:
7868 + if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
7869 + return -ENOMEM;
7870 + return submit_async (ehci, ep, urb, &qtd_list, mem_flags);
7871 +
7872 + case PIPE_INTERRUPT:
7873 + if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
7874 + return -ENOMEM;
7875 + return intr_submit (ehci, ep, urb, &qtd_list, mem_flags);
7876 +
7877 + case PIPE_ISOCHRONOUS:
7878 + if (urb->dev->speed == USB_SPEED_HIGH)
7879 + return itd_submit (ehci, urb, mem_flags);
7880 + else
7881 + return sitd_submit (ehci, urb, mem_flags);
7882 + }
7883 +}
7884 +
7885 +static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
7886 +{
7887 + /* if we need to use IAA and it's busy, defer */
7888 + if (qh->qh_state == QH_STATE_LINKED
7889 + && ehci->reclaim
7890 + && HC_IS_RUNNING (ehci_to_hcd(ehci)->state)) {
7891 + struct ehci_qh *last;
7892 +
7893 + for (last = ehci->reclaim;
7894 + last->reclaim;
7895 + last = last->reclaim)
7896 + continue;
7897 + qh->qh_state = QH_STATE_UNLINK_WAIT;
7898 + last->reclaim = qh;
7899 +
7900 + /* bypass IAA if the hc can't care */
7901 + } else if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state) && ehci->reclaim)
7902 + end_unlink_async (ehci);
7903 +
7904 + /* something else might have unlinked the qh by now */
7905 + if (qh->qh_state == QH_STATE_LINKED)
7906 + start_unlink_async (ehci, qh);
7907 +}
7908 +
7909 +/* remove from hardware lists
7910 + * completions normally happen asynchronously
7911 + */
7912 +
7913 +static int ehci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb)
7914 +{
7915 + struct ehci_hcd *ehci = hcd_to_ehci (hcd);
7916 + struct ehci_qh *qh;
7917 + unsigned long flags;
7918 +
7919 + spin_lock_irqsave (&ehci->lock, flags);
7920 + switch (usb_pipetype (urb->pipe)) {
7921 + // case PIPE_CONTROL:
7922 + // case PIPE_BULK:
7923 + default:
7924 + qh = (struct ehci_qh *) urb->hcpriv;
7925 + if (!qh)
7926 + break;
7927 + unlink_async (ehci, qh);
7928 + break;
7929 +
7930 + case PIPE_INTERRUPT:
7931 + qh = (struct ehci_qh *) urb->hcpriv;
7932 + if (!qh)
7933 + break;
7934 + switch (qh->qh_state) {
7935 + case QH_STATE_LINKED:
7936 + intr_deschedule (ehci, qh);
7937 + /* FALL THROUGH */
7938 + case QH_STATE_IDLE:
7939 + qh_completions (ehci, qh);
7940 + break;
7941 + default:
7942 + ehci_dbg (ehci, "bogus qh %p state %d\n",
7943 + qh, qh->qh_state);
7944 + goto done;
7945 + }
7946 +
7947 + /* reschedule QH iff another request is queued */
7948 + if (!list_empty (&qh->qtd_list)
7949 + && HC_IS_RUNNING (hcd->state)) {
7950 + int status;
7951 +
7952 + status = qh_schedule (ehci, qh);
7953 + spin_unlock_irqrestore (&ehci->lock, flags);
7954 +
7955 + if (status != 0) {
7956 + // shouldn't happen often, but ...
7957 + // FIXME kill those tds' urbs
7958 + err ("can't reschedule qh %p, err %d",
7959 + qh, status);
7960 + }
7961 + return status;
7962 + }
7963 + break;
7964 +
7965 + case PIPE_ISOCHRONOUS:
7966 + // itd or sitd ...
7967 +
7968 + // wait till next completion, do it then.
7969 + // completion irqs can wait up to 1024 msec,
7970 + break;
7971 + }
7972 +done:
7973 + spin_unlock_irqrestore (&ehci->lock, flags);
7974 + return 0;
7975 +}
7976 +
7977 +/*-------------------------------------------------------------------------*/
7978 +
7979 +// bulk qh holds the data toggle
7980 +
7981 +static void
7982 +ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
7983 +{
7984 + struct ehci_hcd *ehci = hcd_to_ehci (hcd);
7985 + unsigned long flags;
7986 + struct ehci_qh *qh, *tmp;
7987 +
7988 + /* ASSERT: any requests/urbs are being unlinked */
7989 + /* ASSERT: nobody can be submitting urbs for this any more */
7990 +
7991 +rescan:
7992 + spin_lock_irqsave (&ehci->lock, flags);
7993 + qh = ep->hcpriv;
7994 + if (!qh)
7995 + goto done;
7996 +
7997 + /* endpoints can be iso streams. for now, we don't
7998 + * accelerate iso completions ... so spin a while.
7999 + */
8000 + if (qh->hw_info1 == 0) {
8001 + ehci_vdbg (ehci, "iso delay\n");
8002 + goto idle_timeout;
8003 + }
8004 +
8005 + if (!HC_IS_RUNNING (hcd->state))
8006 + qh->qh_state = QH_STATE_IDLE;
8007 + switch (qh->qh_state) {
8008 + case QH_STATE_LINKED:
8009 + for (tmp = ehci->async->qh_next.qh;
8010 + tmp && tmp != qh;
8011 + tmp = tmp->qh_next.qh)
8012 + continue;
8013 + /* periodic qh self-unlinks on empty */
8014 + if (!tmp)
8015 + goto nogood;
8016 + unlink_async (ehci, qh);
8017 + /* FALL THROUGH */
8018 + case QH_STATE_UNLINK: /* wait for hw to finish? */
8019 +idle_timeout:
8020 + spin_unlock_irqrestore (&ehci->lock, flags);
8021 + schedule_timeout_uninterruptible(1);
8022 + goto rescan;
8023 + case QH_STATE_IDLE: /* fully unlinked */
8024 + if (list_empty (&qh->qtd_list)) {
8025 + qh_put (qh);
8026 + break;
8027 + }
8028 + /* else FALL THROUGH */
8029 + default:
8030 +nogood:
8031 + /* caller was supposed to have unlinked any requests;
8032 + * that's not our job. just leak this memory.
8033 + */
8034 + ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
8035 + qh, ep->desc.bEndpointAddress, qh->qh_state,
8036 + list_empty (&qh->qtd_list) ? "" : "(has tds)");
8037 + break;
8038 + }
8039 + ep->hcpriv = NULL;
8040 +done:
8041 + spin_unlock_irqrestore (&ehci->lock, flags);
8042 + return;
8043 +}
8044 +
8045 +static int ehci_get_frame (struct usb_hcd *hcd)
8046 +{
8047 + struct ehci_hcd *ehci = hcd_to_ehci (hcd);
8048 + return (ehci_readl(ehci, &ehci->regs->frame_index) >> 3) %
8049 + ehci->periodic_size;
8050 +}
8051 +
8052 +/*-------------------------------------------------------------------------*/
8053 +
8054 +#define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
8055 +
8056 +MODULE_DESCRIPTION (DRIVER_INFO);
8057 +MODULE_AUTHOR (DRIVER_AUTHOR);
8058 +MODULE_LICENSE ("GPL");
8059 +
8060 +#ifdef CONFIG_PCI
8061 +#include "ehci-pci.c"
8062 +#define PCI_DRIVER ehci_pci_driver
8063 +#endif
8064 +
8065 +#ifdef CONFIG_MPC834x
8066 +#include "ehci-fsl.c"
8067 +#define PLATFORM_DRIVER ehci_fsl_driver
8068 +#endif
8069 +
8070 +#ifdef CONFIG_SOC_AU1200
8071 +#include "ehci-au1xxx.c"
8072 +#define PLATFORM_DRIVER ehci_hcd_au1xxx_driver
8073 +#endif
8074 +
8075 +#ifdef CONFIG_PPC_PS3
8076 +#include "ehci-ps3.c"
8077 +#define PS3_SYSTEM_BUS_DRIVER ps3_ehci_sb_driver
8078 +#endif
8079 +
8080 +#if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
8081 + !defined(PS3_SYSTEM_BUS_DRIVER)
8082 +#error "missing bus glue for ehci-hcd"
8083 +#endif
8084 +
8085 +static int __init ehci_hcd_init(void)
8086 +{
8087 + int retval = 0;
8088 +
8089 + pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
8090 + hcd_name,
8091 + sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
8092 + sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
8093 +
8094 +#ifdef PLATFORM_DRIVER
8095 + retval = platform_driver_register(&PLATFORM_DRIVER);
8096 + if (retval < 0)
8097 + return retval;
8098 +#endif
8099 +
8100 +#ifdef PCI_DRIVER
8101 + retval = pci_register_driver(&PCI_DRIVER);
8102 + if (retval < 0) {
8103 +#ifdef PLATFORM_DRIVER
8104 + platform_driver_unregister(&PLATFORM_DRIVER);
8105 +#endif
8106 + return retval;
8107 + }
8108 +#endif
8109 +
8110 +#ifdef PS3_SYSTEM_BUS_DRIVER
8111 + if (firmware_has_feature(FW_FEATURE_PS3_LV1)) {
8112 + retval = ps3_system_bus_driver_register(
8113 + &PS3_SYSTEM_BUS_DRIVER);
8114 + if (retval < 0) {
8115 +#ifdef PLATFORM_DRIVER
8116 + platform_driver_unregister(&PLATFORM_DRIVER);
8117 +#endif
8118 +#ifdef PCI_DRIVER
8119 + pci_unregister_driver(&PCI_DRIVER);
8120 +#endif
8121 + return retval;
8122 + }
8123 + }
8124 +#endif
8125 +
8126 + return retval;
8127 +}
8128 +module_init(ehci_hcd_init);
8129 +
8130 +static void __exit ehci_hcd_cleanup(void)
8131 +{
8132 +#ifdef PLATFORM_DRIVER
8133 + platform_driver_unregister(&PLATFORM_DRIVER);
8134 +#endif
8135 +#ifdef PCI_DRIVER
8136 + pci_unregister_driver(&PCI_DRIVER);
8137 +#endif
8138 +#ifdef PS3_SYSTEM_BUS_DRIVER
8139 + if (firmware_has_feature(FW_FEATURE_PS3_LV1))
8140 + ps3_system_bus_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
8141 +#endif
8142 +}
8143 +module_exit(ehci_hcd_cleanup);
8144 +
8145 diff -Nur linux-2.6.21.1/drivers/usb/host/ehci.h.orig linux-2.6.21.1-owrt/drivers/usb/host/ehci.h.orig
8146 --- linux-2.6.21.1/drivers/usb/host/ehci.h.orig 1970-01-01 01:00:00.000000000 +0100
8147 +++ linux-2.6.21.1-owrt/drivers/usb/host/ehci.h.orig 2007-04-27 23:49:26.000000000 +0200
8148 @@ -0,0 +1,707 @@
8149 +/*
8150 + * Copyright (c) 2001-2002 by David Brownell
8151 + *
8152 + * This program is free software; you can redistribute it and/or modify it
8153 + * under the terms of the GNU General Public License as published by the
8154 + * Free Software Foundation; either version 2 of the License, or (at your
8155 + * option) any later version.
8156 + *
8157 + * This program is distributed in the hope that it will be useful, but
8158 + * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
8159 + * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
8160 + * for more details.
8161 + *
8162 + * You should have received a copy of the GNU General Public License
8163 + * along with this program; if not, write to the Free Software Foundation,
8164 + * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
8165 + */
8166 +
8167 +#ifndef __LINUX_EHCI_HCD_H
8168 +#define __LINUX_EHCI_HCD_H
8169 +
8170 +/* definitions used for the EHCI driver */
8171 +
8172 +/* statistics can be kept for for tuning/monitoring */
8173 +struct ehci_stats {
8174 + /* irq usage */
8175 + unsigned long normal;
8176 + unsigned long error;
8177 + unsigned long reclaim;
8178 + unsigned long lost_iaa;
8179 +
8180 + /* termination of urbs from core */
8181 + unsigned long complete;
8182 + unsigned long unlink;
8183 +};
8184 +
8185 +/* ehci_hcd->lock guards shared data against other CPUs:
8186 + * ehci_hcd: async, reclaim, periodic (and shadow), ...
8187 + * usb_host_endpoint: hcpriv
8188 + * ehci_qh: qh_next, qtd_list
8189 + * ehci_qtd: qtd_list
8190 + *
8191 + * Also, hold this lock when talking to HC registers or
8192 + * when updating hw_* fields in shared qh/qtd/... structures.
8193 + */
8194 +
8195 +#define EHCI_MAX_ROOT_PORTS 15 /* see HCS_N_PORTS */
8196 +
8197 +struct ehci_hcd { /* one per controller */
8198 + /* glue to PCI and HCD framework */
8199 + struct ehci_caps __iomem *caps;
8200 + struct ehci_regs __iomem *regs;
8201 + struct ehci_dbg_port __iomem *debug;
8202 +
8203 + __u32 hcs_params; /* cached register copy */
8204 + spinlock_t lock;
8205 +
8206 + /* async schedule support */
8207 + struct ehci_qh *async;
8208 + struct ehci_qh *reclaim;
8209 + unsigned reclaim_ready : 1;
8210 + unsigned scanning : 1;
8211 +
8212 + /* periodic schedule support */
8213 +#define DEFAULT_I_TDPS 1024 /* some HCs can do less */
8214 + unsigned periodic_size;
8215 + __le32 *periodic; /* hw periodic table */
8216 + dma_addr_t periodic_dma;
8217 + unsigned i_thresh; /* uframes HC might cache */
8218 +
8219 + union ehci_shadow *pshadow; /* mirror hw periodic table */
8220 + int next_uframe; /* scan periodic, start here */
8221 + unsigned periodic_sched; /* periodic activity count */
8222 +
8223 + /* per root hub port */
8224 + unsigned long reset_done [EHCI_MAX_ROOT_PORTS];
8225 + /* bit vectors (one bit per port) */
8226 + unsigned long bus_suspended; /* which ports were
8227 + already suspended at the start of a bus suspend */
8228 + unsigned long companion_ports; /* which ports are
8229 + dedicated to the companion controller */
8230 +
8231 + /* per-HC memory pools (could be per-bus, but ...) */
8232 + struct dma_pool *qh_pool; /* qh per active urb */
8233 + struct dma_pool *qtd_pool; /* one or more per qh */
8234 + struct dma_pool *itd_pool; /* itd per iso urb */
8235 + struct dma_pool *sitd_pool; /* sitd per split iso urb */
8236 +
8237 + struct timer_list watchdog;
8238 + unsigned long actions;
8239 + unsigned stamp;
8240 + unsigned long next_statechange;
8241 + u32 command;
8242 +
8243 + /* SILICON QUIRKS */
8244 + unsigned is_tdi_rh_tt:1; /* TDI roothub with TT */
8245 + unsigned no_selective_suspend:1;
8246 + unsigned has_fsl_port_bug:1; /* FreeScale */
8247 + unsigned big_endian_mmio:1;
8248 +
8249 + u8 sbrn; /* packed release number */
8250 +
8251 + /* irq statistics */
8252 +#ifdef EHCI_STATS
8253 + struct ehci_stats stats;
8254 +# define COUNT(x) do { (x)++; } while (0)
8255 +#else
8256 +# define COUNT(x) do {} while (0)
8257 +#endif
8258 +};
8259 +
8260 +/* convert between an HCD pointer and the corresponding EHCI_HCD */
8261 +static inline struct ehci_hcd *hcd_to_ehci (struct usb_hcd *hcd)
8262 +{
8263 + return (struct ehci_hcd *) (hcd->hcd_priv);
8264 +}
8265 +static inline struct usb_hcd *ehci_to_hcd (struct ehci_hcd *ehci)
8266 +{
8267 + return container_of ((void *) ehci, struct usb_hcd, hcd_priv);
8268 +}
8269 +
8270 +
8271 +enum ehci_timer_action {
8272 + TIMER_IO_WATCHDOG,
8273 + TIMER_IAA_WATCHDOG,
8274 + TIMER_ASYNC_SHRINK,
8275 + TIMER_ASYNC_OFF,
8276 +};
8277 +
8278 +static inline void
8279 +timer_action_done (struct ehci_hcd *ehci, enum ehci_timer_action action)
8280 +{
8281 + clear_bit (action, &ehci->actions);
8282 +}
8283 +
8284 +static inline void
8285 +timer_action (struct ehci_hcd *ehci, enum ehci_timer_action action)
8286 +{
8287 + if (!test_and_set_bit (action, &ehci->actions)) {
8288 + unsigned long t;
8289 +
8290 + switch (action) {
8291 + case TIMER_IAA_WATCHDOG:
8292 + t = EHCI_IAA_JIFFIES;
8293 + break;
8294 + case TIMER_IO_WATCHDOG:
8295 + t = EHCI_IO_JIFFIES;
8296 + break;
8297 + case TIMER_ASYNC_OFF:
8298 + t = EHCI_ASYNC_JIFFIES;
8299 + break;
8300 + // case TIMER_ASYNC_SHRINK:
8301 + default:
8302 + t = EHCI_SHRINK_JIFFIES;
8303 + break;
8304 + }
8305 + t += jiffies;
8306 + // all timings except IAA watchdog can be overridden.
8307 + // async queue SHRINK often precedes IAA. while it's ready
8308 + // to go OFF neither can matter, and afterwards the IO
8309 + // watchdog stops unless there's still periodic traffic.
8310 + if (action != TIMER_IAA_WATCHDOG
8311 + && t > ehci->watchdog.expires
8312 + && timer_pending (&ehci->watchdog))
8313 + return;
8314 + mod_timer (&ehci->watchdog, t);
8315 + }
8316 +}
8317 +
8318 +/*-------------------------------------------------------------------------*/
8319 +
8320 +/* EHCI register interface, corresponds to EHCI Revision 0.95 specification */
8321 +
8322 +/* Section 2.2 Host Controller Capability Registers */
8323 +struct ehci_caps {
8324 + /* these fields are specified as 8 and 16 bit registers,
8325 + * but some hosts can't perform 8 or 16 bit PCI accesses.
8326 + */
8327 + u32 hc_capbase;
8328 +#define HC_LENGTH(p) (((p)>>00)&0x00ff) /* bits 7:0 */
8329 +#define HC_VERSION(p) (((p)>>16)&0xffff) /* bits 31:16 */
8330 + u32 hcs_params; /* HCSPARAMS - offset 0x4 */
8331 +#define HCS_DEBUG_PORT(p) (((p)>>20)&0xf) /* bits 23:20, debug port? */
8332 +#define HCS_INDICATOR(p) ((p)&(1 << 16)) /* true: has port indicators */
8333 +#define HCS_N_CC(p) (((p)>>12)&0xf) /* bits 15:12, #companion HCs */
8334 +#define HCS_N_PCC(p) (((p)>>8)&0xf) /* bits 11:8, ports per CC */
8335 +#define HCS_PORTROUTED(p) ((p)&(1 << 7)) /* true: port routing */
8336 +#define HCS_PPC(p) ((p)&(1 << 4)) /* true: port power control */
8337 +#define HCS_N_PORTS(p) (((p)>>0)&0xf) /* bits 3:0, ports on HC */
8338 +
8339 + u32 hcc_params; /* HCCPARAMS - offset 0x8 */
8340 +#define HCC_EXT_CAPS(p) (((p)>>8)&0xff) /* for pci extended caps */
8341 +#define HCC_ISOC_CACHE(p) ((p)&(1 << 7)) /* true: can cache isoc frame */
8342 +#define HCC_ISOC_THRES(p) (((p)>>4)&0x7) /* bits 6:4, uframes cached */
8343 +#define HCC_CANPARK(p) ((p)&(1 << 2)) /* true: can park on async qh */
8344 +#define HCC_PGM_FRAMELISTLEN(p) ((p)&(1 << 1)) /* true: periodic_size changes*/
8345 +#define HCC_64BIT_ADDR(p) ((p)&(1)) /* true: can use 64-bit addr */
8346 + u8 portroute [8]; /* nibbles for routing - offset 0xC */
8347 +} __attribute__ ((packed));
8348 +
8349 +
8350 +/* Section 2.3 Host Controller Operational Registers */
8351 +struct ehci_regs {
8352 +
8353 + /* USBCMD: offset 0x00 */
8354 + u32 command;
8355 +/* 23:16 is r/w intr rate, in microframes; default "8" == 1/msec */
8356 +#define CMD_PARK (1<<11) /* enable "park" on async qh */
8357 +#define CMD_PARK_CNT(c) (((c)>>8)&3) /* how many transfers to park for */
8358 +#define CMD_LRESET (1<<7) /* partial reset (no ports, etc) */
8359 +#define CMD_IAAD (1<<6) /* "doorbell" interrupt async advance */
8360 +#define CMD_ASE (1<<5) /* async schedule enable */
8361 +#define CMD_PSE (1<<4) /* periodic schedule enable */
8362 +/* 3:2 is periodic frame list size */
8363 +#define CMD_RESET (1<<1) /* reset HC not bus */
8364 +#define CMD_RUN (1<<0) /* start/stop HC */
8365 +
8366 + /* USBSTS: offset 0x04 */
8367 + u32 status;
8368 +#define STS_ASS (1<<15) /* Async Schedule Status */
8369 +#define STS_PSS (1<<14) /* Periodic Schedule Status */
8370 +#define STS_RECL (1<<13) /* Reclamation */
8371 +#define STS_HALT (1<<12) /* Not running (any reason) */
8372 +/* some bits reserved */
8373 + /* these STS_* flags are also intr_enable bits (USBINTR) */
8374 +#define STS_IAA (1<<5) /* Interrupted on async advance */
8375 +#define STS_FATAL (1<<4) /* such as some PCI access errors */
8376 +#define STS_FLR (1<<3) /* frame list rolled over */
8377 +#define STS_PCD (1<<2) /* port change detect */
8378 +#define STS_ERR (1<<1) /* "error" completion (overflow, ...) */
8379 +#define STS_INT (1<<0) /* "normal" completion (short, ...) */
8380 +
8381 + /* USBINTR: offset 0x08 */
8382 + u32 intr_enable;
8383 +
8384 + /* FRINDEX: offset 0x0C */
8385 + u32 frame_index; /* current microframe number */
8386 + /* CTRLDSSEGMENT: offset 0x10 */
8387 + u32 segment; /* address bits 63:32 if needed */
8388 + /* PERIODICLISTBASE: offset 0x14 */
8389 + u32 frame_list; /* points to periodic list */
8390 + /* ASYNCLISTADDR: offset 0x18 */
8391 + u32 async_next; /* address of next async queue head */
8392 +
8393 + u32 reserved [9];
8394 +
8395 + /* CONFIGFLAG: offset 0x40 */
8396 + u32 configured_flag;
8397 +#define FLAG_CF (1<<0) /* true: we'll support "high speed" */
8398 +
8399 + /* PORTSC: offset 0x44 */
8400 + u32 port_status [0]; /* up to N_PORTS */
8401 +/* 31:23 reserved */
8402 +#define PORT_WKOC_E (1<<22) /* wake on overcurrent (enable) */
8403 +#define PORT_WKDISC_E (1<<21) /* wake on disconnect (enable) */
8404 +#define PORT_WKCONN_E (1<<20) /* wake on connect (enable) */
8405 +/* 19:16 for port testing */
8406 +#define PORT_LED_OFF (0<<14)
8407 +#define PORT_LED_AMBER (1<<14)
8408 +#define PORT_LED_GREEN (2<<14)
8409 +#define PORT_LED_MASK (3<<14)
8410 +#define PORT_OWNER (1<<13) /* true: companion hc owns this port */
8411 +#define PORT_POWER (1<<12) /* true: has power (see PPC) */
8412 +#define PORT_USB11(x) (((x)&(3<<10))==(1<<10)) /* USB 1.1 device */
8413 +/* 11:10 for detecting lowspeed devices (reset vs release ownership) */
8414 +/* 9 reserved */
8415 +#define PORT_RESET (1<<8) /* reset port */
8416 +#define PORT_SUSPEND (1<<7) /* suspend port */
8417 +#define PORT_RESUME (1<<6) /* resume it */
8418 +#define PORT_OCC (1<<5) /* over current change */
8419 +#define PORT_OC (1<<4) /* over current active */
8420 +#define PORT_PEC (1<<3) /* port enable change */
8421 +#define PORT_PE (1<<2) /* port enable */
8422 +#define PORT_CSC (1<<1) /* connect status change */
8423 +#define PORT_CONNECT (1<<0) /* device connected */
8424 +#define PORT_RWC_BITS (PORT_CSC | PORT_PEC | PORT_OCC)
8425 +} __attribute__ ((packed));
8426 +
8427 +/* Appendix C, Debug port ... intended for use with special "debug devices"
8428 + * that can help if there's no serial console. (nonstandard enumeration.)
8429 + */
8430 +struct ehci_dbg_port {
8431 + u32 control;
8432 +#define DBGP_OWNER (1<<30)
8433 +#define DBGP_ENABLED (1<<28)
8434 +#define DBGP_DONE (1<<16)
8435 +#define DBGP_INUSE (1<<10)
8436 +#define DBGP_ERRCODE(x) (((x)>>7)&0x07)
8437 +# define DBGP_ERR_BAD 1
8438 +# define DBGP_ERR_SIGNAL 2
8439 +#define DBGP_ERROR (1<<6)
8440 +#define DBGP_GO (1<<5)
8441 +#define DBGP_OUT (1<<4)
8442 +#define DBGP_LEN(x) (((x)>>0)&0x0f)
8443 + u32 pids;
8444 +#define DBGP_PID_GET(x) (((x)>>16)&0xff)
8445 +#define DBGP_PID_SET(data,tok) (((data)<<8)|(tok))
8446 + u32 data03;
8447 + u32 data47;
8448 + u32 address;
8449 +#define DBGP_EPADDR(dev,ep) (((dev)<<8)|(ep))
8450 +} __attribute__ ((packed));
8451 +
8452 +/*-------------------------------------------------------------------------*/
8453 +
8454 +#define QTD_NEXT(dma) cpu_to_le32((u32)dma)
8455 +
8456 +/*
8457 + * EHCI Specification 0.95 Section 3.5
8458 + * QTD: describe data transfer components (buffer, direction, ...)
8459 + * See Fig 3-6 "Queue Element Transfer Descriptor Block Diagram".
8460 + *
8461 + * These are associated only with "QH" (Queue Head) structures,
8462 + * used with control, bulk, and interrupt transfers.
8463 + */
8464 +struct ehci_qtd {
8465 + /* first part defined by EHCI spec */
8466 + __le32 hw_next; /* see EHCI 3.5.1 */
8467 + __le32 hw_alt_next; /* see EHCI 3.5.2 */
8468 + __le32 hw_token; /* see EHCI 3.5.3 */
8469 +#define QTD_TOGGLE (1 << 31) /* data toggle */
8470 +#define QTD_LENGTH(tok) (((tok)>>16) & 0x7fff)
8471 +#define QTD_IOC (1 << 15) /* interrupt on complete */
8472 +#define QTD_CERR(tok) (((tok)>>10) & 0x3)
8473 +#define QTD_PID(tok) (((tok)>>8) & 0x3)
8474 +#define QTD_STS_ACTIVE (1 << 7) /* HC may execute this */
8475 +#define QTD_STS_HALT (1 << 6) /* halted on error */
8476 +#define QTD_STS_DBE (1 << 5) /* data buffer error (in HC) */
8477 +#define QTD_STS_BABBLE (1 << 4) /* device was babbling (qtd halted) */
8478 +#define QTD_STS_XACT (1 << 3) /* device gave illegal response */
8479 +#define QTD_STS_MMF (1 << 2) /* incomplete split transaction */
8480 +#define QTD_STS_STS (1 << 1) /* split transaction state */
8481 +#define QTD_STS_PING (1 << 0) /* issue PING? */
8482 + __le32 hw_buf [5]; /* see EHCI 3.5.4 */
8483 + __le32 hw_buf_hi [5]; /* Appendix B */
8484 +
8485 + /* the rest is HCD-private */
8486 + dma_addr_t qtd_dma; /* qtd address */
8487 + struct list_head qtd_list; /* sw qtd list */
8488 + struct urb *urb; /* qtd's urb */
8489 + size_t length; /* length of buffer */
8490 +} __attribute__ ((aligned (32)));
8491 +
8492 +/* mask NakCnt+T in qh->hw_alt_next */
8493 +#define QTD_MASK __constant_cpu_to_le32 (~0x1f)
8494 +
8495 +#define IS_SHORT_READ(token) (QTD_LENGTH (token) != 0 && QTD_PID (token) == 1)
8496 +
8497 +/*-------------------------------------------------------------------------*/
8498 +
8499 +/* type tag from {qh,itd,sitd,fstn}->hw_next */
8500 +#define Q_NEXT_TYPE(dma) ((dma) & __constant_cpu_to_le32 (3 << 1))
8501 +
8502 +/* values for that type tag */
8503 +#define Q_TYPE_ITD __constant_cpu_to_le32 (0 << 1)
8504 +#define Q_TYPE_QH __constant_cpu_to_le32 (1 << 1)
8505 +#define Q_TYPE_SITD __constant_cpu_to_le32 (2 << 1)
8506 +#define Q_TYPE_FSTN __constant_cpu_to_le32 (3 << 1)
8507 +
8508 +/* next async queue entry, or pointer to interrupt/periodic QH */
8509 +#define QH_NEXT(dma) (cpu_to_le32(((u32)dma)&~0x01f)|Q_TYPE_QH)
8510 +
8511 +/* for periodic/async schedules and qtd lists, mark end of list */
8512 +#define EHCI_LIST_END __constant_cpu_to_le32(1) /* "null pointer" to hw */
8513 +
8514 +/*
8515 + * Entries in periodic shadow table are pointers to one of four kinds
8516 + * of data structure. That's dictated by the hardware; a type tag is
8517 + * encoded in the low bits of the hardware's periodic schedule. Use
8518 + * Q_NEXT_TYPE to get the tag.
8519 + *
8520 + * For entries in the async schedule, the type tag always says "qh".
8521 + */
8522 +union ehci_shadow {
8523 + struct ehci_qh *qh; /* Q_TYPE_QH */
8524 + struct ehci_itd *itd; /* Q_TYPE_ITD */
8525 + struct ehci_sitd *sitd; /* Q_TYPE_SITD */
8526 + struct ehci_fstn *fstn; /* Q_TYPE_FSTN */
8527 + __le32 *hw_next; /* (all types) */
8528 + void *ptr;
8529 +};
8530 +
8531 +/*-------------------------------------------------------------------------*/
8532 +
8533 +/*
8534 + * EHCI Specification 0.95 Section 3.6
8535 + * QH: describes control/bulk/interrupt endpoints
8536 + * See Fig 3-7 "Queue Head Structure Layout".
8537 + *
8538 + * These appear in both the async and (for interrupt) periodic schedules.
8539 + */
8540 +
8541 +struct ehci_qh {
8542 + /* first part defined by EHCI spec */
8543 + __le32 hw_next; /* see EHCI 3.6.1 */
8544 + __le32 hw_info1; /* see EHCI 3.6.2 */
8545 +#define QH_HEAD 0x00008000
8546 + __le32 hw_info2; /* see EHCI 3.6.2 */
8547 +#define QH_SMASK 0x000000ff
8548 +#define QH_CMASK 0x0000ff00
8549 +#define QH_HUBADDR 0x007f0000
8550 +#define QH_HUBPORT 0x3f800000
8551 +#define QH_MULT 0xc0000000
8552 + __le32 hw_current; /* qtd list - see EHCI 3.6.4 */
8553 +
8554 + /* qtd overlay (hardware parts of a struct ehci_qtd) */
8555 + __le32 hw_qtd_next;
8556 + __le32 hw_alt_next;
8557 + __le32 hw_token;
8558 + __le32 hw_buf [5];
8559 + __le32 hw_buf_hi [5];
8560 +
8561 + /* the rest is HCD-private */
8562 + dma_addr_t qh_dma; /* address of qh */
8563 + union ehci_shadow qh_next; /* ptr to qh; or periodic */
8564 + struct list_head qtd_list; /* sw qtd list */
8565 + struct ehci_qtd *dummy;
8566 + struct ehci_qh *reclaim; /* next to reclaim */
8567 +
8568 + struct ehci_hcd *ehci;
8569 + struct kref kref;
8570 + unsigned stamp;
8571 +
8572 + u8 qh_state;
8573 +#define QH_STATE_LINKED 1 /* HC sees this */
8574 +#define QH_STATE_UNLINK 2 /* HC may still see this */
8575 +#define QH_STATE_IDLE 3 /* HC doesn't see this */
8576 +#define QH_STATE_UNLINK_WAIT 4 /* LINKED and on reclaim q */
8577 +#define QH_STATE_COMPLETING 5 /* don't touch token.HALT */
8578 +
8579 + /* periodic schedule info */
8580 + u8 usecs; /* intr bandwidth */
8581 + u8 gap_uf; /* uframes split/csplit gap */
8582 + u8 c_usecs; /* ... split completion bw */
8583 + u16 tt_usecs; /* tt downstream bandwidth */
8584 + unsigned short period; /* polling interval */
8585 + unsigned short start; /* where polling starts */
8586 +#define NO_FRAME ((unsigned short)~0) /* pick new start */
8587 + struct usb_device *dev; /* access to TT */
8588 +} __attribute__ ((aligned (32)));
8589 +
8590 +/*-------------------------------------------------------------------------*/
8591 +
8592 +/* description of one iso transaction (up to 3 KB data if highspeed) */
8593 +struct ehci_iso_packet {
8594 + /* These will be copied to iTD when scheduling */
8595 + u64 bufp; /* itd->hw_bufp{,_hi}[pg] |= */
8596 + __le32 transaction; /* itd->hw_transaction[i] |= */
8597 + u8 cross; /* buf crosses pages */
8598 + /* for full speed OUT splits */
8599 + u32 buf1;
8600 +};
8601 +
8602 +/* temporary schedule data for packets from iso urbs (both speeds)
8603 + * each packet is one logical usb transaction to the device (not TT),
8604 + * beginning at stream->next_uframe
8605 + */
8606 +struct ehci_iso_sched {
8607 + struct list_head td_list;
8608 + unsigned span;
8609 + struct ehci_iso_packet packet [0];
8610 +};
8611 +
8612 +/*
8613 + * ehci_iso_stream - groups all (s)itds for this endpoint.
8614 + * acts like a qh would, if EHCI had them for ISO.
8615 + */
8616 +struct ehci_iso_stream {
8617 + /* first two fields match QH, but info1 == 0 */
8618 + __le32 hw_next;
8619 + __le32 hw_info1;
8620 +
8621 + u32 refcount;
8622 + u8 bEndpointAddress;
8623 + u8 highspeed;
8624 + u16 depth; /* depth in uframes */
8625 + struct list_head td_list; /* queued itds/sitds */
8626 + struct list_head free_list; /* list of unused itds/sitds */
8627 + struct usb_device *udev;
8628 + struct usb_host_endpoint *ep;
8629 +
8630 + /* output of (re)scheduling */
8631 + unsigned long start; /* jiffies */
8632 + unsigned long rescheduled;
8633 + int next_uframe;
8634 + __le32 splits;
8635 +
8636 + /* the rest is derived from the endpoint descriptor,
8637 + * trusting urb->interval == f(epdesc->bInterval) and
8638 + * including the extra info for hw_bufp[0..2]
8639 + */
8640 + u8 interval;
8641 + u8 usecs, c_usecs;
8642 + u16 tt_usecs;
8643 + u16 maxp;
8644 + u16 raw_mask;
8645 + unsigned bandwidth;
8646 +
8647 + /* This is used to initialize iTD's hw_bufp fields */
8648 + __le32 buf0;
8649 + __le32 buf1;
8650 + __le32 buf2;
8651 +
8652 + /* this is used to initialize sITD's tt info */
8653 + __le32 address;
8654 +};
8655 +
8656 +/*-------------------------------------------------------------------------*/
8657 +
8658 +/*
8659 + * EHCI Specification 0.95 Section 3.3
8660 + * Fig 3-4 "Isochronous Transaction Descriptor (iTD)"
8661 + *
8662 + * Schedule records for high speed iso xfers
8663 + */
8664 +struct ehci_itd {
8665 + /* first part defined by EHCI spec */
8666 + __le32 hw_next; /* see EHCI 3.3.1 */
8667 + __le32 hw_transaction [8]; /* see EHCI 3.3.2 */
8668 +#define EHCI_ISOC_ACTIVE (1<<31) /* activate transfer this slot */
8669 +#define EHCI_ISOC_BUF_ERR (1<<30) /* Data buffer error */
8670 +#define EHCI_ISOC_BABBLE (1<<29) /* babble detected */
8671 +#define EHCI_ISOC_XACTERR (1<<28) /* XactErr - transaction error */
8672 +#define EHCI_ITD_LENGTH(tok) (((tok)>>16) & 0x0fff)
8673 +#define EHCI_ITD_IOC (1 << 15) /* interrupt on complete */
8674 +
8675 +#define ITD_ACTIVE __constant_cpu_to_le32(EHCI_ISOC_ACTIVE)
8676 +
8677 + __le32 hw_bufp [7]; /* see EHCI 3.3.3 */
8678 + __le32 hw_bufp_hi [7]; /* Appendix B */
8679 +
8680 + /* the rest is HCD-private */
8681 + dma_addr_t itd_dma; /* for this itd */
8682 + union ehci_shadow itd_next; /* ptr to periodic q entry */
8683 +
8684 + struct urb *urb;
8685 + struct ehci_iso_stream *stream; /* endpoint's queue */
8686 + struct list_head itd_list; /* list of stream's itds */
8687 +
8688 + /* any/all hw_transactions here may be used by that urb */
8689 + unsigned frame; /* where scheduled */
8690 + unsigned pg;
8691 + unsigned index[8]; /* in urb->iso_frame_desc */
8692 + u8 usecs[8];
8693 +} __attribute__ ((aligned (32)));
8694 +
8695 +/*-------------------------------------------------------------------------*/
8696 +
8697 +/*
8698 + * EHCI Specification 0.95 Section 3.4
8699 + * siTD, aka split-transaction isochronous Transfer Descriptor
8700 + * ... describe full speed iso xfers through TT in hubs
8701 + * see Figure 3-5 "Split-transaction Isochronous Transaction Descriptor (siTD)
8702 + */
8703 +struct ehci_sitd {
8704 + /* first part defined by EHCI spec */
8705 + __le32 hw_next;
8706 +/* uses bit field macros above - see EHCI 0.95 Table 3-8 */
8707 + __le32 hw_fullspeed_ep; /* EHCI table 3-9 */
8708 + __le32 hw_uframe; /* EHCI table 3-10 */
8709 + __le32 hw_results; /* EHCI table 3-11 */
8710 +#define SITD_IOC (1 << 31) /* interrupt on completion */
8711 +#define SITD_PAGE (1 << 30) /* buffer 0/1 */
8712 +#define SITD_LENGTH(x) (0x3ff & ((x)>>16))
8713 +#define SITD_STS_ACTIVE (1 << 7) /* HC may execute this */
8714 +#define SITD_STS_ERR (1 << 6) /* error from TT */
8715 +#define SITD_STS_DBE (1 << 5) /* data buffer error (in HC) */
8716 +#define SITD_STS_BABBLE (1 << 4) /* device was babbling */
8717 +#define SITD_STS_XACT (1 << 3) /* illegal IN response */
8718 +#define SITD_STS_MMF (1 << 2) /* incomplete split transaction */
8719 +#define SITD_STS_STS (1 << 1) /* split transaction state */
8720 +
8721 +#define SITD_ACTIVE __constant_cpu_to_le32(SITD_STS_ACTIVE)
8722 +
8723 + __le32 hw_buf [2]; /* EHCI table 3-12 */
8724 + __le32 hw_backpointer; /* EHCI table 3-13 */
8725 + __le32 hw_buf_hi [2]; /* Appendix B */
8726 +
8727 + /* the rest is HCD-private */
8728 + dma_addr_t sitd_dma;
8729 + union ehci_shadow sitd_next; /* ptr to periodic q entry */
8730 +
8731 + struct urb *urb;
8732 + struct ehci_iso_stream *stream; /* endpoint's queue */
8733 + struct list_head sitd_list; /* list of stream's sitds */
8734 + unsigned frame;
8735 + unsigned index;
8736 +} __attribute__ ((aligned (32)));
8737 +
8738 +/*-------------------------------------------------------------------------*/
8739 +
8740 +/*
8741 + * EHCI Specification 0.96 Section 3.7
8742 + * Periodic Frame Span Traversal Node (FSTN)
8743 + *
8744 + * Manages split interrupt transactions (using TT) that span frame boundaries
8745 + * into uframes 0/1; see 4.12.2.2. In those uframes, a "save place" FSTN
8746 + * makes the HC jump (back) to a QH to scan for fs/ls QH completions until
8747 + * it hits a "restore" FSTN; then it returns to finish other uframe 0/1 work.
8748 + */
8749 +struct ehci_fstn {
8750 + __le32 hw_next; /* any periodic q entry */
8751 + __le32 hw_prev; /* qh or EHCI_LIST_END */
8752 +
8753 + /* the rest is HCD-private */
8754 + dma_addr_t fstn_dma;
8755 + union ehci_shadow fstn_next; /* ptr to periodic q entry */
8756 +} __attribute__ ((aligned (32)));
8757 +
8758 +/*-------------------------------------------------------------------------*/
8759 +
8760 +#ifdef CONFIG_USB_EHCI_ROOT_HUB_TT
8761 +
8762 +/*
8763 + * Some EHCI controllers have a Transaction Translator built into the
8764 + * root hub. This is a non-standard feature. Each controller will need
8765 + * to add code to the following inline functions, and call them as
8766 + * needed (mostly in root hub code).
8767 + */
8768 +
8769 +#define ehci_is_TDI(e) ((e)->is_tdi_rh_tt)
8770 +
8771 +/* Returns the speed of a device attached to a port on the root hub. */
8772 +static inline unsigned int
8773 +ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc)
8774 +{
8775 + if (ehci_is_TDI(ehci)) {
8776 + switch ((portsc>>26)&3) {
8777 + case 0:
8778 + return 0;
8779 + case 1:
8780 + return (1<<USB_PORT_FEAT_LOWSPEED);
8781 + case 2:
8782 + default:
8783 + return (1<<USB_PORT_FEAT_HIGHSPEED);
8784 + }
8785 + }
8786 + return (1<<USB_PORT_FEAT_HIGHSPEED);
8787 +}
8788 +
8789 +#else
8790 +
8791 +#define ehci_is_TDI(e) (0)
8792 +
8793 +#define ehci_port_speed(ehci, portsc) (1<<USB_PORT_FEAT_HIGHSPEED)
8794 +#endif
8795 +
8796 +/*-------------------------------------------------------------------------*/
8797 +
8798 +#ifdef CONFIG_PPC_83xx
8799 +/* Some Freescale processors have an erratum in which the TT
8800 + * port number in the queue head was 0..N-1 instead of 1..N.
8801 + */
8802 +#define ehci_has_fsl_portno_bug(e) ((e)->has_fsl_port_bug)
8803 +#else
8804 +#define ehci_has_fsl_portno_bug(e) (0)
8805 +#endif
8806 +
8807 +/*
8808 + * While most USB host controllers implement their registers in
8809 + * little-endian format, a minority (celleb companion chip) implement
8810 + * them in big endian format.
8811 + *
8812 + * This attempts to support either format at compile time without a
8813 + * runtime penalty, or both formats with the additional overhead
8814 + * of checking a flag bit.
8815 + */
8816 +
8817 +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO
8818 +#define ehci_big_endian_mmio(e) ((e)->big_endian_mmio)
8819 +#else
8820 +#define ehci_big_endian_mmio(e) 0
8821 +#endif
8822 +
8823 +static inline unsigned int ehci_readl (const struct ehci_hcd *ehci,
8824 + __u32 __iomem * regs)
8825 +{
8826 +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO
8827 + return ehci_big_endian_mmio(ehci) ?
8828 + readl_be(regs) :
8829 + readl(regs);
8830 +#else
8831 + return readl(regs);
8832 +#endif
8833 +}
8834 +
8835 +static inline void ehci_writel (const struct ehci_hcd *ehci,
8836 + const unsigned int val, __u32 __iomem *regs)
8837 +{
8838 +#ifdef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO
8839 + ehci_big_endian_mmio(ehci) ?
8840 + writel_be(val, regs) :
8841 + writel(val, regs);
8842 +#else
8843 + writel(val, regs);
8844 +#endif
8845 +}
8846 +
8847 +/*-------------------------------------------------------------------------*/
8848 +
8849 +#ifndef DEBUG
8850 +#define STUB_DEBUG_FILES
8851 +#endif /* DEBUG */
8852 +
8853 +/*-------------------------------------------------------------------------*/
8854 +
8855 +#endif /* __LINUX_EHCI_HCD_H */
8856 diff -Nur linux-2.6.21.1/include/asm-mips/bootinfo.h linux-2.6.21.1-owrt/include/asm-mips/bootinfo.h
8857 --- linux-2.6.21.1/include/asm-mips/bootinfo.h 2007-04-27 23:49:26.000000000 +0200
8858 +++ linux-2.6.21.1-owrt/include/asm-mips/bootinfo.h 2007-05-23 23:34:01.000000000 +0200
8859 @@ -213,6 +213,17 @@
8860 #define MACH_GROUP_NEC_EMMA2RH 25 /* NEC EMMA2RH (was 23) */
8861 #define MACH_NEC_MARKEINS 0 /* NEC EMMA2RH Mark-eins */
8862
8863 +
8864 +/*
8865 + * Valid machtype for group ARUBA
8866 + */
8867 +#define MACH_GROUP_ARUBA 23
8868 +#define MACH_ARUBA_UNKNOWN 0
8869 +#define MACH_ARUBA_AP60 1
8870 +#define MACH_ARUBA_AP65 2
8871 +#define MACH_ARUBA_AP70 3
8872 +#define MACH_ARUBA_AP40 4
8873 +
8874 #define CL_SIZE COMMAND_LINE_SIZE
8875
8876 const char *get_system_type(void);
8877 diff -Nur linux-2.6.21.1/include/asm-mips/cpu.h linux-2.6.21.1-owrt/include/asm-mips/cpu.h
8878 --- linux-2.6.21.1/include/asm-mips/cpu.h 2007-04-27 23:49:26.000000000 +0200
8879 +++ linux-2.6.21.1-owrt/include/asm-mips/cpu.h 2007-05-23 23:34:01.000000000 +0200
8880 @@ -54,6 +54,9 @@
8881 #define PRID_IMP_R14000 0x0f00
8882 #define PRID_IMP_R8000 0x1000
8883 #define PRID_IMP_PR4450 0x1200
8884 +#define PRID_IMP_RC32334 0x1800
8885 +#define PRID_IMP_RC32355 0x1900
8886 +#define PRID_IMP_RC32365 0x1900
8887 #define PRID_IMP_R4600 0x2000
8888 #define PRID_IMP_R4700 0x2100
8889 #define PRID_IMP_TX39 0x2200
8890 @@ -200,7 +203,8 @@
8891 #define CPU_SB1A 62
8892 #define CPU_74K 63
8893 #define CPU_R14000 64
8894 -#define CPU_LAST 64
8895 +#define CPU_RC32300 65
8896 +#define CPU_LAST 65
8897
8898 /*
8899 * ISA Level encodings
8900 diff -Nur linux-2.6.21.1/include/asm-mips/mach-generic/irq.h linux-2.6.21.1-owrt/include/asm-mips/mach-generic/irq.h
8901 --- linux-2.6.21.1/include/asm-mips/mach-generic/irq.h 2007-04-27 23:49:26.000000000 +0200
8902 +++ linux-2.6.21.1-owrt/include/asm-mips/mach-generic/irq.h 2007-05-23 23:35:55.000000000 +0200
8903 @@ -9,7 +9,7 @@
8904 #define __ASM_MACH_GENERIC_IRQ_H
8905
8906 #ifndef NR_IRQS
8907 -#define NR_IRQS 128
8908 +#define NR_IRQS 256
8909 #endif
8910
8911 #ifdef CONFIG_I8259
8912 diff -Nur linux-2.6.21.1/include/linux/kernel.h linux-2.6.21.1-owrt/include/linux/kernel.h
8913 --- linux-2.6.21.1/include/linux/kernel.h 2007-04-27 23:49:26.000000000 +0200
8914 +++ linux-2.6.21.1-owrt/include/linux/kernel.h 2007-05-23 23:34:01.000000000 +0200
8915 @@ -334,6 +334,7 @@
8916 };
8917
8918 /* Force a compilation error if condition is true */
8919 +extern void BUILD_BUG(void);
8920 #define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)]))
8921
8922 /* Force a compilation error if condition is true, but also produce a
8923 diff -Nur linux-2.6.21.1/include/linux/kernel.h.orig linux-2.6.21.1-owrt/include/linux/kernel.h.orig
8924 --- linux-2.6.21.1/include/linux/kernel.h.orig 1970-01-01 01:00:00.000000000 +0100
8925 +++ linux-2.6.21.1-owrt/include/linux/kernel.h.orig 2007-04-27 23:49:26.000000000 +0200
8926 @@ -0,0 +1,355 @@
8927 +#ifndef _LINUX_KERNEL_H
8928 +#define _LINUX_KERNEL_H
8929 +
8930 +/*
8931 + * 'kernel.h' contains some often-used function prototypes etc
8932 + */
8933 +
8934 +#ifdef __KERNEL__
8935 +
8936 +#include <stdarg.h>
8937 +#include <linux/linkage.h>
8938 +#include <linux/stddef.h>
8939 +#include <linux/types.h>
8940 +#include <linux/compiler.h>
8941 +#include <linux/bitops.h>
8942 +#include <linux/log2.h>
8943 +#include <asm/byteorder.h>
8944 +#include <asm/bug.h>
8945 +
8946 +extern const char linux_banner[];
8947 +extern const char linux_proc_banner[];
8948 +
8949 +#define INT_MAX ((int)(~0U>>1))
8950 +#define INT_MIN (-INT_MAX - 1)
8951 +#define UINT_MAX (~0U)
8952 +#define LONG_MAX ((long)(~0UL>>1))
8953 +#define LONG_MIN (-LONG_MAX - 1)
8954 +#define ULONG_MAX (~0UL)
8955 +#define LLONG_MAX ((long long)(~0ULL>>1))
8956 +#define LLONG_MIN (-LLONG_MAX - 1)
8957 +#define ULLONG_MAX (~0ULL)
8958 +
8959 +#define STACK_MAGIC 0xdeadbeef
8960 +
8961 +#define ALIGN(x,a) __ALIGN_MASK(x,(typeof(x))(a)-1)
8962 +#define __ALIGN_MASK(x,mask) (((x)+(mask))&~(mask))
8963 +
8964 +#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
8965 +#define FIELD_SIZEOF(t, f) (sizeof(((t*)0)->f))
8966 +#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
8967 +#define roundup(x, y) ((((x) + ((y) - 1)) / (y)) * (y))
8968 +
8969 +#define KERN_EMERG "<0>" /* system is unusable */
8970 +#define KERN_ALERT "<1>" /* action must be taken immediately */
8971 +#define KERN_CRIT "<2>" /* critical conditions */
8972 +#define KERN_ERR "<3>" /* error conditions */
8973 +#define KERN_WARNING "<4>" /* warning conditions */
8974 +#define KERN_NOTICE "<5>" /* normal but significant condition */
8975 +#define KERN_INFO "<6>" /* informational */
8976 +#define KERN_DEBUG "<7>" /* debug-level messages */
8977 +
8978 +extern int console_printk[];
8979 +
8980 +#define console_loglevel (console_printk[0])
8981 +#define default_message_loglevel (console_printk[1])
8982 +#define minimum_console_loglevel (console_printk[2])
8983 +#define default_console_loglevel (console_printk[3])
8984 +
8985 +struct completion;
8986 +struct pt_regs;
8987 +struct user;
8988 +
8989 +/**
8990 + * might_sleep - annotation for functions that can sleep
8991 + *
8992 + * this macro will print a stack trace if it is executed in an atomic
8993 + * context (spinlock, irq-handler, ...).
8994 + *
8995 + * This is a useful debugging help to be able to catch problems early and not
8996 + * be bitten later when the calling function happens to sleep when it is not
8997 + * supposed to.
8998 + */
8999 +#ifdef CONFIG_PREEMPT_VOLUNTARY
9000 +extern int cond_resched(void);
9001 +# define might_resched() cond_resched()
9002 +#else
9003 +# define might_resched() do { } while (0)
9004 +#endif
9005 +
9006 +#ifdef CONFIG_DEBUG_SPINLOCK_SLEEP
9007 + void __might_sleep(char *file, int line);
9008 +# define might_sleep() \
9009 + do { __might_sleep(__FILE__, __LINE__); might_resched(); } while (0)
9010 +#else
9011 +# define might_sleep() do { might_resched(); } while (0)
9012 +#endif
9013 +
9014 +#define might_sleep_if(cond) do { if (cond) might_sleep(); } while (0)
9015 +
9016 +#define abs(x) ({ \
9017 + int __x = (x); \
9018 + (__x < 0) ? -__x : __x; \
9019 + })
9020 +
9021 +extern struct atomic_notifier_head panic_notifier_list;
9022 +extern long (*panic_blink)(long time);
9023 +NORET_TYPE void panic(const char * fmt, ...)
9024 + __attribute__ ((NORET_AND format (printf, 1, 2)));
9025 +extern void oops_enter(void);
9026 +extern void oops_exit(void);
9027 +extern int oops_may_print(void);
9028 +fastcall NORET_TYPE void do_exit(long error_code)
9029 + ATTRIB_NORET;
9030 +NORET_TYPE void complete_and_exit(struct completion *, long)
9031 + ATTRIB_NORET;
9032 +extern unsigned long simple_strtoul(const char *,char **,unsigned int);
9033 +extern long simple_strtol(const char *,char **,unsigned int);
9034 +extern unsigned long long simple_strtoull(const char *,char **,unsigned int);
9035 +extern long long simple_strtoll(const char *,char **,unsigned int);
9036 +extern int sprintf(char * buf, const char * fmt, ...)
9037 + __attribute__ ((format (printf, 2, 3)));
9038 +extern int vsprintf(char *buf, const char *, va_list)
9039 + __attribute__ ((format (printf, 2, 0)));
9040 +extern int snprintf(char * buf, size_t size, const char * fmt, ...)
9041 + __attribute__ ((format (printf, 3, 4)));
9042 +extern int vsnprintf(char *buf, size_t size, const char *fmt, va_list args)
9043 + __attribute__ ((format (printf, 3, 0)));
9044 +extern int scnprintf(char * buf, size_t size, const char * fmt, ...)
9045 + __attribute__ ((format (printf, 3, 4)));
9046 +extern int vscnprintf(char *buf, size_t size, const char *fmt, va_list args)
9047 + __attribute__ ((format (printf, 3, 0)));
9048 +extern char *kasprintf(gfp_t gfp, const char *fmt, ...)
9049 + __attribute__ ((format (printf, 2, 3)));
9050 +
9051 +extern int sscanf(const char *, const char *, ...)
9052 + __attribute__ ((format (scanf, 2, 3)));
9053 +extern int vsscanf(const char *, const char *, va_list)
9054 + __attribute__ ((format (scanf, 2, 0)));
9055 +
9056 +extern int get_option(char **str, int *pint);
9057 +extern char *get_options(const char *str, int nints, int *ints);
9058 +extern unsigned long long memparse(char *ptr, char **retptr);
9059 +
9060 +extern int core_kernel_text(unsigned long addr);
9061 +extern int __kernel_text_address(unsigned long addr);
9062 +extern int kernel_text_address(unsigned long addr);
9063 +struct pid;
9064 +extern struct pid *session_of_pgrp(struct pid *pgrp);
9065 +
9066 +extern void dump_thread(struct pt_regs *regs, struct user *dump);
9067 +
9068 +#ifdef CONFIG_PRINTK
9069 +asmlinkage int vprintk(const char *fmt, va_list args)
9070 + __attribute__ ((format (printf, 1, 0)));
9071 +asmlinkage int printk(const char * fmt, ...)
9072 + __attribute__ ((format (printf, 1, 2)));
9073 +#else
9074 +static inline int vprintk(const char *s, va_list args)
9075 + __attribute__ ((format (printf, 1, 0)));
9076 +static inline int vprintk(const char *s, va_list args) { return 0; }
9077 +static inline int printk(const char *s, ...)
9078 + __attribute__ ((format (printf, 1, 2)));
9079 +static inline int printk(const char *s, ...) { return 0; }
9080 +#endif
9081 +
9082 +unsigned long int_sqrt(unsigned long);
9083 +
9084 +extern int printk_ratelimit(void);
9085 +extern int __printk_ratelimit(int ratelimit_jiffies, int ratelimit_burst);
9086 +extern bool printk_timed_ratelimit(unsigned long *caller_jiffies,
9087 + unsigned int interval_msec);
9088 +
9089 +static inline void console_silent(void)
9090 +{
9091 + console_loglevel = 0;
9092 +}
9093 +
9094 +static inline void console_verbose(void)
9095 +{
9096 + if (console_loglevel)
9097 + console_loglevel = 15;
9098 +}
9099 +
9100 +extern void bust_spinlocks(int yes);
9101 +extern void wake_up_klogd(void);
9102 +extern int oops_in_progress; /* If set, an oops, panic(), BUG() or die() is in progress */
9103 +extern int panic_timeout;
9104 +extern int panic_on_oops;
9105 +extern int panic_on_unrecovered_nmi;
9106 +extern int tainted;
9107 +extern const char *print_tainted(void);
9108 +extern void add_taint(unsigned);
9109 +
9110 +/* Values used for system_state */
9111 +extern enum system_states {
9112 + SYSTEM_BOOTING,
9113 + SYSTEM_RUNNING,
9114 + SYSTEM_HALT,
9115 + SYSTEM_POWER_OFF,
9116 + SYSTEM_RESTART,
9117 + SYSTEM_SUSPEND_DISK,
9118 +} system_state;
9119 +
9120 +#define TAINT_PROPRIETARY_MODULE (1<<0)
9121 +#define TAINT_FORCED_MODULE (1<<1)
9122 +#define TAINT_UNSAFE_SMP (1<<2)
9123 +#define TAINT_FORCED_RMMOD (1<<3)
9124 +#define TAINT_MACHINE_CHECK (1<<4)
9125 +#define TAINT_BAD_PAGE (1<<5)
9126 +#define TAINT_USER (1<<6)
9127 +
9128 +extern void dump_stack(void);
9129 +
9130 +#ifdef DEBUG
9131 +/* If you are writing a driver, please use dev_dbg instead */
9132 +#define pr_debug(fmt,arg...) \
9133 + printk(KERN_DEBUG fmt,##arg)
9134 +#else
9135 +static inline int __attribute__ ((format (printf, 1, 2))) pr_debug(const char * fmt, ...)
9136 +{
9137 + return 0;
9138 +}
9139 +#endif
9140 +
9141 +#define pr_info(fmt,arg...) \
9142 + printk(KERN_INFO fmt,##arg)
9143 +
9144 +/*
9145 + * Display an IP address in readable format.
9146 + */
9147 +
9148 +#define NIPQUAD(addr) \
9149 + ((unsigned char *)&addr)[0], \
9150 + ((unsigned char *)&addr)[1], \
9151 + ((unsigned char *)&addr)[2], \
9152 + ((unsigned char *)&addr)[3]
9153 +#define NIPQUAD_FMT "%u.%u.%u.%u"
9154 +
9155 +#define NIP6(addr) \
9156 + ntohs((addr).s6_addr16[0]), \
9157 + ntohs((addr).s6_addr16[1]), \
9158 + ntohs((addr).s6_addr16[2]), \
9159 + ntohs((addr).s6_addr16[3]), \
9160 + ntohs((addr).s6_addr16[4]), \
9161 + ntohs((addr).s6_addr16[5]), \
9162 + ntohs((addr).s6_addr16[6]), \
9163 + ntohs((addr).s6_addr16[7])
9164 +#define NIP6_FMT "%04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x"
9165 +#define NIP6_SEQFMT "%04x%04x%04x%04x%04x%04x%04x%04x"
9166 +
9167 +#if defined(__LITTLE_ENDIAN)
9168 +#define HIPQUAD(addr) \
9169 + ((unsigned char *)&addr)[3], \
9170 + ((unsigned char *)&addr)[2], \
9171 + ((unsigned char *)&addr)[1], \
9172 + ((unsigned char *)&addr)[0]
9173 +#elif defined(__BIG_ENDIAN)
9174 +#define HIPQUAD NIPQUAD
9175 +#else
9176 +#error "Please fix asm/byteorder.h"
9177 +#endif /* __LITTLE_ENDIAN */
9178 +
9179 +/*
9180 + * min()/max() macros that also do
9181 + * strict type-checking.. See the
9182 + * "unnecessary" pointer comparison.
9183 + */
9184 +#define min(x,y) ({ \
9185 + typeof(x) _x = (x); \
9186 + typeof(y) _y = (y); \
9187 + (void) (&_x == &_y); \
9188 + _x < _y ? _x : _y; })
9189 +
9190 +#define max(x,y) ({ \
9191 + typeof(x) _x = (x); \
9192 + typeof(y) _y = (y); \
9193 + (void) (&_x == &_y); \
9194 + _x > _y ? _x : _y; })
9195 +
9196 +/*
9197 + * ..and if you can't take the strict
9198 + * types, you can specify one yourself.
9199 + *
9200 + * Or not use min/max at all, of course.
9201 + */
9202 +#define min_t(type,x,y) \
9203 + ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
9204 +#define max_t(type,x,y) \
9205 + ({ type __x = (x); type __y = (y); __x > __y ? __x: __y; })
9206 +
9207 +
9208 +/**
9209 + * container_of - cast a member of a structure out to the containing structure
9210 + * @ptr: the pointer to the member.
9211 + * @type: the type of the container struct this is embedded in.
9212 + * @member: the name of the member within the struct.
9213 + *
9214 + */
9215 +#define container_of(ptr, type, member) ({ \
9216 + const typeof( ((type *)0)->member ) *__mptr = (ptr); \
9217 + (type *)( (char *)__mptr - offsetof(type,member) );})
9218 +
9219 +/*
9220 + * Check at compile time that something is of a particular type.
9221 + * Always evaluates to 1 so you may use it easily in comparisons.
9222 + */
9223 +#define typecheck(type,x) \
9224 +({ type __dummy; \
9225 + typeof(x) __dummy2; \
9226 + (void)(&__dummy == &__dummy2); \
9227 + 1; \
9228 +})
9229 +
9230 +/*
9231 + * Check at compile time that 'function' is a certain type, or is a pointer
9232 + * to that type (needs to use typedef for the function type.)
9233 + */
9234 +#define typecheck_fn(type,function) \
9235 +({ typeof(type) __tmp = function; \
9236 + (void)__tmp; \
9237 +})
9238 +
9239 +struct sysinfo;
9240 +extern int do_sysinfo(struct sysinfo *info);
9241 +
9242 +#endif /* __KERNEL__ */
9243 +
9244 +#define SI_LOAD_SHIFT 16
9245 +struct sysinfo {
9246 + long uptime; /* Seconds since boot */
9247 + unsigned long loads[3]; /* 1, 5, and 15 minute load averages */
9248 + unsigned long totalram; /* Total usable main memory size */
9249 + unsigned long freeram; /* Available memory size */
9250 + unsigned long sharedram; /* Amount of shared memory */
9251 + unsigned long bufferram; /* Memory used by buffers */
9252 + unsigned long totalswap; /* Total swap space size */
9253 + unsigned long freeswap; /* swap space still available */
9254 + unsigned short procs; /* Number of current processes */
9255 + unsigned short pad; /* explicit padding for m68k */
9256 + unsigned long totalhigh; /* Total high memory size */
9257 + unsigned long freehigh; /* Available high memory size */
9258 + unsigned int mem_unit; /* Memory unit size in bytes */
9259 + char _f[20-2*sizeof(long)-sizeof(int)]; /* Padding: libc5 uses this.. */
9260 +};
9261 +
9262 +/* Force a compilation error if condition is true */
9263 +#define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)]))
9264 +
9265 +/* Force a compilation error if condition is true, but also produce a
9266 + result (of value 0 and type size_t), so the expression can be used
9267 + e.g. in a structure initializer (or where-ever else comma expressions
9268 + aren't permitted). */
9269 +#define BUILD_BUG_ON_ZERO(e) (sizeof(char[1 - 2 * !!(e)]) - 1)
9270 +
9271 +/* Trap pasters of __FUNCTION__ at compile-time */
9272 +#define __FUNCTION__ (__func__)
9273 +
9274 +/* This helps us to avoid #ifdef CONFIG_NUMA */
9275 +#ifdef CONFIG_NUMA
9276 +#define NUMA_BUILD 1
9277 +#else
9278 +#define NUMA_BUILD 0
9279 +#endif
9280 +
9281 +#endif
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