target/linux/at91/patches-5.10/105-clk-at91-sama7g5-add-5th-divisor-for-mck0-layout-and.patch

   1 From c41f013e13962dcc78239d5e4834214d44556cfb Mon Sep 17 00:00:00 2001
   2 From: Eugen Hristev <eugen.hristev@microchip.com>
   3 Date: Thu, 19 Nov 2020 17:43:11 +0200
   4 Subject: [PATCH 105/247] clk: at91: sama7g5: add 5th divisor for mck0 layout
   5  and characteristics
   6
   7 This SoC has the 5th divisor for the mck0 master clock.
   8 Adapt the characteristics accordingly.
   9
  10 Reported-by: Mihai Sain <mihai.sain@microchip.com>
  11 Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
  12 Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
  13 Link: https://lore.kernel.org/r/1605800597-16720-6-git-send-email-claudiu.beznea@microchip.com
  14 Signed-off-by: Stephen Boyd <sboyd@kernel.org>
  15 ---
  16  drivers/clk/at91/sama7g5.c | 4 ++--
  17  1 file changed, 2 insertions(+), 2 deletions(-)
  18
  19 diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
  20 index d3c3469d47d9..d685e22b2014 100644
  21 --- a/drivers/clk/at91/sama7g5.c
  22 +++ b/drivers/clk/at91/sama7g5.c
  23 @@ -775,13 +775,13 @@ static const struct clk_pll_characteristics pll_characteristics = {
  24  /* MCK0 characteristics. */
  25  static const struct clk_master_characteristics mck0_characteristics = {
  26         .output = { .min = 140000000, .max = 200000000 },
  27 -       .divisors = { 1, 2, 4, 3 },
  28 +       .divisors = { 1, 2, 4, 3, 5 },
  29         .have_div3_pres = 1,
  30  };
  31
  32  /* MCK0 layout. */
  33  static const struct clk_master_layout mck0_layout = {
  34 -       .mask = 0x373,
  35 +       .mask = 0x773,
  36         .pres_shift = 4,
  37         .offset = 0x28,
  38  };
  39 --
  40 2.32.0
  41