target/linux/at91/patches-5.10/174-media-atmel-atmel-isc-extend-pipeline-with-extra-mod.patch

   1 From 58a6cc3c7eecd16208cd16b92b4eaf8385e69696 Mon Sep 17 00:00:00 2001
   2 From: Eugen Hristev <eugen.hristev@microchip.com>
   3 Date: Tue, 13 Apr 2021 12:57:16 +0200
   4 Subject: [PATCH 174/247] media: atmel: atmel-isc: extend pipeline with extra
   5  modules
   6
   7 Newer ISC pipelines have the additional modules of
   8 Defective Pixel Correction -> DPC itself,
   9 Defective Pixel Correction -> Green Disparity Correction (DPC_GDC)
  10 Defective Pixel Correction -> Black Level Correction (DPC_BLC)
  11 Vertical and Horizontal Scaler -> VHXS
  12
  13 Some products have this full pipeline (sama7g5), other products do not (sama5d2)
  14
  15 Add the modules to the isc base, and also extend the register range to include
  16 the modules.
  17
  18 Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
  19 Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
  20 Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
  21 ---
  22  drivers/media/platform/atmel/atmel-isc-base.c | 11 ++++++--
  23  drivers/media/platform/atmel/atmel-isc.h      | 28 +++++++++++--------
  24  2 files changed, 25 insertions(+), 14 deletions(-)
  25
  26 diff --git a/drivers/media/platform/atmel/atmel-isc-base.c b/drivers/media/platform/atmel/atmel-isc-base.c
  27 index cfe60b2882ac..a6b62e009c38 100644
  28 --- a/drivers/media/platform/atmel/atmel-isc-base.c
  29 +++ b/drivers/media/platform/atmel/atmel-isc-base.c
  30 @@ -2324,8 +2324,14 @@ int isc_pipeline_init(struct isc_device *isc)
  31         struct regmap_field *regs;
  32         unsigned int i;
  33
  34 -       /* WB-->CFA-->CC-->GAM-->CSC-->CBC-->SUB422-->SUB420 */
  35 +       /*
  36 +        * DPCEN-->GDCEN-->BLCEN-->WB-->CFA-->CC-->
  37 +        * GAM-->VHXS-->CSC-->CBC-->SUB422-->SUB420
  38 +        */
  39         const struct reg_field regfields[ISC_PIPE_LINE_NODE_NUM] = {
  40 +               REG_FIELD(ISC_DPC_CTRL, 0, 0),
  41 +               REG_FIELD(ISC_DPC_CTRL, 1, 1),
  42 +               REG_FIELD(ISC_DPC_CTRL, 2, 2),
  43                 REG_FIELD(ISC_WB_CTRL, 0, 0),
  44                 REG_FIELD(ISC_CFA_CTRL, 0, 0),
  45                 REG_FIELD(ISC_CC_CTRL, 0, 0),
  46 @@ -2333,6 +2339,7 @@ int isc_pipeline_init(struct isc_device *isc)
  47                 REG_FIELD(ISC_GAM_CTRL, 1, 1),
  48                 REG_FIELD(ISC_GAM_CTRL, 2, 2),
  49                 REG_FIELD(ISC_GAM_CTRL, 3, 3),
  50 +               REG_FIELD(ISC_VHXS_CTRL, 0, 0),
  51                 REG_FIELD(ISC_CSC_CTRL + isc->offsets.csc, 0, 0),
  52                 REG_FIELD(ISC_CBC_CTRL + isc->offsets.cbc, 0, 0),
  53                 REG_FIELD(ISC_SUB422_CTRL + isc->offsets.sub422, 0, 0),
  54 @@ -2351,7 +2358,7 @@ int isc_pipeline_init(struct isc_device *isc)
  55  }
  56
  57  /* regmap configuration */
  58 -#define ATMEL_ISC_REG_MAX    0xbfc
  59 +#define ATMEL_ISC_REG_MAX    0xd5c
  60  const struct regmap_config isc_regmap_config = {
  61         .reg_bits       = 32,
  62         .reg_stride     = 4,
  63 diff --git a/drivers/media/platform/atmel/atmel-isc.h b/drivers/media/platform/atmel/atmel-isc.h
  64 index 513b2b920b1f..86edeea2d5cd 100644
  65 --- a/drivers/media/platform/atmel/atmel-isc.h
  66 +++ b/drivers/media/platform/atmel/atmel-isc.h
  67 @@ -67,17 +67,21 @@ struct isc_format {
  68  };
  69
  70  /* Pipeline bitmap */
  71 -#define WB_ENABLE      BIT(0)
  72 -#define CFA_ENABLE     BIT(1)
  73 -#define CC_ENABLE      BIT(2)
  74 -#define GAM_ENABLE     BIT(3)
  75 -#define GAM_BENABLE    BIT(4)
  76 -#define GAM_GENABLE    BIT(5)
  77 -#define GAM_RENABLE    BIT(6)
  78 -#define CSC_ENABLE     BIT(7)
  79 -#define CBC_ENABLE     BIT(8)
  80 -#define SUB422_ENABLE  BIT(9)
  81 -#define SUB420_ENABLE  BIT(10)
  82 +#define DPC_DPCENABLE  BIT(0)
  83 +#define DPC_GDCENABLE  BIT(1)
  84 +#define DPC_BLCENABLE  BIT(2)
  85 +#define WB_ENABLE      BIT(3)
  86 +#define CFA_ENABLE     BIT(4)
  87 +#define CC_ENABLE      BIT(5)
  88 +#define GAM_ENABLE     BIT(6)
  89 +#define GAM_BENABLE    BIT(7)
  90 +#define GAM_GENABLE    BIT(8)
  91 +#define GAM_RENABLE    BIT(9)
  92 +#define VHXS_ENABLE    BIT(10)
  93 +#define CSC_ENABLE     BIT(11)
  94 +#define CBC_ENABLE     BIT(12)
  95 +#define SUB422_ENABLE  BIT(13)
  96 +#define SUB420_ENABLE  BIT(14)
  97
  98  #define GAM_ENABLES    (GAM_RENABLE | GAM_GENABLE | GAM_BENABLE | GAM_ENABLE)
  99
 100 @@ -141,7 +145,7 @@ struct isc_ctrls {
 101         u32 hist_minmax[HIST_BAYER][2];
 102  };
 103
 104 -#define ISC_PIPE_LINE_NODE_NUM 11
 105 +#define ISC_PIPE_LINE_NODE_NUM 15
 106
 107  /*
 108   * struct isc_reg_offsets - ISC device register offsets
 109 --
 110 2.32.0
 111