target/linux/at91/patches-5.10/213-ARM-at91-pm-add-sama7g5-ddr-phy-controller.patch

   1 From bbbbf16c44f34a2d563fa7d71de64ffe3b4b82dc Mon Sep 17 00:00:00 2001
   2 From: Claudiu Beznea <claudiu.beznea@microchip.com>
   3 Date: Thu, 15 Apr 2021 13:50:04 +0300
   4 Subject: [PATCH 213/247] ARM: at91: pm: add sama7g5 ddr phy controller
   5
   6 SAMA7G5 self-refresh procedure accesses also the DDR PHY registers.
   7 Adapt the code so that the at91_dt_ramc() to look also for DDR PHYs,
   8 in case it is mandatory.
   9
  10 Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
  11 Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
  12 Link: https://lore.kernel.org/r/20210415105010.569620-19-claudiu.beznea@microchip.com
  13 ---
  14  arch/arm/mach-at91/pm.c | 27 +++++++++++++++++++++------
  15  1 file changed, 21 insertions(+), 6 deletions(-)
  16
  17 diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
  18 index 622d68724c3f..b047a1f2ddfb 100644
  19 --- a/arch/arm/mach-at91/pm.c
  20 +++ b/arch/arm/mach-at91/pm.c
  21 @@ -552,7 +552,12 @@ static const struct of_device_id ramc_ids[] __initconst = {
  22         { /*sentinel*/ }
  23  };
  24
  25 -static __init int at91_dt_ramc(void)
  26 +static const struct of_device_id ramc_phy_ids[] __initconst = {
  27 +       { .compatible = "microchip,sama7g5-ddr3phy", },
  28 +       { /* Sentinel. */ },
  29 +};
  30 +
  31 +static __init void at91_dt_ramc(bool phy_mandatory)
  32  {
  33         struct device_node *np;
  34         const struct of_device_id *of_id;
  35 @@ -585,6 +590,16 @@ static __init int at91_dt_ramc(void)
  36                 goto unmap_ramc;
  37         }
  38
  39 +       /* Lookup for DDR PHY node, if any. */
  40 +       for_each_matching_node_and_match(np, ramc_phy_ids, &of_id) {
  41 +               soc_pm.data.ramc_phy = of_iomap(np, 0);
  42 +               if (!soc_pm.data.ramc_phy)
  43 +                       panic(pr_fmt("unable to map ramc phy cpu registers\n"));
  44 +       }
  45 +
  46 +       if (phy_mandatory && !soc_pm.data.ramc_phy)
  47 +               panic(pr_fmt("DDR PHY is mandatory!\n"));
  48 +
  49         if (!standby) {
  50                 pr_warn("ramc no standby function available\n");
  51                 return 0;
  52 @@ -953,7 +968,7 @@ void __init at91rm9200_pm_init(void)
  53         soc_pm.data.standby_mode = AT91_PM_STANDBY;
  54         soc_pm.data.suspend_mode = AT91_PM_ULP0;
  55
  56 -       ret = at91_dt_ramc();
  57 +       ret = at91_dt_ramc(false);
  58         if (ret)
  59                 return;
  60
  61 @@ -980,7 +995,7 @@ void __init sam9x60_pm_init(void)
  62
  63         at91_pm_modes_validate(modes, ARRAY_SIZE(modes));
  64         at91_pm_modes_init(iomaps, ARRAY_SIZE(iomaps));
  65 -       ret = at91_dt_ramc();
  66 +       ret = at91_dt_ramc(false);
  67         if (ret)
  68                 return;
  69
  70 @@ -1005,7 +1020,7 @@ void __init at91sam9_pm_init(void)
  71         soc_pm.data.standby_mode = AT91_PM_STANDBY;
  72         soc_pm.data.suspend_mode = AT91_PM_ULP0;
  73
  74 -       ret = at91_dt_ramc();
  75 +       ret = at91_dt_ramc(false);
  76         if (ret)
  77                 return;
  78
  79 @@ -1023,7 +1038,7 @@ void __init sama5_pm_init(void)
  80                 return;
  81
  82         at91_pm_modes_validate(modes, ARRAY_SIZE(modes));
  83 -       ret = at91_dt_ramc();
  84 +       ret = at91_dt_ramc(false);
  85         if (ret)
  86                 return;
  87
  88 @@ -1048,7 +1063,7 @@ void __init sama5d2_pm_init(void)
  89
  90         at91_pm_modes_validate(modes, ARRAY_SIZE(modes));
  91         at91_pm_modes_init(iomaps, ARRAY_SIZE(iomaps));
  92 -       ret = at91_dt_ramc();
  93 +       ret = at91_dt_ramc(false);
  94         if (ret)
  95                 return;
  96
  97 --
  98 2.32.0
  99