target/linux/at91/patches-5.15/131-pinctrl-at91-pio4-add-support-for-fewer-lines-on-las.patch

   1 From 7cb1dad7a7dfe4cfe55ebe86930dd6aef0de66b4 Mon Sep 17 00:00:00 2001
   2 From: Eugen Hristev <eugen.hristev@microchip.com>
   3 Date: Fri, 13 Nov 2020 15:24:29 +0200
   4 Subject: [PATCH 131/247] pinctrl: at91-pio4: add support for fewer lines on
   5  last PIO bank
   6
   7 Some products, like sama7g5, do not have a full last bank of PIO lines.
   8 In this case for example, sama7g5 only has 8 lines for the PE bank.
   9 PA0-31, PB0-31, PC0-31, PD0-31, PE0-7, in total 136 lines.
  10 To cope with this situation, added a data attribute that is product dependent,
  11 to specify the number of lines of the last bank.
  12 In case this number is different from the macro ATMEL_PIO_NPINS_PER_BANK,
  13 adjust the total number of lines accordingly.
  14 This will avoid advertising 160 lines instead of the actual 136, as this
  15 product supports, and to avoid reading/writing to invalid register addresses.
  16
  17 Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
  18 Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
  19 Link: https://lore.kernel.org/r/20201113132429.420940-1-eugen.hristev@microchip.com
  20 Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
  21 ---
  22  drivers/pinctrl/pinctrl-at91-pio4.c | 18 ++++++++++++++++--
  23  1 file changed, 16 insertions(+), 2 deletions(-)
  24
  25 --- a/drivers/pinctrl/pinctrl-at91-pio4.c
  26 +++ b/drivers/pinctrl/pinctrl-at91-pio4.c
  27 @@ -71,8 +71,15 @@
  28  /* Custom pinconf parameters */
  29  #define ATMEL_PIN_CONFIG_DRIVE_STRENGTH        (PIN_CONFIG_END + 1)
  30
  31 +/**
  32 + * struct atmel_pioctrl_data - Atmel PIO controller (pinmux + gpio) data struct
  33 + * @nbanks: number of PIO banks
  34 + * @last_bank_count: number of lines in the last bank (can be less than
  35 + *     the rest of the banks).
  36 + */
  37  struct atmel_pioctrl_data {
  38         unsigned nbanks;
  39 +       unsigned last_bank_count;
  40  };
  41
  42  struct atmel_group {
  43 @@ -980,11 +987,13 @@ static const struct dev_pm_ops atmel_pct
  44   * We can have up to 16 banks.
  45   */
  46  static const struct atmel_pioctrl_data atmel_sama5d2_pioctrl_data = {
  47 -       .nbanks         = 4,
  48 +       .nbanks                 = 4,
  49 +       .last_bank_count        = ATMEL_PIO_NPINS_PER_BANK,
  50  };
  51
  52  static const struct atmel_pioctrl_data microchip_sama7g5_pioctrl_data = {
  53 -       .nbanks         = 5,
  54 +       .nbanks                 = 5,
  55 +       .last_bank_count        = 8, /* sama7g5 has only PE0 to PE7 */
  56  };
  57
  58  static const struct of_device_id atmel_pctrl_of_match[] = {
  59 @@ -1025,6 +1034,11 @@ static int atmel_pinctrl_probe(struct pl
  60         atmel_pioctrl_data = match->data;
  61         atmel_pioctrl->nbanks = atmel_pioctrl_data->nbanks;
  62         atmel_pioctrl->npins = atmel_pioctrl->nbanks * ATMEL_PIO_NPINS_PER_BANK;
  63 +       /* if last bank has limited number of pins, adjust accordingly */
  64 +       if (atmel_pioctrl_data->last_bank_count != ATMEL_PIO_NPINS_PER_BANK) {
  65 +               atmel_pioctrl->npins -= ATMEL_PIO_NPINS_PER_BANK;
  66 +               atmel_pioctrl->npins += atmel_pioctrl_data->last_bank_count;
  67 +       }
  68
  69         atmel_pioctrl->reg_base = devm_platform_ioremap_resource(pdev, 0);
  70         if (IS_ERR(atmel_pioctrl->reg_base))