1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
10 compatible = "dlink,dir-825-b1", "qca,ar7161";
11 model = "D-Link DIR825B1";
14 led-boot = &led_power_orange;
15 led-failsafe = &led_power_orange;
16 led-running = &led_power_blue;
17 led-upgrade = &led_power_orange;
21 compatible = "fixed-clock";
23 clock-output-names = "ref";
24 clock-frequency = <40000000>;
28 compatible = "gpio-leds";
31 label = "d-link:blue:usb";
32 gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
33 trigger-sources = <&usb_ohci_port>, <&usb_ehci_port>;
34 linux,default-trigger = "usbport";
37 led_power_orange: power_orange {
38 label = "d-link:orange:power";
39 gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
43 led_power_blue: power_blue {
44 label = "d-link:blue:power";
45 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
49 label = "d-link:blue:wps";
50 gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
54 label = "d-link:orange:planet";
55 gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
59 label = "d-link:blue:planet";
60 gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
65 compatible = "gpio-leds";
68 label = "d-link:blue:wlan2g";
69 gpios = <&ath9k0 5 GPIO_ACTIVE_LOW>;
70 linux,default-trigger = "phy0tpt";
74 label = "d-link:blue:wlan5g";
75 gpios = <&ath9k1 5 GPIO_ACTIVE_LOW>;
76 linux,default-trigger = "phy1tpt";
81 compatible = "gpio-keys";
85 linux,code = <KEY_RESTART>;
86 gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
91 linux,code = <KEY_WPS_BUTTON>;
92 gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
97 compatible = "realtek,rtl8366s";
98 gpio-sda = <&gpio 5 GPIO_ACTIVE_HIGH>;
99 gpio-sck = <&gpio 7 GPIO_ACTIVE_HIGH>;
100 realtek,initvals = <0x06 0x0108>;
103 #address-cells = <1>;
109 phy4: ethernet-phy@4 {
118 #address-cells = <1>;
122 usb_ohci_port: port@1 {
124 #trigger-source-cells = <0>;
129 #address-cells = <1>;
133 usb_ehci_port: port@1 {
135 #trigger-source-cells = <0>;
147 compatible = "pci168c,0029";
148 reg = <0x8800 0 0 0 0>;
155 compatible = "pci168c,0029";
156 reg = <0x9000 0 0 0 0>;
177 compatible = "jedec,spi-nor";
179 spi-max-frequency = <25000000>;
182 compatible = "fixed-partitions";
183 #address-cells = <1>;
188 reg = <0x000000 0x040000>;
194 reg = <0x040000 0x010000>;
199 compatible = "denx,uimage";
201 reg = <0x050000 0x610000>;
204 caldata: partition@60000 {
206 reg = <0x660000 0x010000>;
212 reg = <0x670000 0x190000>;
222 pll-data = <0x11110000 0x00001099 0x00991099>;
233 pll-data = <0x11110000 0x00001099 0x00991099>;
235 phy-handle = <&phy4>;