fb5ab1adcb784a72ffed1ba5b67b85b5717083c7
[openwrt/staging/ldir.git] / target / linux / ath79 / dts / ar7161_dlink_dir-825-b1.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "ar7100.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "dlink,dir-825-b1", "qca,ar7161";
10 model = "D-Link DIR825B1";
11
12 aliases {
13 led-boot = &led_power_orange;
14 led-failsafe = &led_power_orange;
15 led-running = &led_power_blue;
16 led-upgrade = &led_power_orange;
17 };
18
19 leds {
20 compatible = "gpio-leds";
21
22 usb {
23 label = "blue:usb";
24 gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
25 trigger-sources = <&usb_ohci_port>, <&usb_ehci_port>;
26 linux,default-trigger = "usbport";
27 };
28
29 led_power_orange: power_orange {
30 label = "orange:power";
31 gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
32 default-state = "on";
33 };
34
35 led_power_blue: power_blue {
36 label = "blue:power";
37 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
38 };
39
40 wps {
41 label = "blue:wps";
42 gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
43 };
44
45 planet_orange {
46 label = "orange:planet";
47 gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
48 };
49
50 planet_blue {
51 label = "blue:planet";
52 gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
53 };
54 };
55
56 ath9k-leds {
57 compatible = "gpio-leds";
58
59 wlan2g {
60 label = "blue:wlan2g";
61 gpios = <&ath9k0 5 GPIO_ACTIVE_LOW>;
62 linux,default-trigger = "phy0tpt";
63 };
64
65 wlan5g {
66 label = "blue:wlan5g";
67 gpios = <&ath9k1 5 GPIO_ACTIVE_LOW>;
68 linux,default-trigger = "phy1tpt";
69 };
70 };
71
72 keys {
73 compatible = "gpio-keys";
74
75 reset {
76 label = "reset";
77 linux,code = <KEY_RESTART>;
78 gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
79 };
80
81 wps {
82 label = "wps";
83 linux,code = <KEY_WPS_BUTTON>;
84 gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
85 };
86 };
87
88 rtl8366s {
89 compatible = "realtek,rtl8366s";
90 gpio-sda = <&gpio 5 GPIO_ACTIVE_HIGH>;
91 gpio-sck = <&gpio 7 GPIO_ACTIVE_HIGH>;
92 realtek,initvals = <0x06 0x0108>;
93
94 mdio-bus {
95 #address-cells = <1>;
96 #size-cells = <0>;
97 status = "okay";
98
99 phy4: ethernet-phy@4 {
100 reg = <4>;
101 phy-mode = "rgmii";
102 };
103 };
104 };
105
106 virtual_flash {
107 compatible = "mtd-concat";
108 devices = <&fwconcat0 &fwconcat1>;
109
110 partitions {
111 compatible = "fixed-partitions";
112 #address-cells = <1>;
113 #size-cells = <1>;
114
115 partition@0 {
116 compatible = "denx,uimage";
117 label = "firmware";
118 reg = <0x0 0x0>;
119 };
120 };
121 };
122 };
123
124 &usb1 {
125 #address-cells = <1>;
126 #size-cells = <0>;
127 status = "okay";
128
129 usb_ohci_port: port@1 {
130 reg = <1>;
131 #trigger-source-cells = <0>;
132 };
133 };
134
135 &usb2 {
136 #address-cells = <1>;
137 #size-cells = <0>;
138 status = "okay";
139
140 usb_ehci_port: port@1 {
141 reg = <1>;
142 #trigger-source-cells = <0>;
143 };
144 };
145
146 &usb_phy {
147 status = "okay";
148 };
149
150 &pcie0 {
151 status = "okay";
152
153 ath9k0: wifi@0,11 {
154 compatible = "pci168c,0029";
155 reg = <0x8800 0 0 0 0>;
156 qca,no-eeprom;
157 #gpio-cells = <2>;
158 gpio-controller;
159 };
160
161 ath9k1: wifi@0,12 {
162 compatible = "pci168c,0029";
163 reg = <0x9000 0 0 0 0>;
164 qca,no-eeprom;
165 #gpio-cells = <2>;
166 gpio-controller;
167 };
168 };
169
170 &spi {
171 status = "okay";
172
173 flash@0 {
174 compatible = "jedec,spi-nor";
175 reg = <0>;
176 spi-max-frequency = <25000000>;
177
178 partitions {
179 compatible = "fixed-partitions";
180 #address-cells = <1>;
181 #size-cells = <1>;
182
183 partition@0 {
184 label = "u-boot";
185 reg = <0x000000 0x040000>;
186 read-only;
187 };
188
189 partition@40000 {
190 label = "config";
191 reg = <0x040000 0x010000>;
192 read-only;
193 };
194
195 fwconcat0: partition@50000 {
196 label = "fwconcat0";
197 reg = <0x050000 0x610000>;
198 };
199
200 partition@660000 {
201 label = "caldata";
202 reg = <0x660000 0x010000>;
203 read-only;
204 };
205
206 fwconcat1: partition@670000 {
207 label = "fwconcat1";
208 reg = <0x670000 0x190000>;
209 };
210 };
211 };
212 };
213
214 &eth0 {
215 status = "okay";
216
217 pll-data = <0x11110000 0x00001099 0x00991099>;
218
219 fixed-link {
220 speed = <1000>;
221 full-duplex;
222 };
223 };
224
225 &eth1 {
226 status = "okay";
227
228 pll-data = <0x11110000 0x00001099 0x00991099>;
229
230 phy-handle = <&phy4>;
231 };