target/linux/ath79/dts/ar7161_trendnet_tew-673gru.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "ar7100.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         compatible = "trendnet,tew-673gru", "qca,ar7161";
  10         model = "TRENDNET TEW-673GRU";
  11
  12         aliases {
  13                 led-boot = &led_wps;
  14                 led-failsafe = &led_wps;
  15                 led-running = &led_wps;
  16                 led-upgrade = &led_wps;
  17         };
  18
  19         extosc: ref {
  20                 compatible = "fixed-clock";
  21                 #clock-cells = <0>;
  22                 clock-output-names = "ref";
  23                 clock-frequency = <40000000>;
  24         };
  25
  26         leds {
  27                 compatible = "gpio-leds";
  28
  29                 led_wps: wps {
  30                         label = "blue:wps";
  31                         gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
  32                 };
  33         };
  34
  35         keys {
  36                 compatible = "gpio-keys";
  37
  38                 reset {
  39                         label = "reset";
  40                         linux,code = <KEY_RESTART>;
  41                         gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
  42                 };
  43
  44                 wps {
  45                         label = "wps";
  46                         linux,code = <KEY_WPS_BUTTON>;
  47                         gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
  48                 };
  49         };
  50
  51         rtl8366s {
  52                 compatible = "realtek,rtl8366s";
  53                 gpio-sda = <&gpio 5 GPIO_ACTIVE_HIGH>;
  54                 gpio-sck = <&gpio 7 GPIO_ACTIVE_HIGH>;
  55                 realtek,initvals = <0x06 0x0108>;
  56
  57                 mdio-bus {
  58                         #address-cells = <1>;
  59                         #size-cells = <0>;
  60                         status = "okay";
  61
  62                         phy4: ethernet-phy@4 {
  63                                 reg = <4>;
  64                                 phy-mode = "rgmii";
  65                         };
  66                 };
  67         };
  68
  69         virtual_flash {
  70                 compatible = "mtd-concat";
  71                 devices = <&fwconcat0 &fwconcat1>;
  72
  73                 partitions {
  74                         compatible = "fixed-partitions";
  75                         #address-cells = <1>;
  76                         #size-cells = <1>;
  77
  78                         partition@0 {
  79                                 compatible = "denx,uimage";
  80                                 label = "firmware";
  81                                 reg = <0x0 0x0>;
  82                         };
  83                 };
  84         };
  85 };
  86
  87 &usb1 {
  88         status = "okay";
  89 };
  90
  91 &usb2 {
  92         status = "okay";
  93 };
  94
  95 &usb_phy {
  96         status = "okay";
  97 };
  98
  99 &pcie0 {
 100         status = "okay";
 101
 102         wifi@0,11 {
 103                 compatible = "pci168c,0029";
 104                 reg = <0x8800 0 0 0 0>;
 105                 qca,no-eeprom;
 106         };
 107
 108         wifi@0,12 {
 109                 compatible = "pci168c,0029";
 110                 reg = <0x9000 0 0 0 0>;
 111                 qca,no-eeprom;
 112         };
 113 };
 114
 115 &pll {
 116         clocks = <&extosc>;
 117 };
 118
 119 &spi {
 120         status = "okay";
 121
 122         flash@0 {
 123                 compatible = "jedec,spi-nor";
 124                 reg = <0>;
 125                 spi-max-frequency = <25000000>;
 126
 127                 partitions {
 128                         compatible = "fixed-partitions";
 129                         #address-cells = <1>;
 130                         #size-cells = <1>;
 131
 132                         partition@0 {
 133                                 label = "u-boot";
 134                                 reg = <0x000000 0x040000>;
 135                                 read-only;
 136                         };
 137
 138                         partition@40000 {
 139                                 label = "config";
 140                                 reg = <0x040000 0x010000>;
 141                                 read-only;
 142                         };
 143
 144                         fwconcat0: partition@50000 {
 145                                 label = "fwconcat0";
 146                                 reg = <0x050000 0x610000>;
 147                         };
 148
 149                         partition@660000 {
 150                                 label = "caldata";
 151                                 reg = <0x660000 0x010000>;
 152                                 read-only;
 153                         };
 154
 155                         fwconcat1: partition@670000 {
 156                                 label = "fwconcat1";
 157                                 reg = <0x670000 0x190000>;
 158                         };
 159                 };
 160         };
 161 };
 162
 163 &eth0 {
 164         status = "okay";
 165
 166         pll-data = <0x11110000 0x00001099 0x00991099>;
 167
 168         fixed-link {
 169                 speed = <1000>;
 170                 full-duplex;
 171         };
 172 };
 173
 174 &eth1 {
 175         status = "okay";
 176
 177         pll-data = <0x11110000 0x00001099 0x00991099>;
 178
 179         phy-handle = <&phy4>;
 180 };