target/linux/ath79/dts/ar7241.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "ar724x.dtsi"
   4
   5 / {
   6         usb_phy: usb-phy {
   7                 compatible = "qca,ar7200-usb-phy";
   8
   9                 reset-names = "usb-phy", "usb-suspend-override";
  10                 resets = <&rst 4>, <&rst 3>;
  11
  12                 #phy-cells = <0>;
  13
  14                 status = "disabled";
  15         };
  16 };
  17
  18 &gpio {
  19         ngpios = <20>;
  20 };
  21
  22 &ahb {
  23         usb: usb@1b000000 {
  24                 compatible = "generic-ehci";
  25                 reg = <0x1b000000 0x1000>;
  26
  27                 interrupts = <3>;
  28
  29                 resets = <&rst 5>;
  30                 reset-names = "usb-host";
  31
  32                 has-transaction-translator;
  33                 caps-offset = <0x100>;
  34
  35                 phy-names = "usb-phy";
  36                 phys = <&usb_phy>;
  37
  38                 status = "disabled";
  39         };
  40 };
  41
  42 &eth0 {
  43         compatible = "qca,ar7241-eth", "syscon";
  44
  45         pll-data = <0x00110000 0x00001099 0x00991099>;
  46
  47         resets = <&rst 9>, <&rst 22>;
  48         reset-names = "mac", "mdio";
  49         clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_AHB>;
  50         clock-names = "eth", "mdio";
  51         phy-handle = <&swphy4>;
  52 };
  53
  54 &mdio1 {
  55         status = "okay";
  56
  57         resets = <&rst 23>;
  58         reset-names = "mdio";
  59         builtin-switch;
  60
  61         builtin_switch: switch0@1f {
  62                 compatible = "qca,ar7240sw";
  63
  64                 reg = <0x1f>;
  65                 resets = <&rst 8>;
  66                 reset-names = "switch";
  67                 qca,mib-poll-interval = <500>;
  68
  69                 mdio-bus {
  70                         #address-cells = <1>;
  71                         #size-cells = <0>;
  72
  73                         swphy4: ethernet-phy@4 {
  74                                 reg = <4>;
  75                                 phy-mode = "mii";
  76                         };
  77                 };
  78         };
  79 };
  80
  81 &eth1 {
  82         compatible = "qca,ar7241-eth", "syscon";
  83
  84         pll-data = <0x00110000 0x00001099 0x00991099>;
  85
  86         resets = <&rst 13>, <&rst 23>;
  87         reset-names = "mac", "mdio";
  88         clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_AHB>;
  89         clock-names = "eth", "mdio";
  90
  91         phy-mode = "gmii";
  92
  93         fixed-link {
  94                 speed = <1000>;
  95                 full-duplex;
  96         };
  97 };