target/linux/ath79/dts/ar9330.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 #include <dt-bindings/clock/ath79-clk.h>
   3 #include "ath79.dtsi"
   4
   5 / {
   6         compatible = "qca,ar9330";
   7
   8         #address-cells = <1>;
   9         #size-cells = <1>;
  10
  11         cpus {
  12                 #address-cells = <1>;
  13                 #size-cells = <0>;
  14
  15                 cpu@0 {
  16                         device_type = "cpu";
  17                         compatible = "mips,mips24Kc";
  18                         clocks = <&pll ATH79_CLK_CPU>;
  19                         reg = <0>;
  20                 };
  21         };
  22
  23         chosen {
  24                 bootargs = "console=ttyATH0,115200";
  25         };
  26
  27         ahb {
  28                 apb {
  29                         ddr_ctrl: memory-controller@18000000 {
  30                                 compatible = "qca,ar7240-ddr-controller";
  31                                 reg = <0x18000000 0x100>;
  32
  33                                 #qca,ddr-wb-channel-cells = <1>;
  34                         };
  35
  36                         uart: uart@18020000 {
  37                                 compatible = "qca,ar9330-uart";
  38                                 reg = <0x18020000 0x14>;
  39
  40                                 interrupts = <3>;
  41
  42                                 clocks = <&pll ATH79_CLK_REF>;
  43                                 clock-names = "uart";
  44
  45                                 status = "disabled";
  46                         };
  47
  48                         gpio: gpio@18040000 {
  49                                 compatible = "qca,ar7100-gpio";
  50                                 reg = <0x18040000 0x34>;
  51                                 interrupts = <2>;
  52
  53                                 ngpios = <30>;
  54
  55                                 gpio-controller;
  56                                 #gpio-cells = <2>;
  57
  58                                 interrupt-controller;
  59                                 #interrupt-cells = <2>;
  60                         };
  61
  62                         pinmux: pinmux@18040028 {
  63                                 compatible = "pinctrl-single";
  64                                 reg = <0x18040028 0x8>;
  65
  66                                 pinctrl-single,bit-per-mux;
  67                                 pinctrl-single,register-width = <32>;
  68                                 pinctrl-single,function-mask = <0x1>;
  69                                 #pinctrl-cells = <2>;
  70
  71                                 jtag_disable_pins: pinmux_jtag_disable_pins {
  72                                         pinctrl-single,bits = <0x0 0x1 0x1>;
  73                                 };
  74
  75                                 switch_led_disable_pins: pinmux_switch_led_disable_pins {
  76                                         pinctrl-single,bits = <0x0 0x0 0xf8>;
  77                                 };
  78                         };
  79
  80                         pll: pll-controller@18050000 {
  81                                 compatible = "qca,ar9330-pll";
  82                                 reg = <0x18050000 0x100>;
  83
  84                                 #clock-cells = <1>;
  85                         };
  86
  87                         wdt: wdt@18060008 {
  88                                 compatible = "qca,ar7130-wdt";
  89                                 reg = <0x18060008 0x8>;
  90
  91                                 interrupts = <4>;
  92
  93                                 clocks = <&pll ATH79_CLK_AHB>;
  94                                 clock-names = "wdt";
  95                         };
  96
  97                         rst: reset-controller@1806001c {
  98                                 compatible = "qca,ar7100-reset";
  99                                 reg = <0x1806001c 0x4>;
 100
 101                                 #reset-cells = <1>;
 102                         };
 103                 };
 104
 105                 usb: usb@1b000000 {
 106                         compatible = "chipidea,usb2";
 107                         reg = <0x1b000000 0x200>;
 108
 109                         interrupts = <3>;
 110                         resets = <&rst 5>;
 111                         reset-names = "usb-host";
 112
 113                         phy-names = "usb-phy";
 114                         phys = <&usb_phy>;
 115
 116                         status = "disabled";
 117                 };
 118
 119                 spi: spi@1f000000 {
 120                         compatible = "qca,ar934x-spi";
 121                         reg = <0x1f000000 0x1c>;
 122
 123                         clocks = <&pll ATH79_CLK_AHB>;
 124
 125                         #address-cells = <1>;
 126                         #size-cells = <0>;
 127
 128                         status = "disabled";
 129                 };
 130
 131                 gmac: gmac@18070000 {
 132                         compatible = "qca,ar9330-gmac";
 133                         reg = <0x18070000 0x4>;
 134                 };
 135
 136                 wmac: wmac@18100000 {
 137                         compatible = "qca,ar9330-wmac";
 138                         reg = <0x18100000 0x20000>;
 139
 140                         interrupts = <2>;
 141
 142                         status = "disabled";
 143                 };
 144         };
 145
 146         usb_phy: usb-phy {
 147                 compatible = "qca,ar7200-usb-phy";
 148
 149                 reset-names = "usb-phy", "usb-suspend-override";
 150                 resets = <&rst 4>, <&rst 3>;
 151
 152                 #phy-cells = <0>;
 153
 154                 status = "disabled";
 155         };
 156 };
 157
 158 &cpuintc {
 159         qca,ddr-wb-channel-interrupts = <2>, <3>;
 160         qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>;
 161 };
 162
 163 &eth0 {
 164         compatible = "qca,ar9330-eth", "syscon";
 165
 166         pll-data = <0x00110000 0x00001099 0x00991099>;
 167
 168         resets = <&rst 9>;
 169         reset-names = "mac";
 170         phy-handle = <&swphy4>;
 171 };
 172
 173 &mdio1 {
 174         status = "okay";
 175         compatible = "qca,ar9330-mdio";
 176
 177         resets = <&rst 23>;
 178         reset-names = "mdio";
 179         builtin-switch;
 180
 181         builtin_switch: switch0@1f {
 182                 compatible = "qca,ar7240sw";
 183                 reg = <0x1f>;
 184                 resets = <&rst 8>;
 185                 reset-names = "switch";
 186                 qca,mib-poll-interval = <500>;
 187
 188                 mdio-bus {
 189                         #address-cells = <1>;
 190                         #size-cells = <0>;
 191
 192                         swphy4: ethernet-phy@4 {
 193                                 reg = <4>;
 194                                 phy-mode = "mii";
 195                         };
 196                 };
 197         };
 198 };
 199
 200 &eth1 {
 201         compatible = "qca,ar9330-eth", "syscon";
 202
 203         pll-data = <0x00110000 0x00001099 0x00991099>;
 204         phy-mode = "gmii";
 205
 206         resets = <&rst 13>;
 207         reset-names = "mac";
 208
 209         fixed-link {
 210                 speed = <1000>;
 211                 full-duplex;
 212         };
 213 };