target/linux/ath79/dts/ar9342_iodata_etg3-r.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /dts-v1/;
   3
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6
   7 #include "ar9344.dtsi"
   8
   9 / {
  10         compatible = "iodata,etg3-r", "qca,ar9344";
  11         model = "I-O DATA ETG3-R";
  12
  13         aliases {
  14                 led-boot = &power;
  15                 led-failsafe = &power;
  16                 led-running = &power;
  17                 led-upgrade = &power;
  18         };
  19
  20         leds {
  21                 compatible = "gpio-leds";
  22
  23                 power: power {
  24                         label = "etg3-r:green:power";
  25                         gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
  26                         default-state = "on";
  27                 };
  28
  29                 notification {
  30                         label = "etg3-r:green:notification";
  31                         gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
  32                         default-state = "off";
  33                 };
  34         };
  35
  36         keys {
  37                 compatible = "gpio-keys-polled";
  38                 poll-interval = <20>;
  39
  40                 reset {
  41                         label = "reset";
  42                         linux,code = <KEY_RESTART>;
  43                         gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
  44                         debounce-interval = <60>;
  45                 };
  46         };
  47 };
  48
  49 &spi {
  50         num-cs = <1>;
  51         status = "okay";
  52
  53         flash@0 {
  54                 compatible = "jedec,spi-nor";
  55                 reg = <0>;
  56                 spi-max-frequency = <25000000>;
  57
  58                 partitions {
  59                         compatible = "fixed-partitions";
  60                         #address-cells = <1>;
  61                         #size-cells = <1>;
  62
  63                         partition@0 {
  64                                 label = "u-boot";
  65                                 reg = <0x000000 0x040000>;
  66                                 read-only;
  67                         };
  68
  69                         partition@40000 {
  70                                 label = "u-boot-env";
  71                                 reg = <0x040000 0x010000>;
  72                         };
  73
  74                         partition@50000 {
  75                                 label = "firmware";
  76                                 reg = <0x050000 0x780000>;
  77                         };
  78
  79                         partition@7d0000 {
  80                                 label = "Config";
  81                                 reg = <0x07d0000 0x10000>;
  82                                 read-only;
  83                         };
  84
  85                         partition@7e0000 {
  86                                 label = "Rsv";
  87                                 reg = <0x07e0000 0x10000>;
  88                                 read-only;
  89                         };
  90
  91                         partition@7f0000 {
  92                                 label = "ART";
  93                                 reg = <0x7f0000 0x010000>;
  94                                 read-only;
  95                         };
  96                 };
  97         };
  98 };
  99
 100 &mdio0 {
 101         status = "okay";
 102
 103         phy0: ethernet-phy@0 {
 104                 reg = <0>;
 105                 phy-mode = "rgmii";
 106
 107                 qca,ar8327-initvals = <
 108                         0x04 0x07600000 /* PORT0 PAD MODE CTRL */
 109                         0x50 0xffb7ffb7 /* LED_CTRL0 */
 110                         0x54 0xffb7ffb7 /* LED_CTRL1 */
 111                         0x58 0xffb7ffb7 /* LED_CTRL2 */
 112                         0x5c 0x03ffff00 /* LED_CTRL3 */
 113                         0x7c 0x0000007e /* PORT0_STATUS */
 114                 >;
 115         };
 116 };
 117
 118 &eth0 {
 119         status = "okay";
 120
 121         pll-data = <0x06000000 0x00000101 0x00001616>;
 122
 123         phy-mode = "rgmii";
 124         phy-handle = <&phy0>;
 125 };
 126
 127 &uart {
 128         status = "okay";
 129 };