target/linux/ath79/dts/ar9344_dlink_dir-8x5.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "ar9344.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         keys {
  10                 compatible = "gpio-keys";
  11
  12                 reset {
  13                         linux,code = <KEY_RESTART>;
  14                         gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
  15                         debounce-interval = <60>;
  16                 };
  17
  18                 wps {
  19                         linux,code = <KEY_WPS_BUTTON>;
  20                         gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
  21                         debounce-interval = <60>;
  22                 };
  23         };
  24 };
  25
  26 &eth0 {
  27         status = "okay";
  28
  29         /* default for ar934x, except for 1000M */
  30         pll-data = <0x06000000 0x00000101 0x00001616>;
  31
  32         nvmem-cells = <&macaddr_lan>;
  33         nvmem-cell-names = "mac-address-ascii";
  34
  35         phy-mode = "rgmii";
  36         phy-handle = <&phy0>;
  37 };
  38
  39 &mdio0 {
  40         status = "okay";
  41
  42         phy0: ethernet-phy@0 {
  43                 reg = <0>;
  44                 qca,ar8327-initvals = <
  45                         /* GPL code drop (bsp.h & athrs17_phy.c) */
  46                         0x10 0xc1000000 /* PWS_REG_VALUE */
  47                         0x04 0x07600000 /* PORT0 PAD Mode */
  48                         0x0c 0x01000000 /* PORT6 PAD Mode */
  49                         0x7c 0x0000007e /* PORT0_STATUS */
  50                         0x94 0x0000007e /* PORT6_STATUS */
  51                 >;
  52         };
  53 };
  54
  55 &pcie {
  56         status = "okay";
  57
  58         ath9k: wifi@0,0 {
  59                 compatible = "pci168c,0030";
  60                 reg = <0x0000 0 0 0 0>;
  61                 /* "mac-address-ascii" currently does not work for
  62                    ath9k pci devices. these below are retained for future
  63                    improvements. */
  64                 /* nvmem-cells = <&macaddr_wan>, <&cal_art_5000>;
  65                    nvmem-cell-names = "mac-address-ascii", "calibration";
  66                    mac-address-increment = <1>; */
  67                 qca,no-eeprom; /* remove this when "mac-address-ascii" works  */
  68                 gpio-controller;
  69                 #gpio-cells = <2>;
  70         };
  71 };
  72
  73 &ref {
  74         clock-frequency = <40000000>;
  75 };
  76
  77 &spi {
  78         status = "okay";
  79
  80         flash@0 {
  81                 compatible = "jedec,spi-nor";
  82                 reg = <0>;
  83                 spi-max-frequency = <25000000>;
  84
  85                 partitions {
  86                         compatible = "fixed-partitions";
  87                         #address-cells = <1>;
  88                         #size-cells = <1>;
  89
  90                         partition@0 {
  91                                 label = "uboot";
  92                                 reg = <0x000000 0x010000>;
  93                                 read-only;
  94                         };
  95
  96                         partition@10000 {
  97                                 label = "nvram";
  98                                 reg = <0x010000 0x010000>;
  99                                 read-only;
 100                         };
 101
 102                         partition@20000 {
 103                                 label = "firmware";
 104                                 reg = <0x020000 0xF90000>;
 105                                 compatible = "denx,uimage";
 106                         };
 107
 108                         partition@fb0000 {
 109                                 label = "lang";
 110                                 reg = <0xfb0000 0x030000>;
 111                                 read-only;
 112                         };
 113
 114                         mac: partition@fe0000 {
 115                                 label = "mac";
 116                                 reg = <0xfe0000 0x010000>;
 117                                 read-only;
 118
 119                                 compatible = "nvmem-cells";
 120                                 #address-cells = <1>;
 121                                 #size-cells = <1>;
 122
 123                                 macaddr_lan: macaddr@4 {
 124                                         reg = <0x4 0x11>;
 125                                 };
 126
 127                                 macaddr_wan: macaddr@18 {
 128                                         reg = <0x18 0x11>;
 129                                 };
 130                         };
 131
 132                         art: partition@ff0000 {
 133                                 label = "art";
 134                                 reg = <0xff0000 0x010000>;
 135                                 read-only;
 136
 137                                 compatible = "nvmem-cells";
 138                                 #address-cells = <1>;
 139                                 #size-cells = <1>;
 140
 141                                 cal_art_1000: cal@1000 {
 142                                         reg = <0x1000 0x440>;
 143                                 };
 144
 145                                 cal_art_5000: cal@5000 {
 146                                         reg = <0x5000 0x440>;
 147                                 };
 148                         };
 149                 };
 150         };
 151 };
 152
 153 &usb {
 154         status = "okay";
 155 };
 156
 157 &usb_phy {
 158         status = "okay";
 159 };
 160
 161 &wmac {
 162         status = "okay";
 163         nvmem-cells = <&macaddr_lan>, <&cal_art_1000>;
 164         nvmem-cell-names = "mac-address-ascii", "calibration";
 165 };