target/linux/ath79/dts/ar9344_pcs_cr5000.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /dts-v1/;
   3
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6
   7 #include "ar9344.dtsi"
   8
   9 / {
  10         model = "PowerCloud Systems CR5000";
  11         compatible = "pcs,cr5000", "qca,ar9344";
  12
  13         aliases {
  14                 serial0 = &uart;
  15                 led-status = &status;
  16         };
  17
  18
  19         keys {
  20                 compatible = "gpio-keys-polled";
  21                 poll-interval = <20>;
  22                 #address-cells = <1>;
  23                 #size-cells = <0>;
  24                 pinctrl-names = "default";
  25                 pinctrl-0 = <&jtag_disable_pins>;
  26
  27                 reset {
  28                         label = "Reset button";
  29                         linux,code = <KEY_RESTART>;
  30                         gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
  31                         debounce-interval = <60>;
  32                 };
  33
  34                 wps {
  35                         label = "WPS button";
  36                         linux,code = <KEY_WPS_BUTTON>;
  37                         gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
  38                         debounce-interval = <60>;
  39                 };
  40         };
  41
  42         leds {
  43                 compatible = "gpio-leds";
  44
  45                 status: power {
  46                         label = "pcs:amber:power";
  47                         gpios = <&gpio 2 GPIO_ACTIVE_LOW>,
  48                                 <&gpio 4 GPIO_ACTIVE_LOW>;
  49                         default-state = "on";
  50                 };
  51
  52                 wlan2g {
  53                         label = "pcs:blue:wlan";
  54                         gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
  55                         default-state = "off";
  56                         linux,default-trigger = "phy0tpt";
  57                 };
  58
  59                 wps_white {
  60                         label = "pcs:white:wps";
  61                         gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
  62                         default-state = "off";
  63                 };
  64         };
  65
  66 };
  67
  68 &ref {
  69         clock-frequency = <25000000>;
  70 };
  71
  72 &uart {
  73         status = "okay";
  74 };
  75
  76 &gpio {
  77         status = "okay";
  78 };
  79
  80 &spi {
  81         num-cs = <1>;
  82
  83         status = "okay";
  84
  85         flash@0 {
  86                 #address-cells = <1>;
  87                 #size-cells = <1>;
  88                 compatible = "jedec,spi-nor";
  89                 reg = <0>;
  90                 spi-max-frequency = <25000000>;
  91
  92                 partitions {
  93                         compatible = "fixed-partitions";
  94                         #address-cells = <1>;
  95                         #size-cells = <1>;
  96
  97                         uboot: partition@0 {
  98                                 label = "u-boot";
  99                                 reg = <0x000000 0x040000>;
 100                                 read-only;
 101                         };
 102
 103                         partition@40000 {
 104                                 label = "u-boot-env";
 105                                 reg = <0x040000 0x010000>;
 106                                 read-only;
 107                         };
 108
 109                         partition@50000 {
 110                                 label = "firmware";
 111                                 reg = <0x050000 0x07a0000>;
 112                         };
 113
 114                         art: partition@7f0000 {
 115                                 label = "art";
 116                                 reg = <0x7f0000 0x010000>;
 117                                 read-only;
 118                         };
 119                 };
 120         };
 121 };
 122
 123 &usb {
 124         status = "okay";
 125
 126         port@1 {
 127                 reg = <1>;
 128                 #trigger-source-cells = <0>;
 129
 130                 hub_port1: port@1 {
 131                         reg = <1>;
 132                         #trigger-source-cells = <0>;
 133                 };
 134         };
 135
 136 };
 137
 138 &usb_phy {
 139         status = "okay";
 140 };
 141
 142 &pcie {
 143         status = "okay";
 144
 145         ath9k: wifi@168c,0030 {
 146                 compatible = "pci168c,0030";
 147                 mtd-mac-address = <&art 0x5002>;
 148                 #gpio-cells = <2>;
 149                 gpio-controller;
 150         };
 151 };
 152
 153 &mdio0 {
 154         status = "okay";
 155
 156         phy-mask = <0>;
 157
 158         phy0: ethernet-phy@0 {
 159                 reg = <0>;
 160                 phy-mode = "rgmii";
 161                 qca,ar8327-initvals = <
 162                         0x04 0x07600000 /* PORT0 PAD MODE CTRL */
 163                         0x10 0x81000080 /* POWER_ON_STRAP */
 164                         0x50 0xcc35cc35 /* LED_CTRL0 */
 165                         0x54 0xca35ca35 /* LED_CTRL1 */
 166                         0x58 0xc935c935 /* LED_CTRL2 */
 167                         0x5c 0x03ffff00 /* LED_CTRL3 */
 168                         0x7c 0x0000007e /* PORT0_STATUS */
 169                 >;
 170         };
 171 };
 172
 173 &eth0 {
 174         status = "okay";
 175
 176         /* default for ar934x, except for 1000M */
 177         pll-data = <0x06000000 0x00000101 0x00001616>;
 178
 179         mtd-mac-address = <&art 0x0>;
 180
 181         phy-mode = "rgmii";
 182         phy-handle = <&phy0>;
 183
 184
 185         aliases {
 186                 ag0 = &eth1;
 187         };
 188
 189         port@0 {
 190                 compatible = "swconfig,port";
 191                 swconfig,segment = "lan";
 192                 swconfig,portmap = <1 1>;
 193         };
 194
 195         port@1 {
 196                 compatible = "swconfig,port";
 197                 swconfig,segment = "lan";
 198                 swconfig,portmap = <2 2>;
 199         };
 200
 201         port@2 {
 202                 compatible = "swconfig,port";
 203                 swconfig,segment = "lan";
 204                 swconfig,portmap = <3 3>;
 205         };
 206
 207         port@3 {
 208                 compatible = "swconfig,port";
 209                 swconfig,segment = "lan";
 210                 swconfig,portmap = <4 4>;
 211         };
 212
 213         port@4 {
 214                 compatible = "swconfig,port";
 215                 swconfig,segment = "wan";
 216                 swconfig,portmap = <5 5>;
 217         };
 218
 219 };
 220
 221 &wmac {
 222         status = "okay";
 223
 224         mtd-cal-data = <&art 0x1000>;
 225         mtd-mac-address = <&art 0x1002>;
 226 };