tools/patchelf: update to 0.18.0
[openwrt/staging/dedeckeh.git] / target / linux / ath79 / dts / ar9344_tplink_tl-wdr4300.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "ar9344_tplink_tl-wdrxxxx.dtsi"
4
5 / {
6 aliases {
7 label-mac-device = &ath9k;
8 };
9
10 gpio-export {
11 compatible = "gpio-export";
12
13 gpio_usb1_power {
14 gpio-export,name = "tp-link:power:usb1";
15 gpio-export,output = <1>;
16 gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
17 };
18
19 gpio_usb2_power {
20 gpio-export,name = "tp-link:power:usb2";
21 gpio-export,output = <1>;
22 gpios = <&gpio 21 GPIO_ACTIVE_HIGH>;
23 };
24
25 gpio_ext_lna0 {
26 gpio-export,name = "tp-link:ext:lna0";
27 gpio-export,output = <1>;
28 gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
29 };
30
31 gpio_ext_lna1 {
32 gpio-export,name = "tp-link:ext:lna1";
33 gpio-export,output = <1>;
34 gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
35 };
36 };
37 };
38
39 &leds {
40 usb1 {
41 label = "green:usb1";
42 gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
43 trigger-sources = <&hub_port1>;
44 linux,default-trigger = "usbport";
45 };
46
47 usb2 {
48 label = "green:usb2";
49 gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
50 trigger-sources = <&hub_port2>;
51 linux,default-trigger = "usbport";
52 };
53 };
54
55 &usb {
56 status = "okay";
57 };
58
59 &hub_port {
60 #address-cells = <1>;
61 #size-cells = <0>;
62
63 hub_port1: port@1 {
64 reg = <1>;
65 #trigger-source-cells = <0>;
66 };
67
68 hub_port2: port@2 {
69 reg = <2>;
70 #trigger-source-cells = <0>;
71 };
72 };
73
74 &usb_phy {
75 status = "okay";
76 };
77
78 &wmac {
79 mac-address-increment = <(-1)>;
80 };
81
82 &mdio0 {
83 status = "okay";
84
85 phy0: ethernet-phy@0 {
86 reg = <0>;
87 phy-mode = "rgmii";
88
89 qca,ar8327-initvals = <
90 0x04 0x07600000 /* PORT0 PAD MODE CTRL */
91 0x10 0x80000080 /* POWER_ON_STRAP */
92 0x50 0xc737c737 /* LED_CTRL0 */
93 0x54 0x00000000 /* LED_CTRL1 */
94 0x58 0x00000000 /* LED_CTRL2 */
95 0x5c 0x0030c300 /* LED_CTRL3 */
96 0x7c 0x0000007e /* PORT0_STATUS */
97 >;
98 };
99 };
100
101 &eth0 {
102 status = "okay";
103
104 /* default for ar934x, except for 1000M */
105 pll-data = <0x06000000 0x00000101 0x00001616>;
106
107 nvmem-cells = <&macaddr_uboot_1fc00>;
108 nvmem-cell-names = "mac-address";
109
110 phy-mode = "rgmii";
111 phy-handle = <&phy0>;
112 };