ath79: move usb led trigger node to SoC dtsi
[openwrt/staging/ldir.git] / target / linux / ath79 / dts / ar9344_wd_mynet-n750.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "ar9344_wd_mynet-nxxx.dtsi"
4
5 / {
6 model = "Western Digital My Net N750";
7 compatible = "wd,mynet-n750", "qca,ar9344";
8
9 aliases {
10 led-boot = &led_power;
11 led-failsafe = &led_power;
12 led-running = &led_power;
13 led-upgrade = &led_power;
14 };
15
16 leds {
17 compatible = "gpio-leds";
18
19 wifi {
20 label = "blue:wireless";
21 gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
22 };
23
24 internet {
25 label = "blue:internet";
26 gpios = <&gpio 12 GPIO_ACTIVE_HIGH>;
27 };
28
29 wps {
30 label = "blue:wps";
31 gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
32 };
33
34 led_power: power {
35 label = "blue:power";
36 gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
37 };
38 };
39
40 keys {
41 compatible = "gpio-keys";
42
43 reset {
44 linux,code = <KEY_RESTART>;
45 gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
46 };
47
48 wps {
49 linux,code = <KEY_WPS_BUTTON>;
50 gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
51 };
52 };
53 };
54
55 &gpio {
56 gpio_ext_lna0 {
57 gpio-hog;
58 gpios = <15 0>;
59 output-high;
60 line-name = "ext:lna0";
61 };
62
63 gpio_ext_lna1 {
64 gpio-hog;
65 gpios = <18 0>;
66 output-high;
67 line-name = "ext:lna1";
68 };
69 };
70
71 &usb {
72 status = "okay";
73 };
74
75 &mdio0 {
76 status = "okay";
77
78 switch0@1f {
79 compatible = "qca,ar8327";
80 reg = <0x1f>;
81
82 qca,ar8327-initvals = <
83 0x04 0x07600000 /* PORT0 PAD MODE CTRL */
84 0x10 0x80000080 /* POWER_ON_STRAP */
85 0x50 0xc737c737 /* LED_CTRL0 */
86 0x54 0x00000000 /* LED_CTRL1 */
87 0x58 0x00000000 /* LED_CTRL2 */
88 0x5c 0x0030c300 /* LED_CTRL3 */
89 0x7c 0x0000007e /* PORT0_STATUS */
90 >;
91 };
92 };
93
94 &eth0 {
95 status = "okay";
96
97 /* default for ar934x, except for 1000M */
98 pll-data = <0x06000000 0x00000101 0x00001616>;
99
100 phy-mode = "rgmii";
101 fixed-link {
102 speed = <1000>;
103 full-duplex;
104 };
105 };