1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
10 compatible = "zbtlink,zbt-wd323", "qca,ar9344";
13 compatible = "gpio-keys";
17 gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
18 linux,code = <KEY_RESTART>;
23 compatible = "i2c-gpio";
27 pinctrl-names = "default";
28 pinctrl-0 = <&enable_gpio15 &enable_gpio19>;
30 sda-gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
31 scl-gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
34 compatible = "nxp,pcf8563";
41 compatible = "gpio-leds";
43 pinctrl-names = "default";
44 pinctrl-0 = <&enable_gpio20_gpio22>;
48 gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
49 linux,default-trigger = "phy0tpt";
53 label = "orange:lan1";
54 gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
58 label = "orange:lan2";
59 gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
64 compatible = "linux,wdt-gpio";
65 gpios = <&gpio 21 GPIO_ACTIVE_HIGH>;
67 hw_margin_ms = <30000>;
75 pinctrl-names = "default";
76 pinctrl-0 = <&enable_gpio21>;
80 pinctrl-names = "default";
81 pinctrl-0 = <&jtag_disable_pins>;
94 phy-handle = <&swphy4>;
95 nvmem-cells = <&macaddr_art_0>;
96 nvmem-cell-names = "mac-address";
101 nvmem-cells = <&macaddr_art_6>;
102 nvmem-cell-names = "mac-address";
109 compatible = "jedec,spi-nor";
110 spi-max-frequency = <22000000>;
114 compatible = "fixed-partitions";
115 #address-cells = <1>;
124 reg = <0x40000 0x10000>;
129 compatible = "denx,uimage";
130 reg = <0x50000 0xfa0000>;
134 reg = <0xff0000 0x10000>;
143 mtd-cal-data = <&art 0x1000>;
147 enable_gpio15: pinmux_enable_gpio15 {
148 pinctrl-single,bits = <0xc 0x0 0xff000000>;
151 enable_gpio19: pinmux_enable_gpio19 {
152 pinctrl-single,bits = <0x10 0x0 0xff000000>;
155 enable_gpio20_gpio22: pinmux_enable_gpio20_gpio22 {
156 pinctrl-single,bits = <0x14 0x0 0xff00ff>;
159 enable_gpio21: pinmux_enable_gpio21 {
160 pinctrl-single,bits = <0x14 0x0 0xff00>;
165 compatible = "nvmem-cells";
166 #address-cells = <1>;
169 macaddr_art_0: macaddr@0 {
173 macaddr_art_6: macaddr@6 {