target/linux/ath79/dts/ath79.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include <dt-bindings/clock/ath79-clk.h>
   4
   5 / {
   6         #address-cells = <1>;
   7         #size-cells = <1>;
   8
   9         cpuintc: interrupt-controller {
  10                 compatible = "qca,ar7100-cpu-intc";
  11
  12                 interrupt-controller;
  13                 #interrupt-cells = <1>;
  14         };
  15
  16         ahb {
  17                 compatible = "simple-bus";
  18                 ranges;
  19
  20                 #address-cells = <1>;
  21                 #size-cells = <1>;
  22
  23                 interrupt-parent = <&cpuintc>;
  24
  25                 apb {
  26                         compatible = "simple-bus";
  27                         ranges;
  28
  29                         #address-cells = <1>;
  30                         #size-cells = <1>;
  31
  32                         interrupt-parent = <&miscintc>;
  33
  34                         miscintc: interrupt-controller@18060010 {
  35                                 compatible = "qca,ar7240-misc-intc";
  36                                 reg = <0x18060010 0x4>;
  37
  38                                 interrupt-parent = <&cpuintc>;
  39                                 interrupts = <6>;
  40
  41                                 interrupt-controller;
  42                                 #interrupt-cells = <1>;
  43                         };
  44                 };
  45
  46                 eth0: eth@19000000 {
  47                         status = "disabled";
  48
  49                         compatible = "qca,ath79-eth", "syscon";
  50                         reg = <0x19000000 0x200>;
  51
  52                         interrupts = <4>;
  53                         phy-mode = "mii";
  54
  55                         mdio0: mdio {
  56                                 status = "disabled";
  57
  58                                 compatible = "qca,ath79-mdio";
  59                                 #address-cells = <1>;
  60                                 #size-cells = <0>;
  61
  62                                 regmap = <&eth0>;
  63
  64                                 clocks = <&pll ATH79_CLK_MDIO>;
  65                                 clock-names = "ref";
  66                         };
  67                 };
  68
  69                 eth1: eth@1a000000 {
  70                         status = "disabled";
  71
  72                         compatible = "qca,ath79-eth", "syscon";
  73                         reg = <0x1a000000 0x200>;
  74
  75                         interrupts = <5>;
  76                         phy-mode = "mii";
  77
  78                         mdio1: mdio {
  79                                 status = "disabled";
  80
  81                                 compatible = "qca,ath79-mdio";
  82                                 #address-cells = <1>;
  83                                 #size-cells = <0>;
  84
  85                                 regmap = <&eth1>;
  86
  87                                 clocks = <&pll ATH79_CLK_MDIO>;
  88                                 clock-names = "ref";
  89                         };
  90                 };
  91         };
  92 };