1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 compatible = "qca,qca9530";
12 bootargs = "console=ttyS0,115200n8";
21 compatible = "mips,mips24Kc";
22 clocks = <&pll ATH79_CLK_CPU>;
28 compatible = "fixed-clock";
30 clock-output-names = "ref";
31 clock-frequency = <25000000>;
36 ddr_ctrl: memory-controller@18000000 {
37 compatible = "qca,qca9530-ddr-controller",
38 "qca,ar7240-ddr-controller";
39 reg = <0x18000000 0x128>;
41 #qca,ddr-wb-channel-cells = <1>;
45 compatible = "ns16550a";
46 reg = <0x18020000 0x20>;
50 clocks = <&pll ATH79_CLK_REF>;
58 usb_phy: usb-phy@18030000 {
59 compatible = "qca,ar7200-usb-phy";
60 reg = <0x18030000 0x100>;
63 reset-names = "usb-phy", "usb-suspend-override";
64 resets = <&rst 4>, <&rst 3>;
70 compatible = "qca,qca9530-gpio",
72 reg = <0x18040000 0x28>;
81 #interrupt-cells = <2>;
84 pinmux: pinmux@1804002c {
85 compatible = "pinctrl-single";
87 reg = <0x1804002c 0x48>;
91 pinctrl-single,bit-per-mux;
92 pinctrl-single,register-width = <32>;
93 pinctrl-single,function-mask = <0x1>;
96 jtag_disable_pins: pinmux_jtag_disable_pins {
97 pinctrl-single,bits = <0x40 0x2 0x2>;
101 pll: pll-controller@18050000 {
102 compatible = "qca,qca9530-pll", "syscon";
103 reg = <0x18050000 0x48>;
106 clock-output-names = "cpu", "ddr", "ahb";
111 compatible = "qca,qca9530-wdt", "qca,ar7130-wdt";
112 reg = <0x18060008 0x8>;
116 clocks = <&pll ATH79_CLK_AHB>;
120 rst: reset-controller@1806001c {
121 compatible = "qca,qca9530-reset",
123 reg = <0x1806001c 0xac>;
127 intc2: interrupt-controller {
128 compatible = "qca,ar9340-intc";
130 interrupt-parent = <&cpuintc>;
133 interrupt-controller;
134 #interrupt-cells = <1>;
136 qca,int-status-addr = <0xac>;
137 qca,pending-bits = <0xf>, /* wmac */
138 <0x1f0>; /* pcie rc1 */
140 qca,ddr-wb-channel-interrupts = <0>, <1>;
141 qca,ddr-wb-channels = <&ddr_ctrl 4>, <&ddr_ctrl 3>;
146 gmac: gmac@18070000 {
147 compatible = "qca,ar9330-gmac";
148 reg = <0x18070000 0x4>;
151 pcie0: pcie-controller@180c0000 {
152 compatible = "qcom,ar7240-pci";
153 #address-cells = <3>;
155 bus-range = <0x0 0x0>;
156 reg = <0x180c0000 0x1000>, /* CRP */
157 <0x180f0000 0x100>, /* CTRL */
158 <0x14000000 0x1000>; /* CFG */
159 reg-names = "crp_base", "ctrl_base", "cfg_base";
160 ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000 /* pci memory */
161 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
162 interrupt-parent = <&intc2>;
167 resets = <&rst 6>, <&rst 7>;
168 reset-names = "hc", "phy";
170 interrupt-controller;
171 #interrupt-cells = <1>;
173 interrupt-map-mask = <0 0 0 1>;
174 interrupt-map = <0 0 0 0 &pcie0 0>;
178 wmac: wmac@18100000 {
179 compatible = "qca,qca9530-wmac";
180 reg = <0x18100000 0x20000>;
182 interrupt-parent = <&intc2>;
189 compatible = "generic-ehci";
190 reg = <0x1b000000 0x1000>;
194 reset-names = "usb-host";
197 has-transaction-translator;
198 caps-offset = <0x100>;
200 phy-names = "usb-phy";
207 compatible = "qca,ar934x-spi";
208 reg = <0x1f000000 0x1c>;
210 clocks = <&pll ATH79_CLK_AHB>;
214 #address-cells = <1>;
221 qca,ddr-wb-channel-interrupts = <3>, <4>, <5>;
222 qca,ddr-wb-channels = <&ddr_ctrl 2>, <&ddr_ctrl 0>,
227 compatible = "qca,qca9530-eth", "syscon";
228 pll-data = <0x82000101 0x80000101 0x80001313>;
229 reg = <0x19000000 0x200
231 pll-reg = <0x4 0x2c 17>;
241 reset-names = "mdio";
244 builtin_switch: switch0@1f {
245 compatible = "qca,ar8229";
249 reset-names = "switch";
252 qca,mib-poll-interval = <500>;
255 #address-cells = <1>;
258 swphy0: ethernet-phy@0 {
263 swphy4: ethernet-phy@4 {
274 compatible = "qca,qca9530-eth", "syscon";