ath79: move usb led trigger node to SoC dtsi
[openwrt/staging/ldir.git] / target / linux / ath79 / dts / qca9557_8dev_rambutan.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qca955x.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "8dev,rambutan", "qca,qca9557";
10 model = "8devices Rambutan";
11
12 keys {
13 compatible = "gpio-keys";
14
15 reset {
16 label = "reset";
17 gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
18 linux,code = <KEY_RESTART>;
19 debounce-interval = <60>;
20 };
21 };
22 };
23
24 &nand {
25 status = "okay";
26
27 partitions {
28 compatible = "fixed-partitions";
29
30 #address-cells = <1>;
31 #size-cells = <1>;
32
33 partition@0 {
34 label = "u-boot";
35 reg = <0x0 0x300000>;
36 read-only;
37 };
38
39 partition@300000 {
40 label = "u-boot-env";
41 reg = <0x300000 0x200000>;
42 };
43
44 art: partition@500000 {
45 label = "art";
46 reg = <0x500000 0x100000>;
47 read-only;
48 };
49
50 partition@600000 {
51 label = "ubi";
52 reg = <0x600000 0x7a00000>;
53 };
54 };
55 };
56
57 &mdio0 {
58 status = "okay";
59
60 phy0: ethernet-phy@0 {
61 reg = <0>;
62 reset-gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
63 };
64 };
65
66 &mdio1 {
67 status = "okay";
68
69 phy1: ethernet-phy@0 {
70 reg = <0>;
71 reset-gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
72 phy-mode = "sgmii";
73 at803x-override-sgmii-link-check;
74 };
75 };
76
77 &eth0 {
78 status = "okay";
79
80 nvmem-cells = <&macaddr_art_0>;
81 nvmem-cell-names = "mac-address";
82 phy-mode = "mii";
83 phy-handle = <&phy0>;
84 };
85
86 &eth1 {
87 status = "okay";
88
89 pll-data = <0x17000000 0x101 0x1313>;
90 phy-handle = <&phy1>;
91 qca955x-sgmii-fixup;
92 nvmem-cells = <&macaddr_art_6>;
93 nvmem-cell-names = "mac-address";
94 };
95
96 &wmac {
97 status = "okay";
98
99 gpio-controller;
100 mtd-cal-data = <&art 0x1000>;
101 };
102
103 &pcie0 {
104 status = "okay";
105 };
106
107 &usb_phy0 {
108 status = "okay";
109 };
110
111 &usb0 {
112 status = "okay";
113 };
114
115 &usb_phy1 {
116 status = "okay";
117 };
118
119 &usb1 {
120 status = "okay";
121 };
122
123 &art {
124 compatible = "nvmem-cells";
125 #address-cells = <1>;
126 #size-cells = <1>;
127
128 macaddr_art_0: macaddr@0 {
129 reg = <0x0 0x6>;
130 };
131
132 macaddr_art_6: macaddr@6 {
133 reg = <0x6 0x6>;
134 };
135 };