ath79: qca: convert to nvmem-layout
[openwrt/staging/blocktrron.git] / target / linux / ath79 / dts / qca9557_araknis_an-500-ap-i-ac.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qca955x_senao_loader.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "araknis,an-500-ap-i-ac", "qca,qca9557";
10 model = "Araknis AN-500-AP-I-AC";
11
12 aliases {
13 label-mac-device = &eth0;
14 led-boot = &led_power;
15 led-failsafe = &led_power;
16 led-upgrade = &led_power;
17 };
18
19 keys {
20 compatible = "gpio-keys";
21
22 reset {
23 linux,code = <KEY_RESTART>;
24 gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
25 debounce-interval = <60>;
26 };
27 };
28
29 leds {
30 compatible = "gpio-leds";
31
32 led_power: power {
33 label = "amber:power";
34 gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
35 default-state = "off";
36 };
37
38 wifi2g {
39 label = "blue:wifi2g";
40 gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
41 linux,default-trigger = "phy1tpt";
42 };
43
44 wifi5g {
45 label = "blue:wifi5g";
46 gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
47 linux,default-trigger = "phy0tpt";
48 };
49
50 wps {
51 label = "blue:wps";
52 gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
53 };
54 };
55 };
56
57 &partitions {
58 art: partition@ff0000 {
59 label = "art";
60 reg = <0xff0000 0x010000>;
61 read-only;
62
63 nvmem-layout {
64 compatible = "fixed-layout";
65 #address-cells = <1>;
66 #size-cells = <1>;
67
68 macaddr_art_0: macaddr@0 {
69 reg = <0x0 0x6>;
70 };
71 };
72 };
73 };
74
75 &mdio0 {
76 status = "okay";
77
78 phy5: ethernet-phy@5 {
79 reg = <5>;
80 eee-broken-100tx;
81 eee-broken-1000t;
82 };
83 };
84
85 &eth0 {
86 status = "okay";
87
88 nvmem-cells = <&macaddr_art_0>;
89 nvmem-cell-names = "mac-address";
90
91 phy-handle = <&phy5>;
92 phy-mode = "rgmii-id";
93
94 pll-data = <0x82000000 0x80000101 0x80001313>;
95 };
96
97 &wmac {
98 status = "okay";
99
100 mtd-cal-data = <&art 0x1000>;
101
102 nvmem-cells = <&macaddr_art_0>;
103 nvmem-cell-names = "mac-address";
104 mac-address-increment = <1>;
105 };
106
107 &pcie0 {
108 status = "okay";
109 };